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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>,
	Biju Das <biju.das.jz@bp.renesas.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH] clk: renesas: r9a07g044: Add WDT2 clocks to critical list
Date: Thu, 6 Oct 2022 10:15:48 +0200	[thread overview]
Message-ID: <CAMuHMdU0BSByCZynkdhDQNcQ+7UT=YgZLe_YNVR4d=dS=2mX=g@mail.gmail.com> (raw)
In-Reply-To: <CA+V-a8uNhM92ezEX3iCcP2zp3Er9EPDy1Z-4L3gQfe=xU8O1bw@mail.gmail.com>

Hi Prabhakar, Biju,

On Wed, Oct 5, 2022 at 2:56 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Wed, Oct 5, 2022 at 9:27 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > On Mon, Sep 19, 2022 at 2:52 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > > > On Mon, Sep 19, 2022 at 2:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > > > > > From: Lad Prabhakar <prabhakar.mahadev-
> > > lad.rj@bp.renesas.com>
> > > > > > > > Add the WDT2 clocks to r9a07g044_crit_mod_clks[] list as WDT CH2 is
> > > > > > > > specifically to check the operation of Cortex-M33 CPU on the
> > > > > > > > RZ/{G2L, G2LC, V2L} SoCs and we dont want to turn off the clocks of
> > > > > > > > WDT2 if it isn't enabled by Cortex-A55.
> > > > > > > >
> > > > > > > > This patch is in preparation to disable WDT CH2 from the RZ/G2L
> > > > > > > > (alike
> > > > > > > > SoCs) DTS/I by default.
> > > > > > > >
> > > > > > > > Reported-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > I got confirmation that that using WDT2 from CA55 is prohibited.
> > WDT2 is only for CM33.
> >
> > With CPG register, we can select whether CM33 to trigger CM33 cpu reset, or trigger system reset
> > when WDT2 overflows.
> >
> > If WDT2 is used by CA55, it may result in unexpected behaviour.
> >
> Thanks.
>
> > So we may need to take WDT2 entries from binding + dtsi + clock table??
> >
> > Or
> >
> > Added it to critical clock list, to avoid changes in binding + dtsi + clock table
> > at the expense of turning on the WDT2 clk unnecessarily.

... plus still risking to interfere with the CM33.

> I'm in favour of option#1 except that we keep WDT2 entries in binding.

Agreed (bindings are append-only).

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2022-10-06  8:16 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-19 13:31 [PATCH] clk: renesas: r9a07g044: Add WDT2 clocks to critical list Prabhakar
2022-09-19 13:35 ` Biju Das
2022-09-19 13:37   ` Lad, Prabhakar
2022-09-19 13:52     ` Biju Das
2022-09-19 14:16       ` Lad, Prabhakar
2022-09-19 14:38         ` Biju Das
2022-10-05  8:27           ` Biju Das
2022-10-05 12:56             ` Lad, Prabhakar
2022-10-06  8:15               ` Geert Uytterhoeven [this message]
2022-10-06  8:32                 ` Lad, Prabhakar

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