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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Cc: linux-renesas-soc@vger.kernel.org,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH 2/2] pinctrl: sh-pfc: r8a7795: Add drive strength support
Date: Wed, 23 Mar 2016 11:14:04 +0100	[thread overview]
Message-ID: <CAMuHMdUbUCe-HWEVQmV+uBonL_w8bW65Wh9ofpTXKxSnbPEB1A@mail.gmail.com> (raw)
In-Reply-To: <1458516819-3928-3-git-send-email-laurent.pinchart+renesas@ideasonboard.com>

Hi Laurent,

On Mon, Mar 21, 2016 at 12:33 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> Define the drive strength registers for the R8A7795. As the PFC driver
> for the SoC only defines GPIO pins at the moment, limit drive strength
> support to those pins. Pins without GPIO capabilities will be supported
> later.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

      reply	other threads:[~2016-03-23 10:14 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-20 23:33 [PATCH 0/2] r8a7795 pinctrl: Add drive strength support Laurent Pinchart
2016-03-20 23:33 ` [PATCH 1/2] pinctrl: sh-pfc: " Laurent Pinchart
2016-03-23  9:54   ` Geert Uytterhoeven
2016-03-23 14:03     ` Laurent Pinchart
2016-03-20 23:33 ` [PATCH 2/2] pinctrl: sh-pfc: r8a7795: " Laurent Pinchart
2016-03-23 10:14   ` Geert Uytterhoeven [this message]

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