From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2DEFC433EF for ; Mon, 11 Apr 2022 12:36:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346144AbiDKMi3 (ORCPT ); Mon, 11 Apr 2022 08:38:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346125AbiDKMiZ (ORCPT ); Mon, 11 Apr 2022 08:38:25 -0400 Received: from mail-qv1-f49.google.com (mail-qv1-f49.google.com [209.85.219.49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 123091AD99; Mon, 11 Apr 2022 05:36:11 -0700 (PDT) Received: by mail-qv1-f49.google.com with SMTP id b17so13060462qvf.12; Mon, 11 Apr 2022 05:36:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=gwALCLphRY0C4UTHiPknn9pMqBg3LkP1UU4uqZKSCNE=; b=PNpyaatoefdjsoaMPBBAlGfqIIOu+1zyG8Q2yzsCkxzosDg+1q+2CPUOVZhL4z5yon /quA3qTRMjggxrul+tdpLe9axVad1F5gFFhlEa10PQwtjeVguSiLjdKWklQ3IFwKDONL w4TM+vhyUWnN3x7zfcM4sajBOMeP+F54dyDlnV7A/fOFHJsfBdXQiFH4QyLcoXAtakxd 2eeyqIloSIY8DpG3t0CB5vcyL8MAsqA9yy1QK2AA+bCqUrOXJacFsX6MgBQfF5GiOup7 DtSIadt3Bu0by98YL92GoQh3yyokACFPGfF82vgmOuP0xOCt+5cVb5NEOr3j6pM6LDMT SRyw== X-Gm-Message-State: AOAM533yUszR+ECKXzzxE2coubJb5sIbsg+ThtUxkZVMSRRkXrrDjjdN E2Ze5HumcU2ZhDSkoAh46pWzJ51sdSprZg== X-Google-Smtp-Source: ABdhPJx2BpNj2C+T2b7AbXzgGzOzuchZp0EGVAhwk6oS//FnCZi5lF8FXj72jmKXwQfNW4bYI4I4Ow== X-Received: by 2002:a05:6214:622:b0:441:2825:c288 with SMTP id a2-20020a056214062200b004412825c288mr26910719qvx.79.1649680569907; Mon, 11 Apr 2022 05:36:09 -0700 (PDT) Received: from mail-yw1-f173.google.com (mail-yw1-f173.google.com. [209.85.128.173]) by smtp.gmail.com with ESMTPSA id p7-20020a05620a22a700b0069c37e2c473sm5978qkh.94.2022.04.11.05.36.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Apr 2022 05:36:09 -0700 (PDT) Received: by mail-yw1-f173.google.com with SMTP id 00721157ae682-2ec05db3dfbso42127267b3.7; Mon, 11 Apr 2022 05:36:09 -0700 (PDT) X-Received: by 2002:a81:c703:0:b0:2d0:cc6b:3092 with SMTP id m3-20020a81c703000000b002d0cc6b3092mr25284348ywi.449.1649680568889; Mon, 11 Apr 2022 05:36:08 -0700 (PDT) MIME-Version: 1.0 References: <20220317191527.96237-1-singh.kuldeep87k@gmail.com> <20220317191527.96237-3-singh.kuldeep87k@gmail.com> <558f0c92-c499-daca-e1ad-2b16137f8c06@arm.com> <20220317212508.GB99538@9a2d8922b8f1> In-Reply-To: From: Geert Uytterhoeven Date: Mon, 11 Apr 2022 14:35:57 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 2/3] dt-bindings: timer: Document arm, cortex-a7-timer in arch timer To: Rob Herring Cc: Kuldeep Singh , Robin Murphy , Marc Zyngier , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Mark Rutland , Linux Kernel Mailing List , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Mar 20, 2022 at 7:56 PM Rob Herring wrote: > On Fri, Mar 18, 2022 at 02:55:08AM +0530, Kuldeep Singh wrote: > > On Thu, Mar 17, 2022 at 08:25:12PM +0000, Robin Murphy wrote: > > > On 2022-03-17 19:15, Kuldeep Singh wrote: > > > > Renesas RZ/N1D platform uses compatible "arm,cortex-a7-timer" in > > > > conjugation with "arm,armv7-timer". Since, initial entry is not > > > > documented, it start raising dtbs_check warnings. I hadn't seen this thread, but I had already removed the unneeded compatible value locally, and was just waiting for the merge window and holidays to end for sending the patch... > > > > > > > > ['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long > > > > 'arm,cortex-a7-timer' is not one of ['arm,armv7-timer', 'arm,armv8-timer'] > > > > 'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer'] > > > > > > > > Document this compatible to address it. The motivation to add this > > > > change is taken from an already existing entry "arm,cortex-a15-timer". > > > > Please note, this will not hurt any arch timer users. > > > > > > Eh, if it's never been documented or supported, I say just get rid of it. > > > The arch timer interface is by definition part of a CPU, and we can tell > > > what the CPU is by reading its ID registers. Indeed that's how the driver > > > handles the non-zero number of CPU-specific errata that already exist - we > > > don't need compatibles for that. > > > > > > In some ways it might have been nice to have *SoC-specific* compatibles > > > given the difficulty some integrators seem to have had in wiring up a stable > > > count *to* the interface, but it's not like they could be magically added to > > > already-deployed DTs after a bug is discovered, and nor could we have > > > mandated them from day 1 just in case and subsequently maintained a binding > > > that is just an ever-growing list of every SoC. Oh well. > > > > Robin, A similar discussion was already done on v1 thread. Please see > > below for details: > > https://lore.kernel.org/linux-devicetree/20220317065925.GA9158@9a2d8922b8f1/ > > https://lore.kernel.org/linux-devicetree/726bde76-d792-febf-d364-6eedeb748c3b@canonical.com/ > > > > And final outcome of discussion turns out to add this compatible string. > > I agree with Robin on dropping. More specific here is not useful. If > we're going to add some cores, then we should add every core > implementation. ... So consider it gone. https://lore.kernel.org/r/a8e0cf00a983b4c539cdb1cfad5cc6b10b423c5b.1649680220.git.geert+renesas@glider.be/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D91EC433F5 for ; Mon, 11 Apr 2022 12:37:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MRFyGWorhmQKZLOfkMRhpZdzDC0L5vMssKSigaaFZ5M=; b=4TaA1AZWUH9uo8 f6JrF7gHaZoCcoCQvk3PF5yBPDCKZprqBPzEpQwtTaxG3axORCYGbiHzQ79KPcsDGoHqjZ4qQXfCQ YU88kGUmrCGM2WV5Ac7Zlr+gEUciI2N6tXLzQ/b5B++l7IEfSvtDcOEPVcXLAQnBxaKfZyHehOh2D CzhsTHQ51pauhz2mrPaDtRNnPuQ/U5u4G4D16q8+nMtq4zI51lJY27XqPlbv9WMHK7E5IKWgcSeq6 WMmDfd6H8EoNTsPtQiO/lcrfSmHf1kYjHJmn1AsKCzrba3WWbdnH4XOV8+xIVUIrGGAcmba4UM7yk Z0C4lj/NzadAksSASRJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ndtHI-0090Xc-FB; Mon, 11 Apr 2022 12:36:20 +0000 Received: from mail-qk1-f169.google.com ([209.85.222.169]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ndtHA-0090Vg-KU for linux-arm-kernel@lists.infradead.org; Mon, 11 Apr 2022 12:36:18 +0000 Received: by mail-qk1-f169.google.com with SMTP id j6so10447897qkp.9 for ; Mon, 11 Apr 2022 05:36:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=gwALCLphRY0C4UTHiPknn9pMqBg3LkP1UU4uqZKSCNE=; b=fz6DM9HuwnM7g+SM1Rx/Id/HdZ+fxqCR7SEkHQBh0XXn0xTOaNAMes+AGzGfa6aE2X XLznMNUpPl7MU00KL4kxSBsbvqTGqDjEl7gu07MDtUp47zEkI0UUfs6QyyvPeCvS9S11 Z2HW9Iyh9k1dpe5WB7gjU8ZmH/PubiPs+gDgWmZ0MnpV0hnxC6ni6C9nQjS8UTSJDTy+ ibUOOn/bJD+H06srnNee+MtYtVh+By1i61gs3gcUjWmvqHtdu3BghLNThQDLhCGoz1b+ 3MupizDUlf1b1txnMExjeAhM1xVIsImvq6uBQU55fgU5bQne2Ui6MmlBlEzTH410z9Ws iJUw== X-Gm-Message-State: AOAM533mIYW3fI7B1IpYVXxUEqrPAw5Jqcy1vyltL6TLX/wWJt7woAU5 FSNGgsKv+GFTe1DZ3bLBXLAe5Z5DvjLVzw== X-Google-Smtp-Source: ABdhPJwHEOpSmTZ57gfvBlZ4dsSyqS8gSCOIIz/Ngq6ysjjx/GMRNznw/t9XVVhQOXRifJmDHo3G9g== X-Received: by 2002:ae9:e314:0:b0:69c:33b:a257 with SMTP id v20-20020ae9e314000000b0069c033ba257mr6062550qkf.124.1649680569622; Mon, 11 Apr 2022 05:36:09 -0700 (PDT) Received: from mail-yw1-f172.google.com (mail-yw1-f172.google.com. [209.85.128.172]) by smtp.gmail.com with ESMTPSA id br13-20020a05620a460d00b00680d020b4cbsm18145320qkb.10.2022.04.11.05.36.09 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Apr 2022 05:36:09 -0700 (PDT) Received: by mail-yw1-f172.google.com with SMTP id 00721157ae682-2ed65e63afcso3826927b3.9 for ; Mon, 11 Apr 2022 05:36:09 -0700 (PDT) X-Received: by 2002:a81:c703:0:b0:2d0:cc6b:3092 with SMTP id m3-20020a81c703000000b002d0cc6b3092mr25284348ywi.449.1649680568889; Mon, 11 Apr 2022 05:36:08 -0700 (PDT) MIME-Version: 1.0 References: <20220317191527.96237-1-singh.kuldeep87k@gmail.com> <20220317191527.96237-3-singh.kuldeep87k@gmail.com> <558f0c92-c499-daca-e1ad-2b16137f8c06@arm.com> <20220317212508.GB99538@9a2d8922b8f1> In-Reply-To: From: Geert Uytterhoeven Date: Mon, 11 Apr 2022 14:35:57 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 2/3] dt-bindings: timer: Document arm, cortex-a7-timer in arch timer To: Rob Herring Cc: Kuldeep Singh , Robin Murphy , Marc Zyngier , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Mark Rutland , Linux Kernel Mailing List , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220411_053612_715442_EE78460F X-CRM114-Status: GOOD ( 39.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Mar 20, 2022 at 7:56 PM Rob Herring wrote: > On Fri, Mar 18, 2022 at 02:55:08AM +0530, Kuldeep Singh wrote: > > On Thu, Mar 17, 2022 at 08:25:12PM +0000, Robin Murphy wrote: > > > On 2022-03-17 19:15, Kuldeep Singh wrote: > > > > Renesas RZ/N1D platform uses compatible "arm,cortex-a7-timer" in > > > > conjugation with "arm,armv7-timer". Since, initial entry is not > > > > documented, it start raising dtbs_check warnings. I hadn't seen this thread, but I had already removed the unneeded compatible value locally, and was just waiting for the merge window and holidays to end for sending the patch... > > > > > > > > ['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long > > > > 'arm,cortex-a7-timer' is not one of ['arm,armv7-timer', 'arm,armv8-timer'] > > > > 'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer'] > > > > > > > > Document this compatible to address it. The motivation to add this > > > > change is taken from an already existing entry "arm,cortex-a15-timer". > > > > Please note, this will not hurt any arch timer users. > > > > > > Eh, if it's never been documented or supported, I say just get rid of it. > > > The arch timer interface is by definition part of a CPU, and we can tell > > > what the CPU is by reading its ID registers. Indeed that's how the driver > > > handles the non-zero number of CPU-specific errata that already exist - we > > > don't need compatibles for that. > > > > > > In some ways it might have been nice to have *SoC-specific* compatibles > > > given the difficulty some integrators seem to have had in wiring up a stable > > > count *to* the interface, but it's not like they could be magically added to > > > already-deployed DTs after a bug is discovered, and nor could we have > > > mandated them from day 1 just in case and subsequently maintained a binding > > > that is just an ever-growing list of every SoC. Oh well. > > > > Robin, A similar discussion was already done on v1 thread. Please see > > below for details: > > https://lore.kernel.org/linux-devicetree/20220317065925.GA9158@9a2d8922b8f1/ > > https://lore.kernel.org/linux-devicetree/726bde76-d792-febf-d364-6eedeb748c3b@canonical.com/ > > > > And final outcome of discussion turns out to add this compatible string. > > I agree with Robin on dropping. More specific here is not useful. If > we're going to add some cores, then we should add every core > implementation. ... So consider it gone. https://lore.kernel.org/r/a8e0cf00a983b4c539cdb1cfad5cc6b10b423c5b.1649680220.git.geert+renesas@glider.be/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel