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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Ulrich Hecht <uli+renesas@fpond.eu>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Wolfram Sang <wsa@the-dreams.de>,
	hoai.luu.ub@renesas.com
Subject: Re: [PATCH v2 2/5] pinctrl: renesas: add I/O voltage level flag
Date: Tue, 22 Dec 2020 11:45:58 +0100	[thread overview]
Message-ID: <CAMuHMdVH_Cb28M5RPjS6pDiguq_q23ri0KXNxGky4tA6xm0mGw@mail.gmail.com> (raw)
In-Reply-To: <20201221165448.27312-3-uli+renesas@fpond.eu>

Hi Uli,

On Mon, Dec 21, 2020 at 5:55 PM Ulrich Hecht <uli+renesas@fpond.eu> wrote:
> This patch adds config macros describing the voltage levels available on
> a pin. The current default (3.3V/1.8V) maps to zero to avoid having to
> change existing PFC implementations.
>
> Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pinctrl.c
> +++ b/drivers/pinctrl/renesas/pinctrl.c
> @@ -634,6 +634,9 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
>         }
>
>         case PIN_CONFIG_POWER_SOURCE: {
> +               int idx = sh_pfc_get_pin_index(pfc, _pin);

I guess this cannot fail when we get here?

> +               const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
> +               int lower_voltage;

unsigned int mV_low?

>                 u32 pocctrl, val;
>                 int bit;
>
> @@ -648,7 +651,10 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
>                 val = sh_pfc_read(pfc, pocctrl);
>                 spin_unlock_irqrestore(&pfc->lock, flags);
>
> -               arg = (val & BIT(bit)) ? 3300 : 1800;
> +               lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ?
> +                       2500 : 1800;
> +
> +               arg = (val & BIT(bit)) ? 3300 : lower_voltage;
>                 break;
>         }
>
> @@ -702,6 +708,9 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
>
>                 case PIN_CONFIG_POWER_SOURCE: {
>                         unsigned int mV = pinconf_to_config_argument(configs[i]);
> +                       int idx = sh_pfc_get_pin_index(pfc, _pin);
> +                       const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
> +                       int lower_voltage;

unsigned int mV_low?

>                         u32 pocctrl, val;
>                         int bit;
>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2020-12-22 10:47 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-21 16:54 [PATCH v2 0/5] pinctrl: renesas: basic R8A779A0 (V3U) support Ulrich Hecht
2020-12-21 16:54 ` [PATCH v2 1/5] pinctrl: renesas: implement unlock register masks Ulrich Hecht
2020-12-22 10:31   ` Geert Uytterhoeven
2020-12-21 16:54 ` [PATCH v2 2/5] pinctrl: renesas: add I/O voltage level flag Ulrich Hecht
2020-12-22 10:45   ` Geert Uytterhoeven [this message]
2020-12-22 16:47     ` Ulrich Hecht
2020-12-22 18:44       ` Geert Uytterhoeven
2020-12-22 11:44   ` Geert Uytterhoeven
2020-12-22 16:47     ` Ulrich Hecht
2020-12-21 16:54 ` [PATCH v2 3/5] pinctrl: renesas: add PORT_GP_CFG_{2,31} macros Ulrich Hecht
2020-12-22 10:35   ` Geert Uytterhoeven
2020-12-21 16:54 ` [PATCH v2 5/5] pinctrl: renesas: r8a779a0: Add SCIF pins, groups and functions Ulrich Hecht
2020-12-22 10:05   ` Geert Uytterhoeven
2020-12-28 12:17   ` Wolfram Sang
     [not found] ` <20201221165448.27312-5-uli+renesas@fpond.eu>
2020-12-22 11:42   ` [PATCH v2 4/5] pinctrl: renesas: Initial R8A779A0 (V3U) PFC support Geert Uytterhoeven
2021-01-12 16:58     ` Ulrich Hecht
2020-12-27 20:27   ` Wolfram Sang
2020-12-23 15:59 ` [PATCH v2 0/5] pinctrl: renesas: basic R8A779A0 (V3U) support Wolfram Sang

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