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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>,
	Linux MMC List <linux-mmc@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v4 2/2] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings
Date: Fri, 12 Nov 2021 12:14:12 +0100	[thread overview]
Message-ID: <CAMuHMdVXpn7X3Tm_ouq6DVUDP4mxMO8EObFjtfEU4pX6sodo9A@mail.gmail.com> (raw)
In-Reply-To: <20210817090313.31858-3-biju.das.jz@bp.renesas.com>

Hi Biju,

On Tue, Aug 17, 2021 at 11:03 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Document RZ/G2L SDHI controller bindings.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch, which is now commit bfadee4554c3782b
("dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings")
in v5.15.

> --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
> +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
> @@ -44,19 +44,20 @@ properties:
>            - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
>        - items:
>            - enum:
> -              - renesas,sdhi-r8a774a1 # RZ/G2M
> -              - renesas,sdhi-r8a774b1 # RZ/G2N
> -              - renesas,sdhi-r8a774c0 # RZ/G2E
> -              - renesas,sdhi-r8a774e1 # RZ/G2H
> -              - renesas,sdhi-r8a7795  # R-Car H3
> -              - renesas,sdhi-r8a7796  # R-Car M3-W
> -              - renesas,sdhi-r8a77961 # R-Car M3-W+
> -              - renesas,sdhi-r8a77965 # R-Car M3-N
> -              - renesas,sdhi-r8a77970 # R-Car V3M
> -              - renesas,sdhi-r8a77980 # R-Car V3H
> -              - renesas,sdhi-r8a77990 # R-Car E3
> -              - renesas,sdhi-r8a77995 # R-Car D3
> -              - renesas,sdhi-r8a779a0 # R-Car V3U
> +              - renesas,sdhi-r8a774a1  # RZ/G2M
> +              - renesas,sdhi-r8a774b1  # RZ/G2N
> +              - renesas,sdhi-r8a774c0  # RZ/G2E
> +              - renesas,sdhi-r8a774e1  # RZ/G2H
> +              - renesas,sdhi-r8a7795   # R-Car H3
> +              - renesas,sdhi-r8a7796   # R-Car M3-W
> +              - renesas,sdhi-r8a77961  # R-Car M3-W+
> +              - renesas,sdhi-r8a77965  # R-Car M3-N
> +              - renesas,sdhi-r8a77970  # R-Car V3M
> +              - renesas,sdhi-r8a77980  # R-Car V3H
> +              - renesas,sdhi-r8a77990  # R-Car E3
> +              - renesas,sdhi-r8a77995  # R-Car D3
> +              - renesas,sdhi-r8a779a0  # R-Car V3U
> +              - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
>            - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2

I don't think SDHI on RZ/G2L is fully compatible with SDHI on R-Car Gen3...

>
>    reg:
> @@ -66,15 +67,9 @@ properties:
>      minItems: 1
>      maxItems: 3
>
> -  clocks:
> -    minItems: 1
> -    maxItems: 2
> +  clocks: true
>
> -  clock-names:
> -    minItems: 1
> -    items:
> -      - const: core
> -      - const: cd
> +  clock-names: true
>
>    dmas:
>      minItems: 4
> @@ -108,6 +103,42 @@ properties:
>  allOf:
>    - $ref: "mmc-controller.yaml"
>
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: renesas,sdhi-r9a07g044
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: IMCLK, SDHI channel main clock1.
> +            - description: IMCLK2, SDHI channel main clock2. When this clock is
> +                           turned off, external SD card detection cannot be
> +                           detected.
> +            - description: CLK_HS, SDHI channel High speed clock which operates
> +                           4 times that of SDHI channel main clock1.
> +            - description: ACLK, SDHI channel bus clock.
> +        clock-names:
> +          items:
> +            - const: imclk
> +            - const: imclk2
> +            - const: clk_hs
> +            - const: aclk
> +      required:
> +        - clock-names
> +        - resets
> +    else:
> +      properties:
> +        clocks:
> +          minItems: 1
> +          maxItems: 2
> +        clock-names:
> +          minItems: 1
> +          items:
> +            - const: core
> +            - const: cd
> +
>    - if:
>        properties:
>          compatible:

... as the clock handling is completely different.

Does this actually work with the current Linux SDHI driver? How are
the extra clocks handled?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  parent reply	other threads:[~2021-11-12 11:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-17  9:03 [PATCH v4 0/2] Document RZ/G2L SDHI controller bindings Biju Das
2021-08-17  9:03 ` [PATCH v4 1/2] dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning Biju Das
2021-08-18 14:12   ` Rob Herring
2021-08-24 14:56   ` Ulf Hansson
2021-08-17  9:03 ` [PATCH v4 2/2] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings Biju Das
2021-08-18 14:21   ` Rob Herring
2021-08-24 14:56   ` Ulf Hansson
2021-11-12 11:14   ` Geert Uytterhoeven [this message]
2021-11-12 11:51     ` Biju Das
2021-11-12 11:56     ` Wolfram Sang
2021-11-12 12:17       ` Geert Uytterhoeven

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