From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41000C4332F for ; Tue, 21 Sep 2021 15:54:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 153F661186 for ; Tue, 21 Sep 2021 15:54:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 153F661186 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=linux-m68k.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 81A676EA61; Tue, 21 Sep 2021 15:54:05 +0000 (UTC) Received: from mail-ua1-f47.google.com (mail-ua1-f47.google.com [209.85.222.47]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D6E36EA61 for ; Tue, 21 Sep 2021 15:54:04 +0000 (UTC) Received: by mail-ua1-f47.google.com with SMTP id u11so13779573uaw.3 for ; Tue, 21 Sep 2021 08:54:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xeKByOTS+lpH6VM+sT0RbBcDyOchg2h9uI8kPYfUR3g=; b=VZp3Q5VfrG+bCKVCkgcmzLKEzS//JnEbZsOg0TgJ8HzTVSHv4nV+leCgAeC6ayVz/f U4+o5sm8HqHRSEDYZ9k8ianscl9ZYl8pWyrVuPbxdFVxMkh1kZ6ItuXy4xma3nI+vRzj t0p+XrZ775KC1j3z2av4xhqlnezlIu4EcYHfHCUyqagOGe92emRCsBR+BbVy7p2+YXUr 4HhBTCpSq1RtMP0IMzuren1kxGRxRM4exUP3tMIgzphAcpGMvQCpatWm/Q+OT3mSZ/hb GWrbATxJUi6ZlggX2GetwU+zcUUXjHRUt9KXwDzVPtZBkkqZkZPoW2+3AJtOGclx3Pp9 /edQ== X-Gm-Message-State: AOAM532AIPML6KbgLQ5g4mhwDK0A7dlKs8BD/Q827lt9Xp+5GUSm3im4 AP+U1tTF4grrP2lCA3x1SMWcf/RUpdaNsDjgr5I= X-Google-Smtp-Source: ABdhPJzjty7MGs32K3rhY6sUGT5fb8yVFIHG9t8ODt4dP8iZWbOtrhi5vyGYC5HXNaufTLBguH0mUeHSZNy5UK8vZbE= X-Received: by 2002:ab0:6ec9:: with SMTP id c9mr18455990uav.114.1632239643731; Tue, 21 Sep 2021 08:54:03 -0700 (PDT) MIME-Version: 1.0 References: <20210623135639.17125-1-laurent.pinchart+renesas@ideasonboard.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 21 Sep 2021 17:53:52 +0200 Message-ID: Subject: Re: [RESEND] [PATCH v2 1/2] dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX To: Laurent Pinchart Cc: DRI Development , Linux-Renesas , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Laurent, On Wed, Jul 28, 2021 at 6:26 PM Laurent Pinchart wrote: > The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It > can operate in either DSI or CSI-2 mode, with up to four data lanes. > > Signed-off-by: Laurent Pinchart > Reviewed-by: Kieran Bingham Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml > @@ -0,0 +1,118 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas R-Car MIPI DSI/CSI-2 Encoder > + > +maintainers: > + - Laurent Pinchart > + > +description: | > + This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas > + R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up > + to four data lanes. > + > +properties: > + compatible: > + enum: > + - renesas,r8a779a0-dsi-csi2-tx # for V3U > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Functional clock > + - description: DSI (and CSI-2) functional clock > + - description: PLL reference clock > + > + clock-names: > + items: > + - const: fck > + - const: dsi > + - const: pll No interrupts? The hardware manual says there are 9 interrupts. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9A00C433FE for ; Tue, 21 Sep 2021 15:54:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8CE92611C6 for ; Tue, 21 Sep 2021 15:54:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231688AbhIUPzd (ORCPT ); Tue, 21 Sep 2021 11:55:33 -0400 Received: from mail-ua1-f41.google.com ([209.85.222.41]:38816 "EHLO mail-ua1-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229537AbhIUPzc (ORCPT ); Tue, 21 Sep 2021 11:55:32 -0400 Received: by mail-ua1-f41.google.com with SMTP id 42so6655113uar.5; Tue, 21 Sep 2021 08:54:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xeKByOTS+lpH6VM+sT0RbBcDyOchg2h9uI8kPYfUR3g=; b=6bafJajwRRAZhSsw6HgHk239LsSGIjbsy274zbWe+LNaM25X+Se8bWtlk6mHKKIOPy XV6JvxSA/NguF4n/LNLKxghka98ua4SRoXZ4ETKRVgrMid6HBRvHEN9d0/c4XTcjVywd hAKzpfOM1+bgJ0oPOhEH1GA/iBsGSSsJVSmf+WFrIWZLNGZyYVRI0TQfApl2DIl7TaB5 FcDUsq8p6nTQLLtb69To9LALUIsevWq6IvlRR34OypewBH7Fjh/UkOfxspd1Te6Futd7 x5p6jux70D9hqMKabqxRRfXl1SuefUonQtqIMcoVIT9tsmSNXIIeuw9fbnMcz23u3Vcz Wm2w== X-Gm-Message-State: AOAM531BpVHFigaNDZhSukiCaUlnp8LsPsG7aXiW1e/KrppV32Br1BZi UT0q8QDSitp2XtM5IWS43exmsA3ff6aiKosdAiw= X-Google-Smtp-Source: ABdhPJzjty7MGs32K3rhY6sUGT5fb8yVFIHG9t8ODt4dP8iZWbOtrhi5vyGYC5HXNaufTLBguH0mUeHSZNy5UK8vZbE= X-Received: by 2002:ab0:6ec9:: with SMTP id c9mr18455990uav.114.1632239643731; Tue, 21 Sep 2021 08:54:03 -0700 (PDT) MIME-Version: 1.0 References: <20210623135639.17125-1-laurent.pinchart+renesas@ideasonboard.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 21 Sep 2021 17:53:52 +0200 Message-ID: Subject: Re: [RESEND] [PATCH v2 1/2] dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX To: Laurent Pinchart Cc: DRI Development , Linux-Renesas , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Laurent, On Wed, Jul 28, 2021 at 6:26 PM Laurent Pinchart wrote: > The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It > can operate in either DSI or CSI-2 mode, with up to four data lanes. > > Signed-off-by: Laurent Pinchart > Reviewed-by: Kieran Bingham Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml > @@ -0,0 +1,118 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas R-Car MIPI DSI/CSI-2 Encoder > + > +maintainers: > + - Laurent Pinchart > + > +description: | > + This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas > + R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up > + to four data lanes. > + > +properties: > + compatible: > + enum: > + - renesas,r8a779a0-dsi-csi2-tx # for V3U > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Functional clock > + - description: DSI (and CSI-2) functional clock > + - description: PLL reference clock > + > + clock-names: > + items: > + - const: fck > + - const: dsi > + - const: pll No interrupts? The hardware manual says there are 9 interrupts. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds