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[209.85.219.180]) by smtp.gmail.com with ESMTPSA id z15-20020a05622a060f00b002e2070bf899sm889873qta.90.2022.04.14.03.10.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Apr 2022 03:10:14 -0700 (PDT) Received: by mail-yb1-f180.google.com with SMTP id v77so8466033ybi.12; Thu, 14 Apr 2022 03:10:14 -0700 (PDT) X-Received: by 2002:a25:23c9:0:b0:641:d94c:8bf1 with SMTP id j192-20020a2523c9000000b00641d94c8bf1mr1206692ybj.546.1649931014457; Thu, 14 Apr 2022 03:10:14 -0700 (PDT) MIME-Version: 1.0 References: <20220413085050.61144-1-u.kleine-koenig@pengutronix.de> <20220413085050.61144-5-u.kleine-koenig@pengutronix.de> In-Reply-To: <20220413085050.61144-5-u.kleine-koenig@pengutronix.de> From: Geert Uytterhoeven Date: Thu, 14 Apr 2022 12:10:02 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 5/6] pwm: renesas-tpu: Improve maths to compute register settings To: =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= Cc: Laurent Pinchart , Simon Horman , Magnus Damm , Thierry Reding , Lee Jones , Linux PWM List , Linux-Renesas , Sascha Hauer Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi Uwe, Thanks for your patch! On Wed, Apr 13, 2022 at 10:51 AM Uwe Kleine-König wrote: > The newly computed register values are intended to exactly match the > previously computed values. The main improvement is that the prescaler > is computed directly instead of with a loop. This uses the fact, that > prescalers[i] = 1 << (2 * i). > > Assuming a moderately smart compiler, the needed number of divisions for > the case where the requested period is too big, is reduced from 5 to 2. I'm not worried about the divisions, but about the ilog2(), which uses fls(). The TPU block also exists on SuperH SoCs (although currently no SH Linux code has it enabled), and SH uses the fls() implementation from asm-generic. > --- a/drivers/pwm/pwm-renesas-tpu.c > +++ b/drivers/pwm/pwm-renesas-tpu.c > @@ -244,7 +244,6 @@ static void tpu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) > static int tpu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, > int duty_ns, int period_ns, bool enabled) > { > - static const unsigned int prescalers[] = { 1, 4, 16, 64 }; > struct tpu_pwm_device *tpd = pwm_get_chip_data(pwm); > struct tpu_device *tpu = to_tpu_device(chip); > unsigned int prescaler; > @@ -254,26 +253,21 @@ static int tpu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, > u32 duty; > int ret; > > - /* > - * Pick a prescaler to avoid overflowing the counter. > - * TODO: Pick the highest acceptable prescaler. > - */ > clk_rate = clk_get_rate(tpu->clk); > > - for (prescaler = 0; prescaler < ARRAY_SIZE(prescalers); ++prescaler) { > - period = clk_rate / prescalers[prescaler] > - / (NSEC_PER_SEC / period_ns); > - if (period <= 0xffff) > - break; > - } > + period = clk_rate / (NSEC_PER_SEC / period_ns); > + if (period >= 64 * 0x10000 || period == 0) > + return -EINVAL; > > - if (prescaler == ARRAY_SIZE(prescalers) || period == 0) { > - dev_err(&tpu->pdev->dev, "clock rate mismatch\n"); > - return -ENOTSUPP; > - } > + if (period < 0x10000) > + prescaler = 0; > + else > + prescaler = ilog2(period / 0x10000) / 2 + 1; > + > + period >>= 2 * prescaler; Although the above is correct, I find it hard to read. Hence I'd keep a loop, like: unsigned int prescaler = 0; ... while (period > 0x10000) { period >>= 2; prescalar++; } This would even save 2 lines of code ;-) > > if (duty_ns) { > - duty = clk_rate / prescalers[prescaler] > + duty = (clk_rate >> 2 * prescaler) > / (NSEC_PER_SEC / duty_ns); > if (duty > period) > return -EINVAL; Anyway: Reviewed-by: Geert Uytterhoeven The display backlight still works fine on r8a7740/armadillo, so Tested-by: Geert Uytterhoeven Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds