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[209.85.219.174]) by smtp.gmail.com with ESMTPSA id w13-20020a05620a444d00b006cbc00db595sm6396697qkp.23.2022.11.06.23.52.20 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Nov 2022 23:52:20 -0800 (PST) Received: by mail-yb1-f174.google.com with SMTP id 131so8232289ybl.3 for ; Sun, 06 Nov 2022 23:52:20 -0800 (PST) X-Received: by 2002:a81:9c49:0:b0:34a:de:97b8 with SMTP id n9-20020a819c49000000b0034a00de97b8mr45959924ywa.384.1667807529144; Sun, 06 Nov 2022 23:52:09 -0800 (PST) Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> From: Geert Uytterhoeven Date: Mon, 7 Nov 2022 08:51:56 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 28/65] clk: renesas: r9a06g032: Add a determine_rate hook To: Maxime Ripard Cc: Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven , linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Gareth Williams Content-Type: text/plain; charset="UTF-8" CC Gareth On Fri, Nov 4, 2022 at 2:18 PM Maxime Ripard wrote: > > The Renesas r9a06g032 bitselect clock implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The latter case would be equivalent to setting the flag > CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook > to __clk_mux_determine_rate(). Indeed, if no determine_rate > implementation is provided, clk_round_rate() (through > clk_core_round_rate_nolock()) will call itself on the parent if > CLK_SET_RATE_PARENT is set, and will not change the clock rate > otherwise. __clk_mux_determine_rate() has the exact same behavior when > CLK_SET_RATE_NO_REPARENT is set. > > And if it was an oversight, then we are at least explicit about our > behavior now and it can be further refined down the line. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/renesas/r9a06g032-clocks.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c > index 983faa5707b9..70c37097ca6e 100644 > --- a/drivers/clk/renesas/r9a06g032-clocks.c > +++ b/drivers/clk/renesas/r9a06g032-clocks.c > @@ -773,6 +773,7 @@ static int r9a06g032_clk_mux_set_parent(struct clk_hw *hw, u8 index) > } > > static const struct clk_ops clk_bitselect_ops = { > + .determine_rate = __clk_mux_determine_rate, > .get_parent = r9a06g032_clk_mux_get_parent, > .set_parent = r9a06g032_clk_mux_set_parent, > }; > @@ -797,7 +798,7 @@ r9a06g032_register_bitsel(struct r9a06g032_priv *clocks, > > init.name = desc->name; > init.ops = &clk_bitselect_ops; > - init.flags = CLK_SET_RATE_PARENT; > + init.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT; > init.parent_names = names; > init.num_parents = 2; > > > -- > b4 0.11.0-dev-99e3a From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00D75C433FE for ; Mon, 7 Nov 2022 07:52:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 576B910E0CD; Mon, 7 Nov 2022 07:52:25 +0000 (UTC) Received: from mail-oi1-f175.google.com (mail-oi1-f175.google.com [209.85.167.175]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7A62410E0CD for ; Mon, 7 Nov 2022 07:52:21 +0000 (UTC) Received: by mail-oi1-f175.google.com with SMTP id c129so11363291oia.0 for ; Sun, 06 Nov 2022 23:52:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=hLKOOl0yo7YI7pAdrLyTR/NQWG7rhWdAq87I8wp+XOk=; b=cfNUCVh7T275WRoCHfz7i1rTGygO+yeJVsx4krRUuz/Rc48RFAu6VM3IyIi1mSIC6B stmkm3/YaoI8hoBivWTjv1IgJZcgcLO/mDJGoXlxCDBcOa736cyHJZRBI4/wKqC4vcgF qWarj3eqhOou4EsAUDacx4EmjATNGAaPFditGsOIxj3NhrAWuSVwZPBTgD6IRkrGSoS+ 2uA1SWRI5wqEL5CJiu6iERvn2jG/25JMzCDjigoTrZT3zfEiAb4d02pu8vt6AD5wVO+m 0sIzy8cA/GPHkOimUSRsZfga5PFhriM9XxMkmDFDhT82gRs3XAtTXgh6O/YWVHM6VvXA LGBw== X-Gm-Message-State: ACrzQf2IaYVhgNVM4GevEI8fQX2Xe0OVCpTBO66CtcjJNXVWLzmww0ji aQnYSTwQe/KPKy8rDLhkhpepvOEmAGqzCA== X-Google-Smtp-Source: AMsMyM6rMLyBcGEbeE7H9SQAguABkN68f6NzzbJbaug/eC+vEiIL3QTIMVGmRnrgYW4GxeK6eygngw== X-Received: by 2002:a54:4016:0:b0:35a:3878:f22a with SMTP id x22-20020a544016000000b0035a3878f22amr16204566oie.47.1667807540142; Sun, 06 Nov 2022 23:52:20 -0800 (PST) Received: from mail-ot1-f42.google.com (mail-ot1-f42.google.com. [209.85.210.42]) by smtp.gmail.com with ESMTPSA id b126-20020aca3484000000b00354d9b9f6b4sm2131688oia.27.2022.11.06.23.52.19 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Nov 2022 23:52:20 -0800 (PST) Received: by mail-ot1-f42.google.com with SMTP id j25-20020a056830015900b0066ca2cd96daso2529337otp.10 for ; Sun, 06 Nov 2022 23:52:19 -0800 (PST) X-Received: by 2002:a81:9c49:0:b0:34a:de:97b8 with SMTP id n9-20020a819c49000000b0034a00de97b8mr45959924ywa.384.1667807529144; Sun, 06 Nov 2022 23:52:09 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> From: Geert Uytterhoeven Date: Mon, 7 Nov 2022 08:51:56 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 28/65] clk: renesas: r9a06g032: Add a determine_rate hook To: Maxime Ripard Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ulf Hansson , Prashant Gaikwad , Alexandre Belloni , Liam Girdwood , Michael Turquette , Sekhar Nori , Alexandre Torgue , dri-devel@lists.freedesktop.org, Jaroslav Kysela , Paul Cercueil , Max Filippov , Thierry Reding , linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Abel Vesa , Kishon Vijay Abraham I , Geert Uytterhoeven , Samuel Holland , Chunyan Zhang , Takashi Iwai , linux-tegra@vger.kernel.org, Jernej Skrabec , Jonathan Hunter , Chen-Yu Tsai , NXP Linux Team , Orson Zhai , linux-mips@vger.kernel.org, Luca Ceresoli , linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org, Charles Keepax , alsa-devel@alsa-project.org, Manivannan Sadhasivam , linux-kernel@vger.kernel.org, Sascha Hauer , linux-actions@lists.infradead.org, Gareth Williams , Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Baolin Wang , Matthias Brugger , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , linux-sunxi@lists.linux.dev, Stephen Boyd , patches@opensource.cirrus.com, Peter De Schrijver , Nicolas Ferre , =?UTF-8?Q?Andreas_F=C3=A4rber?= , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Vinod Koul , Maxime Coquelin , David Lechner , Shawn Guo , Claudiu Beznea Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" CC Gareth On Fri, Nov 4, 2022 at 2:18 PM Maxime Ripard wrote: > > The Renesas r9a06g032 bitselect clock implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The latter case would be equivalent to setting the flag > CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook > to __clk_mux_determine_rate(). Indeed, if no determine_rate > implementation is provided, clk_round_rate() (through > clk_core_round_rate_nolock()) will call itself on the parent if > CLK_SET_RATE_PARENT is set, and will not change the clock rate > otherwise. __clk_mux_determine_rate() has the exact same behavior when > CLK_SET_RATE_NO_REPARENT is set. > > And if it was an oversight, then we are at least explicit about our > behavior now and it can be further refined down the line. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/renesas/r9a06g032-clocks.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c > index 983faa5707b9..70c37097ca6e 100644 > --- a/drivers/clk/renesas/r9a06g032-clocks.c > +++ b/drivers/clk/renesas/r9a06g032-clocks.c > @@ -773,6 +773,7 @@ static int r9a06g032_clk_mux_set_parent(struct clk_hw *hw, u8 index) > } > > static const struct clk_ops clk_bitselect_ops = { > + .determine_rate = __clk_mux_determine_rate, > .get_parent = r9a06g032_clk_mux_get_parent, > .set_parent = r9a06g032_clk_mux_set_parent, > }; > @@ -797,7 +798,7 @@ r9a06g032_register_bitsel(struct r9a06g032_priv *clocks, > > init.name = desc->name; > init.ops = &clk_bitselect_ops; > - init.flags = CLK_SET_RATE_PARENT; > + init.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT; > init.parent_names = names; > init.num_parents = 2; > > > -- > b4 0.11.0-dev-99e3a From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76945C4332F for ; Mon, 7 Nov 2022 07:52:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wpqls8tT0cq3tXP92O0ckafKNeebjl8gexJR5WkiPVg=; b=dT/t+KvrxK5ERl vFZC62/VPD8Awl1vq5J/s67ZZzKDWYTbO6QlT6eVn+RpAWU1Dqy2+t0rCkOVYZgLlOkCCqbhchcMG 93+D8AWl2b9OqPxzh7lZkn1579QoUqxInw4gk410HrjQSfH9g+h7P8pIhYXlIcgBAVUKCKmFhbJRe nafmOasaZAnIY6WxpSm5DhkehOa2v9t0YWOebhcJJnQCFLiidJXZtmVEnFmfp4Zs12rSUZ5sdFt0u JMkjoy8OAHvSgZPUkSTKYlxijESwgbc9+V3t8wgCX2ahYfaN5sgAxMivhkDQRAHCYzNghUq2qw0jx k/IKf9ASU3qTK3OTzlDA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1orwvi-00Cl18-OX; Mon, 07 Nov 2022 07:52:26 +0000 Received: from mail-oi1-f173.google.com ([209.85.167.173]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1orwve-00CkNs-IO; Mon, 07 Nov 2022 07:52:24 +0000 Received: by mail-oi1-f173.google.com with SMTP id l127so11303244oia.8; Sun, 06 Nov 2022 23:52:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=hLKOOl0yo7YI7pAdrLyTR/NQWG7rhWdAq87I8wp+XOk=; b=Mp42spz/zDTazHphj2S1wSQ+DPH4cwh072WkPreMhPebH6gzI4yvg8G3+A+2KWx3Po qsCQhOhqIuHYYahSp4Qd9nUX/bFsKNcFmrxERB5hUcSNnzCxueQmKr8vbwg2bhT90B6k f5C7EhePToe8hhyCEgbWqfXuLMDsTII4r2LApQV7Iq9DITKLVw7hDrh0Jjv7s0r7wGIc m01/jJ6ok2rj+dpJ6LtIHEZuFVHDeulIZVI9jWtwe1EgNgKoCb1wj/WomE2FbE2MK8Ra RfBYneuJOzSaqBtQHuRC7G/HAUFFtNv+z1mfwxn18q9fK9ECOK+MH0mOAiyq5yOM+27u PZ2Q== X-Gm-Message-State: ACrzQf2vpIctMHeAa+qCIF3SCJXy4n5qTs2oaDG2ktjJ9dqywHmlNk/b nGbl4m/Lt+k9MVZNFj58NWB6fge6+Bdd0Q== X-Google-Smtp-Source: AMsMyM4Rp38hni7QQEwRBgDxaCi2A3FZ/V/8hlcJ6i9H2wHdcS54YEBFqFL1NPcIstp3HpEyF84/MQ== X-Received: by 2002:aca:1c03:0:b0:359:c144:7f6 with SMTP id c3-20020aca1c03000000b00359c14407f6mr31351723oic.83.1667807539884; Sun, 06 Nov 2022 23:52:19 -0800 (PST) Received: from mail-ot1-f43.google.com (mail-ot1-f43.google.com. [209.85.210.43]) by smtp.gmail.com with ESMTPSA id ca1-20020a056830610100b0066ca61230casm2171365otb.8.2022.11.06.23.52.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Nov 2022 23:52:19 -0800 (PST) Received: by mail-ot1-f43.google.com with SMTP id l42-20020a9d1b2d000000b0066c6366fbc3so6075632otl.3; Sun, 06 Nov 2022 23:52:19 -0800 (PST) X-Received: by 2002:a81:9c49:0:b0:34a:de:97b8 with SMTP id n9-20020a819c49000000b0034a00de97b8mr45959924ywa.384.1667807529144; Sun, 06 Nov 2022 23:52:09 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> From: Geert Uytterhoeven Date: Mon, 7 Nov 2022 08:51:56 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 28/65] clk: renesas: r9a06g032: Add a determine_rate hook To: Maxime Ripard Cc: Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Ulf Hansson , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Linus Walleij , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven , linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Gareth Williams X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221106_235222_638963_C0F36289 X-CRM114-Status: GOOD ( 31.38 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org CC Gareth On Fri, Nov 4, 2022 at 2:18 PM Maxime Ripard wrote: > > The Renesas r9a06g032 bitselect clock implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The latter case would be equivalent to setting the flag > CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook > to __clk_mux_determine_rate(). Indeed, if no determine_rate > implementation is provided, clk_round_rate() (through > clk_core_round_rate_nolock()) will call itself on the parent if > CLK_SET_RATE_PARENT is set, and will not change the clock rate > otherwise. __clk_mux_determine_rate() has the exact same behavior when > CLK_SET_RATE_NO_REPARENT is set. > > And if it was an oversight, then we are at least explicit about our > behavior now and it can be further refined down the line. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/renesas/r9a06g032-clocks.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c > index 983faa5707b9..70c37097ca6e 100644 > --- a/drivers/clk/renesas/r9a06g032-clocks.c > +++ b/drivers/clk/renesas/r9a06g032-clocks.c > @@ -773,6 +773,7 @@ static int r9a06g032_clk_mux_set_parent(struct clk_hw *hw, u8 index) > } > > static const struct clk_ops clk_bitselect_ops = { > + .determine_rate = __clk_mux_determine_rate, > .get_parent = r9a06g032_clk_mux_get_parent, > .set_parent = r9a06g032_clk_mux_set_parent, > }; > @@ -797,7 +798,7 @@ r9a06g032_register_bitsel(struct r9a06g032_priv *clocks, > > init.name = desc->name; > init.ops = &clk_bitselect_ops; > - init.flags = CLK_SET_RATE_PARENT; > + init.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT; > init.parent_names = names; > init.num_parents = 2; > > > -- > b4 0.11.0-dev-99e3a -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1A59C4332F for ; Wed, 9 Nov 2022 17:22:25 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 226FC169B; Wed, 9 Nov 2022 18:21:34 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 226FC169B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1668014544; bh=9dq8NmCbIupb0Woy2GE2zN/zkdXzO3JO4wWOgNAhwmY=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=cTxa1flTF+I6CdjYtaz0LijWEQzi9PIPdfmtj3sYlyb0KSI6fwbKNSmq1mLmQ+hmd SaKKj/pEqbXpGMdR94hF9IYzCC/7lBjs05kMU3zAVNCCe019xrFOXNdDwJQ45LD/7Z B+RJLF/M/PZGyhn6Pc5+ZEiooGBcMxU9ZxN/53PQ= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id C6B39F805E8; Wed, 9 Nov 2022 18:16:09 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id EB9C7F8025A; Mon, 7 Nov 2022 08:52:27 +0100 (CET) Received: from mail-qv1-f50.google.com (mail-qv1-f50.google.com [209.85.219.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id D9513F800AE for ; Mon, 7 Nov 2022 08:52:21 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz D9513F800AE Received: by mail-qv1-f50.google.com with SMTP id x13so7582703qvn.6 for ; Sun, 06 Nov 2022 23:52:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=hLKOOl0yo7YI7pAdrLyTR/NQWG7rhWdAq87I8wp+XOk=; b=334NhRuoQDMZju+m+fKy61r/LdxU0Ry16oOcyxq5KuCjU0bFGJxxYhdyIcUfWqdCiW 7SMeRXhvvAoRdeBwc4tkfqW7V3jmgNnrtIB6kzSPObRqX6wU7UWDBDj909sPQfb+WImA vxb9IamE1bNPD8Z9ZH8zFKNjKL0pwLPJuG0+Ka20/uYlPGC6j67GVNgsRCQ4U+kD2I/t xej5sqqgjOiTRbDf9A84VOz5/Cd44cL8ML3yC5vzQwH7WMgnuph6ET0GKhnWDEYQYPWT P/FZ0762fdFbSC6e6o5/nO+etAUdMlRQbKmxSERMN1kN++9aPkJZvoGuVmbx+xFzfZVl F+NQ== X-Gm-Message-State: ACrzQf23rffyveQxWWt9IMxBQJkbhxNXMnNASuTRNLM0h+VeHd0AXMw9 ilXGU0rBz0USzrGzLlP1xz+Yg4FdpSID7a3L X-Google-Smtp-Source: AMsMyM6OkXRny6DLW1bjtXufdeSxSrKUctY+rvPu2jpojKYnB2pZA34AKMzM76vNryGOGXv6eVM+GA== X-Received: by 2002:a05:6214:19e4:b0:4bb:602d:484 with SMTP id q4-20020a05621419e400b004bb602d0484mr43332813qvc.31.1667807539757; Sun, 06 Nov 2022 23:52:19 -0800 (PST) Received: from mail-yb1-f182.google.com (mail-yb1-f182.google.com. [209.85.219.182]) by smtp.gmail.com with ESMTPSA id bm17-20020a05620a199100b006fa7b5ea2d1sm6346248qkb.125.2022.11.06.23.52.19 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Nov 2022 23:52:19 -0800 (PST) Received: by mail-yb1-f182.google.com with SMTP id z192so12681899yba.0 for ; Sun, 06 Nov 2022 23:52:19 -0800 (PST) X-Received: by 2002:a81:9c49:0:b0:34a:de:97b8 with SMTP id n9-20020a819c49000000b0034a00de97b8mr45959924ywa.384.1667807529144; Sun, 06 Nov 2022 23:52:09 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech> From: Geert Uytterhoeven Date: Mon, 7 Nov 2022 08:51:56 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 28/65] clk: renesas: r9a06g032: Add a determine_rate hook To: Maxime Ripard Content-Type: text/plain; charset="UTF-8" X-Mailman-Approved-At: Wed, 09 Nov 2022 18:15:49 +0100 Cc: Ulf Hansson , Prashant Gaikwad , Alexandre Belloni , Liam Girdwood , Michael Turquette , Sekhar Nori , Alexandre Torgue , dri-devel@lists.freedesktop.org, Paul Cercueil , Max Filippov , Thierry Reding , linux-phy@lists.infradead.org, David Airlie , Fabio Estevam , linux-stm32@st-md-mailman.stormreply.com, Abel Vesa , Kishon Vijay Abraham I , Geert Uytterhoeven , Samuel Holland , Chunyan Zhang , Takashi Iwai , linux-tegra@vger.kernel.org, Jernej Skrabec , Jonathan Hunter , Chen-Yu Tsai , NXP Linux Team , Orson Zhai , linux-mips@vger.kernel.org, Luca Ceresoli , Linus Walleij , linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org, Charles Keepax , Daniel Vetter , alsa-devel@alsa-project.org, Manivannan Sadhasivam , linux-kernel@vger.kernel.org, Sascha Hauer , linux-actions@lists.infradead.org, Gareth Williams , Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Baolin Wang , Matthias Brugger , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , linux-sunxi@lists.linux.dev, Stephen Boyd , patches@opensource.cirrus.com, Peter De Schrijver , Nicolas Ferre , =?UTF-8?Q?Andreas_F=C3=A4rber?= , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Vinod Koul , Maxime Coquelin , David Lechner , Shawn Guo , Claudiu Beznea X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" CC Gareth On Fri, Nov 4, 2022 at 2:18 PM Maxime Ripard wrote: > > The Renesas r9a06g032 bitselect clock implements a mux with a set_parent > hook, but doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far less > used, and it doesn't look like there's any obvious user for that clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call to > clk_set_parent(). > > The latter case would be equivalent to setting the flag > CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook > to __clk_mux_determine_rate(). Indeed, if no determine_rate > implementation is provided, clk_round_rate() (through > clk_core_round_rate_nolock()) will call itself on the parent if > CLK_SET_RATE_PARENT is set, and will not change the clock rate > otherwise. __clk_mux_determine_rate() has the exact same behavior when > CLK_SET_RATE_NO_REPARENT is set. > > And if it was an oversight, then we are at least explicit about our > behavior now and it can be further refined down the line. > > Signed-off-by: Maxime Ripard > --- > drivers/clk/renesas/r9a06g032-clocks.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c > index 983faa5707b9..70c37097ca6e 100644 > --- a/drivers/clk/renesas/r9a06g032-clocks.c > +++ b/drivers/clk/renesas/r9a06g032-clocks.c > @@ -773,6 +773,7 @@ static int r9a06g032_clk_mux_set_parent(struct clk_hw *hw, u8 index) > } > > static const struct clk_ops clk_bitselect_ops = { > + .determine_rate = __clk_mux_determine_rate, > .get_parent = r9a06g032_clk_mux_get_parent, > .set_parent = r9a06g032_clk_mux_set_parent, > }; > @@ -797,7 +798,7 @@ r9a06g032_register_bitsel(struct r9a06g032_priv *clocks, > > init.name = desc->name; > init.ops = &clk_bitselect_ops; > - init.flags = CLK_SET_RATE_PARENT; > + init.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT; > init.parent_names = names; > init.num_parents = 2; > > > -- > b4 0.11.0-dev-99e3a