From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC383C433EF for ; Wed, 13 Apr 2022 13:00:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=27c6yT/F+Z5sR9A1GNXsg8AbmsVly5ntfv6XfVP7Vn4=; b=bKiTArtnGTNdht y+G50yDicELL4MDliAKnH3dUv0ZA93zmLF/8qWXOlXrMP5URFTWyp0xge9Fe64c4FZDpEn8V51XHS 0RUkm8Dv3JX9+g0b0M8eNlZGY7ud6gvETK3JXBr8Vsn/5gbWc+JKZM+4C8fa+A84FB5jIU+RNd3R6 0u15DBUsjFLZYjjuy41ChSK5xKsBMhV8YqfooKVKApBwQIuVrkf6btct9BVai9HZ+nHRknGXeThq2 rwR8+KNcj4WshF/Z1lr3dvM/UzboG6TY76zuIRhrs2pTWi/5uoEHjjPsd1uehMkUHbOuXEXsJg6mC vCNu8XYBgVRWnMhOuHsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1necaD-0017Hu-FZ; Wed, 13 Apr 2022 12:58:53 +0000 Received: from mail-lf1-x12d.google.com ([2a00:1450:4864:20::12d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1neca9-0017Gb-57 for linux-arm-kernel@lists.infradead.org; Wed, 13 Apr 2022 12:58:50 +0000 Received: by mail-lf1-x12d.google.com with SMTP id p10so3320462lfa.12 for ; Wed, 13 Apr 2022 05:58:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=S6BTJOqXprPV32D79la3J3PHQ07V+gHcOwY18Z/zg1o=; b=HdOclq0hcPCSXYMW+IyLq6Uj1hJSappCZR02s/N75vyMxw1wQOOj6HEwSJa5bi5kzO XMaz8pkuztYNHlWH8jrjmaPROm+PRSsqvv7H2gjalAiRbxKAyCPOddTNNGQKWeiJjSVC rWX5rpdiPb4sZHTtpvEUNsuEKm/mzYQrvKMdLTW7JU0tgoJk1uU0PATtawpNf4+tQYUa ZiP1R99S48o+2PDSz9g99TB0WBrT498Hqy0Y6bEGYPmbj+p155i1Mv8v5uLJfKcM7wS1 0P+hEZ1UotZqGfANumizdkAD+34m2GOyzOp9eE1gz+kNZEprGWgbegrlJLOUKcqLNgBx 06Mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=S6BTJOqXprPV32D79la3J3PHQ07V+gHcOwY18Z/zg1o=; b=hc3I2t/XlY2AK/oz8ERnvtBNokCZpYGtkEptCJgfTydmOVDL5alLSQSfCI0uPVkEnl 04xIBOkMjdBnJF/wztR/suK3oQvxr+icIC/T6LcNzgmI1iSPuovwmYRWXstZisXwVqv7 r/Z5IwZdrsRTTipT+Vt3dpxx4yjxwLFkkN0hLy4KUonvBry81mUrWHHJdzUgQgjOhWZz VB++gDunGKvd83+WPgJ906wGVhJIj2karnTaKW8gEs7n01ixF7tf00mVApi4DvB59NzA sA6ws67XNfJt9aBaE3prDbFMURJm9kVflrZ17ZoPlldZp49UncFxCcOBTUN75Szvu82d kP0g== X-Gm-Message-State: AOAM531VqgsWCFUPn+BnhtD0X12AHmZHGWsmv2CPQ2i/T6OOKlUNu+w+ n4vkDJOX5XN7u8Iz2FzCRwuImX4vtp4IsYpXEFXJkPo0wRI= X-Google-Smtp-Source: ABdhPJx7648/4PXpu3ZgzvyvOc2W5dpZ6AvyZFpA/3x45x2epTaio5fjE7sy6aVZnLbSIK1PkpjnqK6hdWDVWcyLtvI= X-Received: by 2002:a05:6512:1283:b0:44a:5e15:cd37 with SMTP id u3-20020a056512128300b0044a5e15cd37mr28951137lfs.176.1649854721767; Wed, 13 Apr 2022 05:58:41 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Yichao Yu Date: Wed, 13 Apr 2022 08:58:30 -0400 Message-ID: Subject: Re: Kernel perf counter support (for apple M1 and others) To: linux-arm-kernel@lists.infradead.org Cc: khuong@os.amperecomputing.com, will@kernel.org, mark.rutland@arm.com, Frank.li@nxp.com, zhangshaokun@hisilicon.com, liuqi115@huawei.com, john.garry@huawei.com, Mathieu Poirier , Leo Yan , marc.zyngier@arm.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220413_055849_255436_C084BEFB X-CRM114-Status: GOOD ( 37.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > I am playing with the performance counters on the apple M1 chip from > linux with the hope that it could help making userspace tools like > perf and rr works on the M1. However, I was told that none of these > info should go into the kernel (not even raw event names) and the > userspace should only use the raw event numbers instead of > PERF_TYPE_HARDWARE even for events that have a canonical counterpart. > > Although I'm not planning to submit any kernel patches anytime soon > and I'm mostly interested in running the test right now, I do want to > know what I should expect in the long term on the userspace side. I > was told to ask about this on "the list" (and I'm hoping this is the > right one after browsing through MAINTAINERS) instead. There are a few > issues/questions, not all of which are related to M1/asymmetric > systems. For context, see > https://oftc.irclog.whitequark.org/asahi-dev/2022-03-30 (there also > happens to be no other discussion on the channel that day) > > 1. Is it acceptable (to either kernel or perf source) to submit > patches that are based on a14.plist from macOS. I have personally > never looked at it but if it is acceptable then there's little point > doing the experiment I was doing (apart from the fun doing so and as a > practice to understand the system). > > 2. Should the kernel provide names for hardware events? Here I'm > talking about things under > `/sys/bus/event_source/devices//events` which I assume is > provided by the kernel (that or my understanding of sysfs has been > fundamentally wrong/out-of-date...). Based on the fact that the > current pmu kernel driver for the M1 does provide this and this > comment https://github.com/torvalds/linux/blob/e8b767f5e04097aaedcd6e06e2270f9fe5282696/drivers/perf/apple_m1_cpu_pmu.c#L31 > I assume it's desired. This would also agree with what I've observed > on other (including non-x86) systems. If this is the case, I assume > the kernel driver for the M1 PMU isn't fully "done" yet. > > 3. For counting events on a system with asymmetric cores. > I understand that if the system contains multiple processors of > different characteristics, it may not make sense to provide a counter > that counts events on both (or all) types of cores. However, there are > events (PERF_COUNT_HW_INSTRUCTIONS and > PERF_COUNT_HW_BRANCH_INSTRUCTIONS at the least) that shouldn't really > be affected by this (and in fact, any counters that counts events > visible directly to the software/userspace). I want to even say that > branch misses/cache reference/misses might be in this category as well > although certainly not as clear cut. > > 4. There are other events that may not make as much sense to combine > (cycles for example). However, I feel like a combined cycle count > isn't going to be much tricker to use given that the cycle count on a > single core is still affected by frequency scaling and it can still be > used correctly by pinning the thread. > > The main reasons I'm asking about 3 and 4 is that > 1. Right now, even to just count instructions without pinning the > thread, I need to create two counters. > 2. Even if the number isn't exactly accurate, it can still be useful > as a general guideline. Right now, even if I just want to do a quick > check, I still need to manually specify a dozen of events in `perf > stat -e` rather than simply using `perf stat` (to make it worse, perf > doesn't even provide any useful warning about it). It is also much > harder to do things generically (which is at least partially because > of the lack of documentation....). Anyone got any input on this? Over at https://rr-project.org/, it would be really nice if some counters can be handled transparently when the process migrates between cores. > > > Yichao Yu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel