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From: Rick Chen <rickchen36@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/9] riscv: ax25: Create a simple-bus driver for the soc node
Date: Wed, 10 Apr 2019 17:30:12 +0800	[thread overview]
Message-ID: <CAN5B=e+N3zyLaF+hwOOFVjs=nNLwCA==rL2H7RCZRyZ5kSH40Q@mail.gmail.com> (raw)
In-Reply-To: <58c31e573276b2054dc9f97ec2bc4cb3b38bf0e8.camel@aisec.fraunhofer.de>

Hi Lukas

Auer, Lukas <lukas.auer@aisec.fraunhofer.de> 於 2019年4月10日 週三 下午5:21寫道:
>
> Hi Rick,
>
> On Wed, 2019-04-10 at 17:05 +0800, Rick Chen wrote:
> > Hi Bin and Lukas
> >
> > Bin Meng <bmeng.cn@gmail.com> 於 2019年3月21日 週四 下午5:17寫道:
> > > Hi Rick,
> > >
> > > On Thu, Mar 21, 2019 at 5:00 PM Rick Chen <rickchen36@gmail.com> wrote:
> > > > Bin Meng <bmeng.cn@gmail.com> 於 2019年3月21日 週四 下午4:49寫道:
> > > > > Hi Rick,
> > > > >
> > > > > On Thu, Mar 21, 2019 at 4:27 PM Rick Chen <rickchen36@gmail.com> wrote:
> > > > > > Hi Bin
> > > > > >
> > > > > > Bin Meng <bmeng.cn@gmail.com> 於 2019年3月21日 週四 下午3:01寫道:
> > > > > > > Hi Rick,
> > > > > > >
> > > > > > > On Thu, Mar 21, 2019 at 2:49 PM Rick Chen <rickchen36@gmail.com> wrote:
> > > > > > > > Hi Bin
> > > > > > > >
> > > > > > > > Bin Meng <bmeng.cn@gmail.com> 於 2019年3月20日 週三 下午3:22寫道:
> > > > > > > > > Hi Rick,
> > > > > > > > >
> > > > > > > > > On Tue, Mar 19, 2019 at 5:11 PM Andes <uboot@andestech.com> wrote:
> > > > > > > > > > From: Rick Chen <rick@andestech.com>
> > > > > > > > > >
> > > > > > > > > > To enumerate devices on the /soc/ node, create a "simple-bus"
> > > > > > > > > > driver to match "andestech,riscv-ae350-soc".
> > > > > > > > > >
> > > > > > > > >
> > > > > > > > > Could we change the /soc/ node compatible string to "simple-bus"
> > > > > > > > > instead? The QEMU 'virt' created a bad example and we should stop the
> > > > > > > > > contamination.
> > > > > > > > >
> > > > > > > >
> > > > > > > > Do you mean change the
> > > > > > > > .compatible = "andestech,riscv-ae350-soc",
> > > > > > > > as "simple-bus" ???
> > > > > > >
> > > > > > > Yes, I mean changing the /soc/ node compatible string in
> > > > > > > arch/riscv/dts/ae350_{32,64}.dts to "simpble-bus".
> > > > > > >
> > > > > >
> > > > > > So you mean we shall have only riscv simple bus driver.
> > > > > > We shall remove
> > > > > > U_BOOT_DRIVER(riscv_virtio_soc) in /arch/riscv/cpu/generic/cpu.c
> > > > > > U_BOOT_DRIVER(riscv_ae350_soc_ids) in /arch/riscv/cpu/ax25/cpu.c
> > > > > > and add
> > > > > > static const struct udevice_id riscv_simple_bus_ids[] = {
> > > > > > {
> > > > > > .compatible = "simple-bus",
> > > > > > },
> > > > > > { }
> > > > > > };
> > > > > >
> > > > > > U_BOOT_DRIVER(riscv_simple_bus_ids) = {
> > > > > > .name = "simple-bus",
> > > > > > .id = UCLASS_SIMPLE_BUS,
> > > > > > .of_match = riscv_simple_bus_ids,
> > > > > > .flags = DM_FLAG_PRE_RELOC,
> > > > > > };
> > > > > >
> > > > > > Does it right ?
> > > > >
> > > > > No, you don't need add anything to the RISC-V codes. U-Boot provides a
> > > > > simple-bus driver and all you need do is to use "simple-bus" in your
> > > > > DTS files.
> > > > >
> > > >
> > > > But if I only use "simple-bus" in DTS file.
> > > > It will fail in syscon_get_first_range that can not get correct
> > > > information from reg.
> > >
> > > Yes, we should fix "simple-bus" driver. See discussion in
> > > https://patchwork.ozlabs.org/patch/1039493/
> >
> > The series has been pull into master by Tom.
> >
> > Can you fix the "simple-bus" driver ASAP.
> > AE350 will encounter the problem as below with the latest u-boot-riscv
> >
> > U-Boot 2019.04-rc4-07392-g48b90d9 (Apr 10 2019 - 16:27:39 +0800)
> >
> > DRAM:  1 GiB
> > Cannot send IPI to hart 1
> > Relocation of secondary harts has failed, error -19
> > ### ERROR ### Please RESET the board ###
> >
>
> Yes, I will send the patch later today.

Thanks a lot.

Sincerely,
Rick

>
> Thanks,
> Lukas

  reply	other threads:[~2019-04-10  9:30 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-19  9:07 [U-Boot] [PATCH 0/9] AE350 SMP support RISC-V Andes
2019-03-19  9:07 ` [U-Boot] [PATCH 1/9] riscv: ax25: Create a simple-bus driver for the soc node Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  6:49     ` Rick Chen
2019-03-21  7:01       ` Bin Meng
2019-03-21  8:28         ` Rick Chen
2019-03-21  8:49           ` Bin Meng
2019-03-21  9:01             ` Rick Chen
2019-03-21  9:16               ` Bin Meng
2019-04-10  9:05                 ` Rick Chen
2019-04-10  9:21                   ` Auer, Lukas
2019-04-10  9:30                     ` Rick Chen [this message]
2019-03-19  9:07 ` [U-Boot] [PATCH 2/9] riscv: Add a SYSCON driver for Andestech's PLIC Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  7:04     ` Rick Chen
2019-03-21  7:32       ` Bin Meng
2019-03-21  8:39         ` Rick Chen
2019-03-21 16:24           ` Troy Benjegerdes
2019-03-19  9:07 ` [U-Boot] [PATCH 3/9] riscv: Add a SYSCON driver for Andestech's PLMT Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  8:41     ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 4/9] riscv: ae350: initialize PLIC Andes
2019-03-19  9:07 ` [U-Boot] [PATCH 5/9] riscv: ae350: disable ATCPIT100 timer Andes
2019-03-20  7:22   ` Bin Meng
2019-03-19  9:07 ` [U-Boot] [PATCH 6/9] riscv: ax25: Add platform-specific Kconfig options Andes
2019-03-20  7:22   ` Bin Meng
2019-03-19  9:07 ` [U-Boot] [PATCH 7/9] riscv: ax25: Andes specific cache shall only support in M-mode Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  8:42     ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 8/9] riscv: dts: ae350 support SMP Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  8:51     ` Rick Chen
2019-03-21  9:15       ` Bin Meng
2019-03-21  9:38         ` Rick Chen
2019-03-21 10:12           ` Bin Meng
2019-03-21 10:16             ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 9/9] riscv: ae350: enable SMP Andes
2019-03-20  7:22   ` Bin Meng

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