* [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion
@ 2020-12-22 6:22 Pragnesh Patel
2020-12-22 6:22 ` [PATCH v2 2/2] riscv: timer: Add support for an early timer Pragnesh Patel
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Pragnesh Patel @ 2020-12-22 6:22 UTC (permalink / raw)
To: u-boot
When tracing functions is enabled this adds calls to
__cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
functions.
__cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
timer_get_us() to record the entry and exit time.
initr_dm() will make gd->dm_root = NULL and gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.
So select TIMER_EARLY when tracing got enabled.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
---
Changes in v2:
- new patch
lib/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/Kconfig b/lib/Kconfig
index 7673d2e4e0..671386963a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -210,6 +210,7 @@ config BITREVERSE
config TRACE
bool "Support for tracing of function calls and timing"
imply CMD_TRACE
+ select TIMER_EARLY
help
Enables function tracing within U-Boot. This allows recording of call
traces including timing information. The command can write data to
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
2020-12-22 6:22 [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion Pragnesh Patel
@ 2020-12-22 6:22 ` Pragnesh Patel
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D556F@ATCPCS16.andestech.com>
2020-12-29 3:31 ` [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion Simon Glass
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D5564@ATCPCS16.andestech.com>
2 siblings, 1 reply; 10+ messages in thread
From: Pragnesh Patel @ 2020-12-22 6:22 UTC (permalink / raw)
To: u-boot
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
---
Changes in v2:
- make u-boot compile for qemu (include/configs/qemu-riscv.h)
drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
include/configs/ax25-ae350.h | 5 +++++
include/configs/qemu-riscv.h | 5 +++++
include/configs/sifive-fu540.h | 5 +++++
6 files changed, 75 insertions(+), 3 deletions(-)
diff --git a/drivers/timer/andes_plmt_timer.c b/drivers/timer/andes_plmt_timer.c
index cec86718c7..74b795c97a 100644
--- a/drivers/timer/andes_plmt_timer.c
+++ b/drivers/timer/andes_plmt_timer.c
@@ -17,11 +17,30 @@
/* mtime register */
#define MTIME_REG(base) ((ulong)(base))
-static u64 andes_plmt_get_count(struct udevice *dev)
+static u64 notrace andes_plmt_get_count(struct udevice *dev)
{
return readq((void __iomem *)MTIME_REG(dev->priv));
}
+#if CONFIG_IS_ENABLED(RISCV_MMODE)
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+ return RISCV_MMODE_TIMER_FREQ;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+ return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
+}
+#endif
+
static const struct timer_ops andes_plmt_ops = {
.get_count = andes_plmt_get_count,
};
diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
index 21ae184057..a0f71ca897 100644
--- a/drivers/timer/riscv_timer.c
+++ b/drivers/timer/riscv_timer.c
@@ -16,7 +16,7 @@
#include <timer.h>
#include <asm/csr.h>
-static u64 riscv_timer_get_count(struct udevice *dev)
+static u64 notrace riscv_timer_get_count(struct udevice *dev)
{
__maybe_unused u32 hi, lo;
@@ -31,6 +31,25 @@ static u64 riscv_timer_get_count(struct udevice *dev)
return ((u64)hi << 32) | lo;
}
+#if CONFIG_IS_ENABLED(RISCV_SMODE)
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+ return RISCV_SMODE_TIMER_FREQ;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+ return riscv_timer_get_count(NULL);
+}
+#endif
+
static int riscv_timer_probe(struct udevice *dev)
{
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
diff --git a/drivers/timer/sifive_clint_timer.c b/drivers/timer/sifive_clint_timer.c
index 00ce0f08d6..9ae05a0e7e 100644
--- a/drivers/timer/sifive_clint_timer.c
+++ b/drivers/timer/sifive_clint_timer.c
@@ -14,11 +14,30 @@
/* mtime register */
#define MTIME_REG(base) ((ulong)(base) + 0xbff8)
-static u64 sifive_clint_get_count(struct udevice *dev)
+static u64 notrace sifive_clint_get_count(struct udevice *dev)
{
return readq((void __iomem *)MTIME_REG(dev->priv));
}
+#if CONFIG_IS_ENABLED(RISCV_MMODE)
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+ return RISCV_MMODE_TIMER_FREQ;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+ return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
+}
+#endif
+
static const struct timer_ops sifive_clint_ops = {
.get_count = sifive_clint_get_count,
};
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index b2606e794d..bd9c371f83 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -17,6 +17,11 @@
#endif
#endif
+#define RISCV_MMODE_TIMERBASE 0xe6000000
+#define RISCV_MMODE_TIMER_FREQ 60000000
+
+#define RISCV_SMODE_TIMER_FREQ 60000000
+
/*
* CPU and Board Configuration Options
*/
diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
index a2f33587c2..5291de83f8 100644
--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
@@ -29,6 +29,11 @@
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
+#define RISCV_MMODE_TIMERBASE 0x2000000
+#define RISCV_MMODE_TIMER_FREQ 1000000
+
+#define RISCV_SMODE_TIMER_FREQ 1000000
+
/* Environment options */
#ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
index c1c79db147..0d69d1c548 100644
--- a/include/configs/sifive-fu540.h
+++ b/include/configs/sifive-fu540.h
@@ -36,6 +36,11 @@
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
+#define RISCV_MMODE_TIMERBASE 0x2000000
+#define RISCV_MMODE_TIMER_FREQ 1000000
+
+#define RISCV_SMODE_TIMER_FREQ 1000000
+
/* Environment options */
#ifndef CONFIG_SPL_BUILD
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion
2020-12-22 6:22 [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion Pragnesh Patel
2020-12-22 6:22 ` [PATCH v2 2/2] riscv: timer: Add support for an early timer Pragnesh Patel
@ 2020-12-29 3:31 ` Simon Glass
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D5564@ATCPCS16.andestech.com>
2 siblings, 0 replies; 10+ messages in thread
From: Simon Glass @ 2020-12-29 3:31 UTC (permalink / raw)
To: u-boot
On Mon, 21 Dec 2020 at 23:23, Pragnesh Patel <pragnesh.patel@sifive.com> wrote:
>
> When tracing functions is enabled this adds calls to
> __cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
> functions.
>
> __cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
> timer_get_us() to record the entry and exit time.
>
> initr_dm() will make gd->dm_root = NULL and gd->timer = NULL, so
> timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
> indefinite recursion.
>
> So select TIMER_EARLY when tracing got enabled.
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> ---
>
> Changes in v2:
> - new patch
>
> lib/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D5564@ATCPCS16.andestech.com>
@ 2020-12-30 6:38 ` Rick Chen
0 siblings, 0 replies; 10+ messages in thread
From: Rick Chen @ 2020-12-30 6:38 UTC (permalink / raw)
To: u-boot
> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> Sent: Tuesday, December 22, 2020 2:23 PM
> To: u-boot at lists.denx.de
> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Simon Glass; Stefan Roese; Joao Marcos Costa; Reuben Dowle; Weijie Gao; Marcin Juszkiewicz; Michael Walle; Marek Szyprowski; Keerthy
> Subject: [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion
>
> When tracing functions is enabled this adds calls to
> __cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
> functions.
>
> __cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
> timer_get_us() to record the entry and exit time.
>
> initr_dm() will make gd->dm_root = NULL and gd->timer = NULL, so
> timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
> indefinite recursion.
>
> So select TIMER_EARLY when tracing got enabled.
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> ---
>
> Changes in v2:
> - new patch
>
> lib/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Rick Chen <rick@andestech.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D556F@ATCPCS16.andestech.com>
@ 2020-12-30 6:40 ` Rick Chen
2021-01-05 1:37 ` Rick Chen
0 siblings, 1 reply; 10+ messages in thread
From: Rick Chen @ 2020-12-30 6:40 UTC (permalink / raw)
To: u-boot
> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> Sent: Tuesday, December 22, 2020 2:23 PM
> To: u-boot at lists.denx.de
> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
>
> Added support for timer_early_get_count() and timer_early_get_rate()
> This is mostly useful in tracing.
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> ---
>
> Changes in v2:
> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
>
> drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
> drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
> drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
> include/configs/ax25-ae350.h | 5 +++++
> include/configs/qemu-riscv.h | 5 +++++
> include/configs/sifive-fu540.h | 5 +++++
> 6 files changed, 75 insertions(+), 3 deletions(-)
Reviewed-by: Rick Chen <rick@andestech.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
2020-12-30 6:40 ` Rick Chen
@ 2021-01-05 1:37 ` Rick Chen
2021-01-05 1:42 ` Sean Anderson
0 siblings, 1 reply; 10+ messages in thread
From: Rick Chen @ 2021-01-05 1:37 UTC (permalink / raw)
To: u-boot
Hi Pragnesh
> > From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> > Sent: Tuesday, December 22, 2020 2:23 PM
> > To: u-boot at lists.denx.de
> > Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
> > Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
> >
> > Added support for timer_early_get_count() and timer_early_get_rate()
> > This is mostly useful in tracing.
> >
> > Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> > ---
> >
> > Changes in v2:
> > - make u-boot compile for qemu (include/configs/qemu-riscv.h)
> >
> > drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
> > drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
> > drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
> > include/configs/ax25-ae350.h | 5 +++++
> > include/configs/qemu-riscv.h | 5 +++++
> > include/configs/sifive-fu540.h | 5 +++++
> > 6 files changed, 75 insertions(+), 3 deletions(-)
>
> Reviewed-by: Rick Chen <rick@andestech.com>
Please check about the CI failure item:
https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578
Thanks,
Rick
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
2021-01-05 1:37 ` Rick Chen
@ 2021-01-05 1:42 ` Sean Anderson
2021-01-05 7:39 ` Pragnesh Patel
0 siblings, 1 reply; 10+ messages in thread
From: Sean Anderson @ 2021-01-05 1:42 UTC (permalink / raw)
To: u-boot
On 1/4/21 8:37 PM, Rick Chen wrote:
> Hi Pragnesh
>
>>> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
>>> Sent: Tuesday, December 22, 2020 2:23 PM
>>> To: u-boot at lists.denx.de
>>> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
>>> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
>>>
>>> Added support for timer_early_get_count() and timer_early_get_rate()
>>> This is mostly useful in tracing.
>>>
>>> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
>>> ---
>>>
>>> Changes in v2:
>>> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
>>>
>>> drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
>>> drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
>>> drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
>>> include/configs/ax25-ae350.h | 5 +++++
>>> include/configs/qemu-riscv.h | 5 +++++
>>> include/configs/sifive-fu540.h | 5 +++++
>>> 6 files changed, 75 insertions(+), 3 deletions(-)
>>
>> Reviewed-by: Rick Chen <rick@andestech.com>
>
> Please check about the CI failure item:
> https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578
404 for me (though I suspect it's really a 403).
--Sean
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
2021-01-05 1:42 ` Sean Anderson
@ 2021-01-05 7:39 ` Pragnesh Patel
2021-01-06 1:58 ` Rick Chen
0 siblings, 1 reply; 10+ messages in thread
From: Pragnesh Patel @ 2021-01-05 7:39 UTC (permalink / raw)
To: u-boot
On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson <seanga2@gmail.com> wrote:
>
> On 1/4/21 8:37 PM, Rick Chen wrote:
> > Hi Pragnesh
> >
> >>> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> >>> Sent: Tuesday, December 22, 2020 2:23 PM
> >>> To: u-boot at lists.denx.de
> >>> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
> >>> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
> >>>
> >>> Added support for timer_early_get_count() and timer_early_get_rate()
> >>> This is mostly useful in tracing.
> >>>
> >>> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> >>> ---
> >>>
> >>> Changes in v2:
> >>> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
> >>>
> >>> drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
> >>> drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
> >>> drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
> >>> include/configs/ax25-ae350.h | 5 +++++
> >>> include/configs/qemu-riscv.h | 5 +++++
> >>> include/configs/sifive-fu540.h | 5 +++++
> >>> 6 files changed, 75 insertions(+), 3 deletions(-)
> >>
> >> Reviewed-by: Rick Chen <rick@andestech.com>
> >
> > Please check about the CI failure item:
> > https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578
>
> 404 for me (though I suspect it's really a 403).
404 for me also.
>
> --Sean
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
2021-01-05 7:39 ` Pragnesh Patel
@ 2021-01-06 1:58 ` Rick Chen
2021-01-10 12:16 ` Pragnesh Patel
0 siblings, 1 reply; 10+ messages in thread
From: Rick Chen @ 2021-01-06 1:58 UTC (permalink / raw)
To: u-boot
Hi Pragnesh
> On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson <seanga2@gmail.com> wrote:
> >
> > On 1/4/21 8:37 PM, Rick Chen wrote:
> > > Hi Pragnesh
> > >
> > >>> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> > >>> Sent: Tuesday, December 22, 2020 2:23 PM
> > >>> To: u-boot at lists.denx.de
> > >>> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
> > >>> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
> > >>>
> > >>> Added support for timer_early_get_count() and timer_early_get_rate()
> > >>> This is mostly useful in tracing.
> > >>>
> > >>> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> > >>> ---
> > >>>
> > >>> Changes in v2:
> > >>> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
> > >>>
> > >>> drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
> > >>> drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
> > >>> drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
> > >>> include/configs/ax25-ae350.h | 5 +++++
> > >>> include/configs/qemu-riscv.h | 5 +++++
> > >>> include/configs/sifive-fu540.h | 5 +++++
> > >>> 6 files changed, 75 insertions(+), 3 deletions(-)
> > >>
> > >> Reviewed-by: Rick Chen <rick@andestech.com>
> > >
> > > Please check about the CI failure item:
> > > https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578
> >
> > 404 for me (though I suspect it's really a 403).
>
> 404 for me also.
>
Followings are the errors from CI:
...
...
+====================================================
562 riscv: + microchip_mpfs_icicle
563+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_rate':
564+drivers/timer/sifive_clint_timer.c:28:9: error:
'RISCV_MMODE_TIMER_FREQ' undeclared (first use in this function)
565+ 28 | return RISCV_MMODE_TIMER_FREQ;
566+ | ^~~~~~~~~~~~~~~~~~~~~~
567+drivers/timer/sifive_clint_timer.c:28:9: note: each undeclared
identifier is reported only once for each function it appears in
568+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_count':
569+drivers/timer/sifive_clint_timer.c:37:41: error:
'RISCV_MMODE_TIMERBASE' undeclared (first use in this function)
570+ 37 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
571+ | ^~~~~~~~~~~~~~~~~~~~~
572+drivers/timer/sifive_clint_timer.c:15:36: note: in definition of
macro 'MTIME_REG'
573+ 15 | #define MTIME_REG(base) ((ulong)(base) + 0xbff8)
574+ | ^~~~
575+drivers/timer/sifive_clint_timer.c:29:1: error: control reaches
end of non-void function [-Werror=return-type]
576+ 29 | }
577+ | ^
578+drivers/timer/sifive_clint_timer.c:38:1: error: control reaches
end of non-void function [-Werror=return-type]
579+ 38 | }
580+cc1: all warnings being treated as errors
581+make[3]: *** [drivers/timer/sifive_clint_timer.o] Error 1
582+make[2]: *** [drivers/timer] Error 2
583+make[1]: *** [drivers] Error 2
584+make: *** [sub-make] Error 2
585 riscv: + sipeed_maix_bitm
586+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_rate':
587+drivers/timer/sifive_clint_timer.c:28:9: error:
'RISCV_MMODE_TIMER_FREQ' undeclared (first use in this function)
588+ 28 | return RISCV_MMODE_TIMER_FREQ;
589+ | ^~~~~~~~~~~~~~~~~~~~~~
590+drivers/timer/sifive_clint_timer.c:28:9: note: each undeclared
identifier is reported only once for each function it appears in
591+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_count':
592+drivers/timer/sifive_clint_timer.c:37:41: error:
'RISCV_MMODE_TIMERBASE' undeclared (first use in this function)
593+ 37 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
594+ | ^~~~~~~~~~~~~~~~~~~~~
595+drivers/timer/sifive_clint_timer.c:15:36: note: in definition of
macro 'MTIME_REG'
596+ 15 | #define MTIME_REG(base) ((ulong)(base) + 0xbff8)
597+ | ^~~~
598+drivers/timer/sifive_clint_timer.c:29:1: error: control reaches
end of non-void function [-Werror=return-type]
599+ 29 | }
600+ | ^
601+drivers/timer/sifive_clint_timer.c:38:1: error: control reaches
end of non-void function [-Werror=return-type]
602+ 38 | }
603+cc1: all warnings being treated as errors
604+make[3]: *** [drivers/timer/sifive_clint_timer.o] Error 1
605+make[2]: *** [drivers/timer] Error 2
606+make[1]: *** [drivers] Error 2
607+make: *** [sub-make] Error 2
608 riscv: + sipeed_maix_smode
609+drivers/timer/riscv_timer.c: In function 'timer_early_get_rate':
610+drivers/timer/riscv_timer.c:40:9: error: 'RISCV_SMODE_TIMER_FREQ'
undeclared (first use in this function)
611+ 40 | return RISCV_SMODE_TIMER_FREQ;
612+ | ^~~~~~~~~~~~~~~~~~~~~~
613+drivers/timer/riscv_timer.c:40:9: note: each undeclared identifier
is reported only once for each function it appears in
614+drivers/timer/riscv_timer.c:41:1: error: control reaches end of
non-void function [-Werror=return-type]
615+ 41 | }
616+ | ^
...
...
Thanks,
Rick
> >
> > --Sean
> >
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] riscv: timer: Add support for an early timer
2021-01-06 1:58 ` Rick Chen
@ 2021-01-10 12:16 ` Pragnesh Patel
0 siblings, 0 replies; 10+ messages in thread
From: Pragnesh Patel @ 2021-01-10 12:16 UTC (permalink / raw)
To: u-boot
Hi Rick,
On Wed, Jan 6, 2021 at 7:28 AM Rick Chen <rickchen36@gmail.com> wrote:
>
> Hi Pragnesh
>
> > On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson <seanga2@gmail.com> wrote:
> > >
> > > On 1/4/21 8:37 PM, Rick Chen wrote:
> > > > Hi Pragnesh
> > > >
> > > >>> From: Pragnesh Patel [mailto:pragnesh.patel at sifive.com]
> > > >>> Sent: Tuesday, December 22, 2020 2:23 PM
> > > >>> To: u-boot at lists.denx.de
> > > >>> Cc: atish.patra at wdc.com; palmerdabbelt at google.com; bmeng.cn at gmail.com; paul.walmsley at sifive.com; anup.patel at wdc.com; sagar.kadam at sifive.com; Rick Jian-Zhi Chen(???); pragnesh.patel at openfive.com; Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Claudiu Beznea; Simon Glass
> > > >>> Subject: [PATCH v2 2/2] riscv: timer: Add support for an early timer
> > > >>>
> > > >>> Added support for timer_early_get_count() and timer_early_get_rate()
> > > >>> This is mostly useful in tracing.
> > > >>>
> > > >>> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> > > >>> ---
> > > >>>
> > > >>> Changes in v2:
> > > >>> - make u-boot compile for qemu (include/configs/qemu-riscv.h)
> > > >>>
> > > >>> drivers/timer/andes_plmt_timer.c | 21 ++++++++++++++++++++-
> > > >>> drivers/timer/riscv_timer.c | 21 ++++++++++++++++++++-
> > > >>> drivers/timer/sifive_clint_timer.c | 21 ++++++++++++++++++++-
> > > >>> include/configs/ax25-ae350.h | 5 +++++
> > > >>> include/configs/qemu-riscv.h | 5 +++++
> > > >>> include/configs/sifive-fu540.h | 5 +++++
> > > >>> 6 files changed, 75 insertions(+), 3 deletions(-)
> > > >>
> > > >> Reviewed-by: Rick Chen <rick@andestech.com>
> > > >
> > > > Please check about the CI failure item:
> > > > https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/jobs/196578
> > >
> > > 404 for me (though I suspect it's really a 403).
> >
> > 404 for me also.
> >
>
> Followings are the errors from CI:
>
> ...
> ...
> +====================================================
> 562 riscv: + microchip_mpfs_icicle
> 563+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_rate':
> 564+drivers/timer/sifive_clint_timer.c:28:9: error:
> 'RISCV_MMODE_TIMER_FREQ' undeclared (first use in this function)
> 565+ 28 | return RISCV_MMODE_TIMER_FREQ;
> 566+ | ^~~~~~~~~~~~~~~~~~~~~~
> 567+drivers/timer/sifive_clint_timer.c:28:9: note: each undeclared
> identifier is reported only once for each function it appears in
> 568+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_count':
> 569+drivers/timer/sifive_clint_timer.c:37:41: error:
> 'RISCV_MMODE_TIMERBASE' undeclared (first use in this function)
> 570+ 37 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> 571+ | ^~~~~~~~~~~~~~~~~~~~~
> 572+drivers/timer/sifive_clint_timer.c:15:36: note: in definition of
> macro 'MTIME_REG'
> 573+ 15 | #define MTIME_REG(base) ((ulong)(base) + 0xbff8)
> 574+ | ^~~~
> 575+drivers/timer/sifive_clint_timer.c:29:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 576+ 29 | }
> 577+ | ^
> 578+drivers/timer/sifive_clint_timer.c:38:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 579+ 38 | }
> 580+cc1: all warnings being treated as errors
> 581+make[3]: *** [drivers/timer/sifive_clint_timer.o] Error 1
> 582+make[2]: *** [drivers/timer] Error 2
> 583+make[1]: *** [drivers] Error 2
> 584+make: *** [sub-make] Error 2
> 585 riscv: + sipeed_maix_bitm
> 586+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_rate':
> 587+drivers/timer/sifive_clint_timer.c:28:9: error:
> 'RISCV_MMODE_TIMER_FREQ' undeclared (first use in this function)
> 588+ 28 | return RISCV_MMODE_TIMER_FREQ;
> 589+ | ^~~~~~~~~~~~~~~~~~~~~~
> 590+drivers/timer/sifive_clint_timer.c:28:9: note: each undeclared
> identifier is reported only once for each function it appears in
> 591+drivers/timer/sifive_clint_timer.c: In function 'timer_early_get_count':
> 592+drivers/timer/sifive_clint_timer.c:37:41: error:
> 'RISCV_MMODE_TIMERBASE' undeclared (first use in this function)
> 593+ 37 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> 594+ | ^~~~~~~~~~~~~~~~~~~~~
> 595+drivers/timer/sifive_clint_timer.c:15:36: note: in definition of
> macro 'MTIME_REG'
> 596+ 15 | #define MTIME_REG(base) ((ulong)(base) + 0xbff8)
> 597+ | ^~~~
> 598+drivers/timer/sifive_clint_timer.c:29:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 599+ 29 | }
> 600+ | ^
> 601+drivers/timer/sifive_clint_timer.c:38:1: error: control reaches
> end of non-void function [-Werror=return-type]
> 602+ 38 | }
> 603+cc1: all warnings being treated as errors
> 604+make[3]: *** [drivers/timer/sifive_clint_timer.o] Error 1
> 605+make[2]: *** [drivers/timer] Error 2
> 606+make[1]: *** [drivers] Error 2
> 607+make: *** [sub-make] Error 2
> 608 riscv: + sipeed_maix_smode
> 609+drivers/timer/riscv_timer.c: In function 'timer_early_get_rate':
> 610+drivers/timer/riscv_timer.c:40:9: error: 'RISCV_SMODE_TIMER_FREQ'
> undeclared (first use in this function)
> 611+ 40 | return RISCV_SMODE_TIMER_FREQ;
> 612+ | ^~~~~~~~~~~~~~~~~~~~~~
> 613+drivers/timer/riscv_timer.c:40:9: note: each undeclared identifier
> is reported only once for each function it appears in
> 614+drivers/timer/riscv_timer.c:41:1: error: control reaches end of
> non-void function [-Werror=return-type]
> 615+ 41 | }
> 616+ | ^
Will solve this in v3.
- Pragnesh
> ...
> ...
>
> Thanks,
> Rick
>
> > >
> > > --Sean
> > >
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-01-10 12:16 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-22 6:22 [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion Pragnesh Patel
2020-12-22 6:22 ` [PATCH v2 2/2] riscv: timer: Add support for an early timer Pragnesh Patel
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D556F@ATCPCS16.andestech.com>
2020-12-30 6:40 ` Rick Chen
2021-01-05 1:37 ` Rick Chen
2021-01-05 1:42 ` Sean Anderson
2021-01-05 7:39 ` Pragnesh Patel
2021-01-06 1:58 ` Rick Chen
2021-01-10 12:16 ` Pragnesh Patel
2020-12-29 3:31 ` [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion Simon Glass
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FB28D5564@ATCPCS16.andestech.com>
2020-12-30 6:38 ` Rick Chen
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