From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rick Chen Date: Tue, 27 Nov 2018 14:45:32 +0800 Subject: [U-Boot] [PATCH v5 4/4] riscv: Remove redundant a2 store on DRAM base in start.S In-Reply-To: References: <20181126103910.14457-1-anup@brainfault.org> <20181126103910.14457-5-anup@brainfault.org> <1285af47b99a60926626a52c0f124df80f01a2ed.camel@aisec.fraunhofer.de> <752D002CFF5D0F4FA35C0100F1D73F3FA3A50A96@ATCPCS16.andestech.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > > > > > When we run U-Boot in S-mode the BBL runs from 0x80000000 so this > > > > > two lines corrupts BBL instructions. Hi Anup You said Your patchset based upon git://git.denx.de/u-boot-riscv.git Why you announce this problem in [PATCH v5 4/4] riscv: Remove redundant a2 store on DRAM base in start.S Why you do not find this proble in v1, v2, v3, v4 ? Rick > > > > > > > > > > If this is important for some board then please have it around #ifdef. > > > > > > > > > > > > > Hi Anup > > > > > > > > In the discussion as below : > > > > https://www.mail-archive.com/u-boot at lists.denx.de/msg305880.html > > > > > > > > I try to solve this issue with the aptch > > > > [PATCH] riscv: ax25-ae350: Pass dtb address to u-boot with a1 register > > > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S > > > > - li t0, CONFIG_SYS_SDRAM_BASE > > > > - SREG a2, 0(t0) > > > > > > > > diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c > > > > b/board/AndesTech/ax25-ae350/ax25-ae350.c > > > > void *board_fdt_blob_setup(void) > > > > { > > > > - void **ptr = (void *)CONFIG_SYS_SDRAM_BASE; > > > > + void **ptr = (void *)&prior_stage_fdt_address; > > > > > > > > in the previous pull request. > > > > > > > > But Bin do not agree with that I use prior_stage_fdt_address in > > > > board_fdt_blob_setup( ) > > > > I try to explain why I use it like that way. > > > > Then Bin have not any reply in the following mail. > > > > Finally I decide to drop this patch in the next pull request. > > > > > > > > Hi Bin > > > > > > > > How do you think about I recovery this patch to fix this issue ? > > > > > > Actually, previous booting stage can pass location of FDT stored in flash > > > to U-Boot. U-Boot requires FDT at a DRAM location which it can modify > > > in-place before passing on to Linux kernel so we should relocate the FDT > > > passed by previous booting stage to some board specific DRAM location. > > > > > > My suggestion is as follows: > > > > > > Instead of SDRAM_BASE, we can have new board specific config > > > CONFIG_RISCV_PRIOR_FDT_BASE > > > > > > If CONFIG_RISCV_PRIOR_FDT_BASE is defined/selected by > > > config then in start.S copy-over the FDT from location pointed by > > > "a1" register to location pointed by CONFIG_RISCV_PRIOR_FDT_BASE. > > > > Hi Anup > > It can not achieve dtb delivery at runtime. > > Rick > > > I think you can copy-over FDT in C code too. You don't need to do > > in start.S. > > > > > > > > In your board_fdt_blob_setup(), you can safely do: > > > void **ptr = (void *)CONFIG_RISCV_PRIOR_FDT_BASE; > > > > > > Regards, > > > Anup