From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rick Chen Date: Thu, 23 Jul 2020 10:26:17 +0800 Subject: [PATCH v3 5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC In-Reply-To: <752D002CFF5D0F4FA35C0100F1D73F3FA472A068@ATCPCS16.andestech.com> References: <1594370308-30957-1-git-send-email-sagar.kadam@sifive.com> <1594370308-30957-6-git-send-email-sagar.kadam@sifive.com> <752D002CFF5D0F4FA35C0100F1D73F3FA472A068@ATCPCS16.andestech.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Sagar > From: Sagar Shrikant Kadam [mailto:sagar.kadam at sifive.com] > Sent: Friday, July 10, 2020 4:38 PM > To: u-boot at lists.denx.de > Cc: Rick Jian-Zhi Chen(???); paul.walmsley at sifive.com; palmer at dabbelt.com; anup.patel at wdc.com; atish.patra at wdc.com; lukma at denx.de; pragnesh.patel at sifive.com; bin.meng at windriver.com; jagan at amarulasolutions.com; sjg at chromium.org; twoerner at gmail.com; abrodkin at synopsys.com; Eugeniy.Paltsev at synopsys.com; patrick at blueri.se; weijie.gao at mediatek.com; festevam at gmail.com; Sagar Shrikant Kadam > Subject: [PATCH v3 5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC > > Add necessary defconfig and Kconfig entries to enable SiFive SoC's reset driver so as to utilise U-Boot's reset framework. > > Signed-off-by: Sagar Shrikant Kadam > Reviewed-by: Pragnesh Patel > Reviewed-by: Bin Meng > Tested-by: Bin Meng > --- > configs/sifive_fu540_defconfig | 2 ++ > drivers/reset/Kconfig | 9 +++++++++ > drivers/reset/Makefile | 1 + > 3 files changed, 12 insertions(+) > > diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index 32347c2..12f2469 100644 > --- a/configs/sifive_fu540_defconfig > +++ b/configs/sifive_fu540_defconfig > @@ -20,3 +20,5 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > CONFIG_SPL_CLK=y > CONFIG_DM_MTD=y > +CONFIG_SPL_DM_RESET=y > +CONFIG_DM_RESET=y > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 88d3be1..627f8e8 100644 > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -148,4 +148,13 @@ config RESET_IMX7 > help > Support for reset controller on i.MX7/8 SoCs. > > +config RESET_SIFIVE > + bool "Reset Driver for SiFive SoC's" > + depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540 > + default y > + help > + PRCI module within SiFive SoC's provides mechanism to reset > + different hw blocks like DDR, gemgxl. With this driver we leverage > + U-Boot's reset framework to reset these hardware blocks. > + > endmenu > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 0a044d5..e3c27c4 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o > obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o > obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o > obj-$(CONFIG_RESET_IMX7) += reset-imx7.o > +obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o This patch conflicts with u-boot/master, please rebase. Applying: dt-bindings: prci: add indexes for reset signals available in prci Applying: fu540: prci: use common reset indexes defined in binding header Applying: fu540: dtsi: add reset producer and consumer entries Applying: sifive: reset: add DM based reset driver for SiFive SoC's Applying: configs: reset: fu540: enable dm reset framework for SiFive SoC error: patch failed: drivers/reset/Kconfig:148 error: drivers/reset/Kconfig: patch does not apply error: patch failed: drivers/reset/Makefile:23 error: drivers/reset/Makefile: patch does not apply Patch failed at 0005 configs: reset: fu540: enable dm reset framework for SiFive SoC Thanks, Rick