From: Emil Renner Berthing <emil.renner.berthing@gmail.com>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-riscv <linux-riscv@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -fixes 0/3] Fixes regarding CONFIG_PHYS_RAM_BASE
Date: Wed, 21 Jul 2021 16:12:56 +0200 [thread overview]
Message-ID: <CANBLGcyqOKgoQr3EWvgTKewj9PtbzZ4STOz5KXHm78JQYc0G4w@mail.gmail.com> (raw)
In-Reply-To: <20210721075937.696811-1-alex@ghiti.fr>
On Wed, 21 Jul 2021 at 10:00, Alexandre Ghiti <alex@ghiti.fr> wrote:
>
> The following commits:
>
> 7094e6acaf7a ("riscv: Simplify xip and !xip kernel address conversion macros")
> 9b79878ced8f ("riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED")
>
> expose CONFIG_PHYS_RAM_BASE for all kernel types whereas this value is
> implementation-specific, so that breaks the kernel genericity.
>
> The first patch in this patchset removes the usage of CONFIG_PHYS_RAM_BASE
> by introducing a new global variable that holds this value.
>
> The second patch reverts 9b79878ced8f ("riscv: Remove
> CONFIG_PHYS_RAM_BASE_FIXED").
>
> The last patch is an optimization 'symmetrical' to the one introduced in
> the first patch: this is not a fix, then it is not necessary to pull
> this into -fixes.
Hi Alex,
Thank you, this works fine on my BeagleV Beta board.
If I'm not mistaken after this series all uses of CONFIG_PHYS_RAM if
protected by #ifdef CONFIG_XIP_KERNEL, so maybe we can remove the
middleman, CONFIG_PHYS_RAM_BASE_FIXED, and just let CONFIG_PHYS_RAM
directly depend on CONFIG_XIP_KERNEL.
Don't let that delay this series though. I'd still rather have this
fixed in 5.14 as is.
If it makes any difference you can add this for the series:
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
/Emil
WARNING: multiple messages have this Message-ID
From: Emil Renner Berthing <emil.renner.berthing@gmail.com>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-riscv <linux-riscv@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -fixes 0/3] Fixes regarding CONFIG_PHYS_RAM_BASE
Date: Wed, 21 Jul 2021 16:12:56 +0200 [thread overview]
Message-ID: <CANBLGcyqOKgoQr3EWvgTKewj9PtbzZ4STOz5KXHm78JQYc0G4w@mail.gmail.com> (raw)
In-Reply-To: <20210721075937.696811-1-alex@ghiti.fr>
On Wed, 21 Jul 2021 at 10:00, Alexandre Ghiti <alex@ghiti.fr> wrote:
>
> The following commits:
>
> 7094e6acaf7a ("riscv: Simplify xip and !xip kernel address conversion macros")
> 9b79878ced8f ("riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED")
>
> expose CONFIG_PHYS_RAM_BASE for all kernel types whereas this value is
> implementation-specific, so that breaks the kernel genericity.
>
> The first patch in this patchset removes the usage of CONFIG_PHYS_RAM_BASE
> by introducing a new global variable that holds this value.
>
> The second patch reverts 9b79878ced8f ("riscv: Remove
> CONFIG_PHYS_RAM_BASE_FIXED").
>
> The last patch is an optimization 'symmetrical' to the one introduced in
> the first patch: this is not a fix, then it is not necessary to pull
> this into -fixes.
Hi Alex,
Thank you, this works fine on my BeagleV Beta board.
If I'm not mistaken after this series all uses of CONFIG_PHYS_RAM if
protected by #ifdef CONFIG_XIP_KERNEL, so maybe we can remove the
middleman, CONFIG_PHYS_RAM_BASE_FIXED, and just let CONFIG_PHYS_RAM
directly depend on CONFIG_XIP_KERNEL.
Don't let that delay this series though. I'd still rather have this
fixed in 5.14 as is.
If it makes any difference you can add this for the series:
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
/Emil
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-07-21 14:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 7:59 Alexandre Ghiti
2021-07-21 7:59 ` Alexandre Ghiti
2021-07-21 7:59 ` [PATCH -fixes 1/3] riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion Alexandre Ghiti
2021-07-21 7:59 ` Alexandre Ghiti
2021-07-21 7:59 ` [PATCH -fixes 2/3] Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED" Alexandre Ghiti
2021-07-21 7:59 ` Alexandre Ghiti
2021-07-21 7:59 ` [PATCH -fixes 3/3] riscv: Optimize kernel virtual address conversion macro Alexandre Ghiti
2021-07-21 7:59 ` Alexandre Ghiti
2021-08-07 16:36 ` Palmer Dabbelt
2021-08-07 16:36 ` Palmer Dabbelt
2021-08-07 19:31 ` Alex Ghiti
2021-08-07 19:31 ` Alex Ghiti
2021-08-12 5:23 ` Palmer Dabbelt
2021-08-12 5:23 ` Palmer Dabbelt
2021-08-08 12:27 ` Vitaly Wool
2021-08-08 12:27 ` Vitaly Wool
2021-07-21 14:12 ` Emil Renner Berthing [this message]
2021-07-21 14:12 ` [PATCH -fixes 0/3] Fixes regarding CONFIG_PHYS_RAM_BASE Emil Renner Berthing
2021-07-22 15:29 ` Jisheng Zhang
2021-07-22 15:29 ` Jisheng Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CANBLGcyqOKgoQr3EWvgTKewj9PtbzZ4STOz5KXHm78JQYc0G4w@mail.gmail.com \
--to=emil.renner.berthing@gmail.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--subject='Re: [PATCH -fixes 0/3] Fixes regarding CONFIG_PHYS_RAM_BASE' \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.