From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63D55C433F5 for ; Thu, 2 Sep 2021 20:15:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07F2A61131 for ; Thu, 2 Sep 2021 20:15:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 07F2A61131 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bsdimp.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:47934 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mLt7F-0001Mm-31 for qemu-devel@archiver.kernel.org; Thu, 02 Sep 2021 16:15:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39420) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLt6Q-0000VE-P6 for qemu-devel@nongnu.org; Thu, 02 Sep 2021 16:14:26 -0400 Received: from mail-vs1-xe33.google.com ([2607:f8b0:4864:20::e33]:40758) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLt6O-00056l-C5 for qemu-devel@nongnu.org; Thu, 02 Sep 2021 16:14:26 -0400 Received: by mail-vs1-xe33.google.com with SMTP id d6so2604947vsr.7 for ; Thu, 02 Sep 2021 13:14:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=BRrg+j6QaFlPIv+nFHKyzv4EuLGFfWoBrJtJQBerUOA=; b=AQ62zMGIe0eE2x9iMkuvuKHFOefq6RmwWI8gw6Rit0WZdZH8vaR8nRpso9sONHN1I7 0QfL7Pm66TsAEVldPgg7gKqPFLVJujYS8mMQUgI93n2/hhQKbaMfHO0Qv4DC58bMPR0L vHMaa4HC1v3TBtpMIFGT3vwja3jjFlb6MQPn6toNqTxfJz5QT5z2hSaGC9Y981JCy0Ey NX/R/9jW2mz9df4sYY/sntqKpkQK8nS/X8U1Ng2zue4s6hcs4VQ4hrGaoOoP1gVfnoJb 4jnYteac2ABpAfR8VEEgzCCNoYtpjSYsAPjYc6olmuUOr7HX9v66wuIYp5BZvgaueOnc d8qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=BRrg+j6QaFlPIv+nFHKyzv4EuLGFfWoBrJtJQBerUOA=; b=t0M6Qm9jOURs7UHgsmBTFY3ldpFzoyqAv3M9c+Q8egUhPk/zKf6AeciqZBAAMjPOmW CBEv3Bk1AK6XdiLAglxRvr0B/F3vG04Is99NFLARtx0o9yDA89pjw39I9IKdVefaNrk0 p/QrQEFIBXMfrUZ6dzW3Sx1sgcr6gw3AjCEVnYrpOgEdcGGaB1p389D1wK/ciZr+tgs/ EQUO7GaolV8JRH3xMkx+urohjMBrU5VzSuu+TYjeT+BaBBSk0eMb5PrFmM8KJqD8FoE2 UgOxXUTA8NMEEXmSmDlv1eTkf4v5gyQLU7I6/d4xv1tF2OBFe5HWyydmO7mVPy+y1CIz X1+w== X-Gm-Message-State: AOAM53109JYKBsFEMLNp7VnR6/rU7SA6SvVrt9ncRG9wi3LOCsNd5MKU 6Uwewcx2M5AaXL0yN55H+x1X/i6CXMFTwd+bMrbvLg== X-Google-Smtp-Source: ABdhPJzpyp+gpw72fkLM9kt0rIbF/Cz6NAcQKxVp7RqCOFmso+/X1D1IE/faNY4Iwh3WeF7zQifQbp/0I9r63BMyrkQ= X-Received: by 2002:a67:2dc6:: with SMTP id t189mr3875399vst.49.1630613663130; Thu, 02 Sep 2021 13:14:23 -0700 (PDT) MIME-Version: 1.0 References: <20210902151715.383678-1-f4bug@amsat.org> <20210902151715.383678-5-f4bug@amsat.org> In-Reply-To: <20210902151715.383678-5-f4bug@amsat.org> From: Warner Losh Date: Thu, 2 Sep 2021 14:14:12 -0600 Message-ID: Subject: Re: [RFC PATCH 04/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_exception To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="0000000000002839f105cb08d4b4" Received-SPF: none client-ip=2607:f8b0:4864:20::e33; envelope-from=wlosh@bsdimp.com; helo=mail-vs1-xe33.google.com X-Spam_score_int: 0 X-Spam_score: 0.0 X-Spam_bar: / X-Spam_report: (0.0 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bin Meng , Mark Cave-Ayland , QEMU Developers , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Marek Vasut , Yoshinori Sato , qemu-ppc , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Kyle Evans , Richard Henderson , Greg Kurz , qemu-arm , Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Chris Wulff , Laurent Vivier , Palmer Dabbelt , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --0000000000002839f105cb08d4b4 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Sep 2, 2021 at 9:17 AM Philippe Mathieu-Daud=C3=A9 wrote: > do_interrupt() is sysemu specific. However due to some X86 > specific hack, it is also used in user-mode emulation, which > is why it couldn't be restricted to CONFIG_SOFTMMU (see the > comment around added in commit 78271684719: "cpu: tcg_ops: > move to tcg-cpu-ops.h, keep a pointer in CPUClass"). > Keep the hack but rename the handler as fake_user_exception() > and restrict do_interrupt() to sysemu. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > RFC: Any better name / idea here? > Maybe user_mode_exception()? but I'm not sure that's better... > --- > include/hw/core/tcg-cpu-ops.h | 22 ++++++++++++++-------- > accel/tcg/cpu-exec.c | 4 ++-- > target/i386/tcg/tcg-cpu.c | 6 ++++-- > 3 files changed, 20 insertions(+), 12 deletions(-) > Reviewed-by: Warner Losh > diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.= h > index eab27d0c030..600f0349659 100644 > --- a/include/hw/core/tcg-cpu-ops.h > +++ b/include/hw/core/tcg-cpu-ops.h > @@ -37,14 +37,6 @@ struct TCGCPUOps { > void (*cpu_exec_exit)(CPUState *cpu); > /** @cpu_exec_interrupt: Callback for processing interrupts in > cpu_exec */ > bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); > - /** > - * @do_interrupt: Callback for interrupt handling. > - * > - * note that this is in general SOFTMMU only, but it actually isn't > - * because of an x86 hack (accel/tcg/cpu-exec.c), so we cannot put i= t > - * in the SOFTMMU section in general. > - */ > - void (*do_interrupt)(CPUState *cpu); > /** > * @tlb_fill: Handle a softmmu tlb miss or user-only address fault > * > @@ -61,6 +53,20 @@ struct TCGCPUOps { > void (*debug_excp_handler)(CPUState *cpu); > > #ifdef NEED_CPU_H > +#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386) > + /** > + * @fake_user_exception: Callback for 'fake exception' handling. > + * > + * Simulate 'fake exception' which will be handled outside the > + * cpu execution loop (hack for x86 user mode). > + */ > + void (*fake_user_exception)(CPUState *cpu); > +#else > + /** > + * @do_interrupt: Callback for interrupt handling. > + */ > + void (*do_interrupt)(CPUState *cpu); > +#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */ > #ifdef CONFIG_SOFTMMU > /** > * @do_transaction_failed: Callback for handling failed memory > transactions > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > index e5c0ccd1a2a..3e387c944c5 100644 > --- a/accel/tcg/cpu-exec.c > +++ b/accel/tcg/cpu-exec.c > @@ -651,8 +651,8 @@ static inline bool cpu_handle_exception(CPUState *cpu= , > int *ret) > loop */ > #if defined(TARGET_I386) > CPUClass *cc =3D CPU_GET_CLASS(cpu); > - cc->tcg_ops->do_interrupt(cpu); > -#endif > + cc->tcg_ops->fake_user_exception(cpu); > +#endif /* TARGET_I386 */ > *ret =3D cpu->exception_index; > cpu->exception_index =3D -1; > return true; > diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c > index 93a79a57415..dce800a8953 100644 > --- a/target/i386/tcg/tcg-cpu.c > +++ b/target/i386/tcg/tcg-cpu.c > @@ -73,9 +73,11 @@ static const struct TCGCPUOps x86_tcg_ops =3D { > .cpu_exec_enter =3D x86_cpu_exec_enter, > .cpu_exec_exit =3D x86_cpu_exec_exit, > .cpu_exec_interrupt =3D x86_cpu_exec_interrupt, > - .do_interrupt =3D x86_cpu_do_interrupt, > .tlb_fill =3D x86_cpu_tlb_fill, > -#ifndef CONFIG_USER_ONLY > +#ifdef CONFIG_USER_ONLY > + .fake_user_exception =3D x86_cpu_do_interrupt, > +#else > + .do_interrupt =3D x86_cpu_do_interrupt, > .debug_excp_handler =3D breakpoint_handler, > .debug_check_breakpoint =3D x86_debug_check_breakpoint, > #endif /* !CONFIG_USER_ONLY */ > -- > 2.31.1 > > --0000000000002839f105cb08d4b4 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Sep 2, 2021 at 9:17 AM Philip= pe Mathieu-Daud=C3=A9 <f4bug@amsat.or= g> wrote:
do_interrupt() is sysemu specific. However due to some X86
specific hack, it is also used in user-mode emulation, which
is why it couldn't be restricted to CONFIG_SOFTMMU (see the
comment around added in commit 78271684719: "cpu: tcg_ops:
move to tcg-cpu-ops.h, keep a pointer in CPUClass").
Keep the hack but rename the handler as fake_user_exception()
and restrict do_interrupt() to sysemu.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
RFC: Any better name / idea here?

Maybe= user_mode_exception()? but I'm not sure that's better...
=C2=A0
---
=C2=A0include/hw/core/tcg-cpu-ops.h | 22 ++++++++++++++--------
=C2=A0accel/tcg/cpu-exec.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 4 ++--=
=C2=A0target/i386/tcg/tcg-cpu.c=C2=A0 =C2=A0 =C2=A0|=C2=A0 6 ++++--
=C2=A03 files changed, 20 insertions(+), 12 deletions(-)


Reviewed-by: Warner Losh <imp@bsdimp.com>

=C2=A0
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h<= br> index eab27d0c030..600f0349659 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -37,14 +37,6 @@ struct TCGCPUOps {
=C2=A0 =C2=A0 =C2=A0void (*cpu_exec_exit)(CPUState *cpu);
=C2=A0 =C2=A0 =C2=A0/** @cpu_exec_interrupt: Callback for processing interr= upts in cpu_exec */
=C2=A0 =C2=A0 =C2=A0bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt= _request);
-=C2=A0 =C2=A0 /**
-=C2=A0 =C2=A0 =C2=A0* @do_interrupt: Callback for interrupt handling.
-=C2=A0 =C2=A0 =C2=A0*
-=C2=A0 =C2=A0 =C2=A0* note that this is in general SOFTMMU only, but it ac= tually isn't
-=C2=A0 =C2=A0 =C2=A0* because of an x86 hack (accel/tcg/cpu-exec.c), so we= cannot put it
-=C2=A0 =C2=A0 =C2=A0* in the SOFTMMU section in general.
-=C2=A0 =C2=A0 =C2=A0*/
-=C2=A0 =C2=A0 void (*do_interrupt)(CPUState *cpu);
=C2=A0 =C2=A0 =C2=A0/**
=C2=A0 =C2=A0 =C2=A0 * @tlb_fill: Handle a softmmu tlb miss or user-only ad= dress fault
=C2=A0 =C2=A0 =C2=A0 *
@@ -61,6 +53,20 @@ struct TCGCPUOps {
=C2=A0 =C2=A0 =C2=A0void (*debug_excp_handler)(CPUState *cpu);

=C2=A0#ifdef NEED_CPU_H
+#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386)
+=C2=A0 =C2=A0 /**
+=C2=A0 =C2=A0 =C2=A0* @fake_user_exception: Callback for 'fake excepti= on' handling.
+=C2=A0 =C2=A0 =C2=A0*
+=C2=A0 =C2=A0 =C2=A0* Simulate 'fake exception' which will be hand= led outside the
+=C2=A0 =C2=A0 =C2=A0* cpu execution loop (hack for x86 user mode).
+=C2=A0 =C2=A0 =C2=A0*/
+=C2=A0 =C2=A0 void (*fake_user_exception)(CPUState *cpu);
+#else
+=C2=A0 =C2=A0 /**
+=C2=A0 =C2=A0 =C2=A0* @do_interrupt: Callback for interrupt handling.
+=C2=A0 =C2=A0 =C2=A0*/
+=C2=A0 =C2=A0 void (*do_interrupt)(CPUState *cpu);
+#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
=C2=A0#ifdef CONFIG_SOFTMMU
=C2=A0 =C2=A0 =C2=A0/**
=C2=A0 =C2=A0 =C2=A0 * @do_transaction_failed: Callback for handling failed= memory transactions
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index e5c0ccd1a2a..3e387c944c5 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -651,8 +651,8 @@ static inline bool cpu_handle_exception(CPUState *cpu, = int *ret)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 loop */
=C2=A0#if defined(TARGET_I386)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0CPUClass *cc =3D CPU_GET_CLASS(cpu);
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 cc->tcg_ops->do_interrupt(cpu);
-#endif
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 cc->tcg_ops->fake_user_exception(cpu); +#endif /* TARGET_I386 */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*ret =3D cpu->exception_index;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0cpu->exception_index =3D -1;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return true;
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index 93a79a57415..dce800a8953 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -73,9 +73,11 @@ static const struct TCGCPUOps x86_tcg_ops =3D {
=C2=A0 =C2=A0 =C2=A0.cpu_exec_enter =3D x86_cpu_exec_enter,
=C2=A0 =C2=A0 =C2=A0.cpu_exec_exit =3D x86_cpu_exec_exit,
=C2=A0 =C2=A0 =C2=A0.cpu_exec_interrupt =3D x86_cpu_exec_interrupt,
-=C2=A0 =C2=A0 .do_interrupt =3D x86_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.tlb_fill =3D x86_cpu_tlb_fill,
-#ifndef CONFIG_USER_ONLY
+#ifdef CONFIG_USER_ONLY
+=C2=A0 =C2=A0 .fake_user_exception =3D x86_cpu_do_interrupt,
+#else
+=C2=A0 =C2=A0 .do_interrupt =3D x86_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.debug_excp_handler =3D breakpoint_handler,
=C2=A0 =C2=A0 =C2=A0.debug_check_breakpoint =3D x86_debug_check_breakpoint,=
=C2=A0#endif /* !CONFIG_USER_ONLY */
--
2.31.1

--0000000000002839f105cb08d4b4-- From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1mLtB2-0001Do-He for mharc-qemu-riscv@gnu.org; Thu, 02 Sep 2021 16:19:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39418) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLt6Q-0000VD-Ot for qemu-riscv@nongnu.org; Thu, 02 Sep 2021 16:14:26 -0400 Received: from mail-vs1-xe33.google.com ([2607:f8b0:4864:20::e33]:35585) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLt6O-00056j-EC for qemu-riscv@nongnu.org; Thu, 02 Sep 2021 16:14:26 -0400 Received: by mail-vs1-xe33.google.com with SMTP id p14so2620423vsm.2 for ; Thu, 02 Sep 2021 13:14:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=BRrg+j6QaFlPIv+nFHKyzv4EuLGFfWoBrJtJQBerUOA=; b=AQ62zMGIe0eE2x9iMkuvuKHFOefq6RmwWI8gw6Rit0WZdZH8vaR8nRpso9sONHN1I7 0QfL7Pm66TsAEVldPgg7gKqPFLVJujYS8mMQUgI93n2/hhQKbaMfHO0Qv4DC58bMPR0L vHMaa4HC1v3TBtpMIFGT3vwja3jjFlb6MQPn6toNqTxfJz5QT5z2hSaGC9Y981JCy0Ey NX/R/9jW2mz9df4sYY/sntqKpkQK8nS/X8U1Ng2zue4s6hcs4VQ4hrGaoOoP1gVfnoJb 4jnYteac2ABpAfR8VEEgzCCNoYtpjSYsAPjYc6olmuUOr7HX9v66wuIYp5BZvgaueOnc d8qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=BRrg+j6QaFlPIv+nFHKyzv4EuLGFfWoBrJtJQBerUOA=; b=uRw0IWe0rasawzsZX1QH7pkTiilsb4xNFzj9sDny1hhjaxRtqa8RFOnfgyj6qXj82d cpZjWQxHR9DsCmxJl8ks+kKQeY8koFzXNRw+lI+A7XoE7/6PQtHWR0kOjwOroIUo/Gk2 628JDzyFFWQv4oXejSfDquRp/kRuaU4r5ohW7t7GSnG6YhKKM7AK36R+M7FjfZZ0BBk7 P8hjEDZukIcXsBzDwjhPhohLZX6P/vU8t1Nb0eZwesBBEzEON9lhmFFZtydwkX7JAAs/ RINXlCYEnBYyBGPQK4a1x+O+C4ExQLTQMa2hB/xJmtdO3Rm14U3cRmRkJ01MvwazNFh5 ZpyQ== X-Gm-Message-State: AOAM530Y/SiqQepkfJAt+7fymTFI0uadSDQXSDhO1rz301j9dN/6r02s j/oJ2hwpWkVxaPTXCC3fQFmPMyavn6kB4SVcPAHXbg== X-Google-Smtp-Source: ABdhPJzpyp+gpw72fkLM9kt0rIbF/Cz6NAcQKxVp7RqCOFmso+/X1D1IE/faNY4Iwh3WeF7zQifQbp/0I9r63BMyrkQ= X-Received: by 2002:a67:2dc6:: with SMTP id t189mr3875399vst.49.1630613663130; Thu, 02 Sep 2021 13:14:23 -0700 (PDT) MIME-Version: 1.0 References: <20210902151715.383678-1-f4bug@amsat.org> <20210902151715.383678-5-f4bug@amsat.org> In-Reply-To: <20210902151715.383678-5-f4bug@amsat.org> From: Warner Losh Date: Thu, 2 Sep 2021 14:14:12 -0600 Message-ID: Subject: Re: [RFC PATCH 04/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_exception To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Cc: QEMU Developers , Yoshinori Sato , Jiaxun Yang , qemu-arm , Palmer Dabbelt , Max Filippov , Michael Rolnik , Stafford Horne , Paolo Bonzini , "Edgar E. Iglesias" , Bin Meng , Chris Wulff , Mark Cave-Ayland , David Gibson , Kyle Evans , Peter Maydell , Aurelien Jarno , Eduardo Habkost , Marek Vasut , Artyom Tarasenko , Aleksandar Rikalo , Greg Kurz , qemu-riscv@nongnu.org, Laurent Vivier , qemu-ppc , Richard Henderson , Alistair Francis Content-Type: multipart/alternative; boundary="0000000000002839f105cb08d4b4" Received-SPF: none client-ip=2607:f8b0:4864:20::e33; envelope-from=wlosh@bsdimp.com; helo=mail-vs1-xe33.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Thu, 02 Sep 2021 16:19:04 -0400 X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Sep 2021 20:14:27 -0000 --0000000000002839f105cb08d4b4 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Sep 2, 2021 at 9:17 AM Philippe Mathieu-Daud=C3=A9 wrote: > do_interrupt() is sysemu specific. However due to some X86 > specific hack, it is also used in user-mode emulation, which > is why it couldn't be restricted to CONFIG_SOFTMMU (see the > comment around added in commit 78271684719: "cpu: tcg_ops: > move to tcg-cpu-ops.h, keep a pointer in CPUClass"). > Keep the hack but rename the handler as fake_user_exception() > and restrict do_interrupt() to sysemu. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > RFC: Any better name / idea here? > Maybe user_mode_exception()? but I'm not sure that's better... > --- > include/hw/core/tcg-cpu-ops.h | 22 ++++++++++++++-------- > accel/tcg/cpu-exec.c | 4 ++-- > target/i386/tcg/tcg-cpu.c | 6 ++++-- > 3 files changed, 20 insertions(+), 12 deletions(-) > Reviewed-by: Warner Losh > diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.= h > index eab27d0c030..600f0349659 100644 > --- a/include/hw/core/tcg-cpu-ops.h > +++ b/include/hw/core/tcg-cpu-ops.h > @@ -37,14 +37,6 @@ struct TCGCPUOps { > void (*cpu_exec_exit)(CPUState *cpu); > /** @cpu_exec_interrupt: Callback for processing interrupts in > cpu_exec */ > bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); > - /** > - * @do_interrupt: Callback for interrupt handling. > - * > - * note that this is in general SOFTMMU only, but it actually isn't > - * because of an x86 hack (accel/tcg/cpu-exec.c), so we cannot put i= t > - * in the SOFTMMU section in general. > - */ > - void (*do_interrupt)(CPUState *cpu); > /** > * @tlb_fill: Handle a softmmu tlb miss or user-only address fault > * > @@ -61,6 +53,20 @@ struct TCGCPUOps { > void (*debug_excp_handler)(CPUState *cpu); > > #ifdef NEED_CPU_H > +#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386) > + /** > + * @fake_user_exception: Callback for 'fake exception' handling. > + * > + * Simulate 'fake exception' which will be handled outside the > + * cpu execution loop (hack for x86 user mode). > + */ > + void (*fake_user_exception)(CPUState *cpu); > +#else > + /** > + * @do_interrupt: Callback for interrupt handling. > + */ > + void (*do_interrupt)(CPUState *cpu); > +#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */ > #ifdef CONFIG_SOFTMMU > /** > * @do_transaction_failed: Callback for handling failed memory > transactions > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > index e5c0ccd1a2a..3e387c944c5 100644 > --- a/accel/tcg/cpu-exec.c > +++ b/accel/tcg/cpu-exec.c > @@ -651,8 +651,8 @@ static inline bool cpu_handle_exception(CPUState *cpu= , > int *ret) > loop */ > #if defined(TARGET_I386) > CPUClass *cc =3D CPU_GET_CLASS(cpu); > - cc->tcg_ops->do_interrupt(cpu); > -#endif > + cc->tcg_ops->fake_user_exception(cpu); > +#endif /* TARGET_I386 */ > *ret =3D cpu->exception_index; > cpu->exception_index =3D -1; > return true; > diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c > index 93a79a57415..dce800a8953 100644 > --- a/target/i386/tcg/tcg-cpu.c > +++ b/target/i386/tcg/tcg-cpu.c > @@ -73,9 +73,11 @@ static const struct TCGCPUOps x86_tcg_ops =3D { > .cpu_exec_enter =3D x86_cpu_exec_enter, > .cpu_exec_exit =3D x86_cpu_exec_exit, > .cpu_exec_interrupt =3D x86_cpu_exec_interrupt, > - .do_interrupt =3D x86_cpu_do_interrupt, > .tlb_fill =3D x86_cpu_tlb_fill, > -#ifndef CONFIG_USER_ONLY > +#ifdef CONFIG_USER_ONLY > + .fake_user_exception =3D x86_cpu_do_interrupt, > +#else > + .do_interrupt =3D x86_cpu_do_interrupt, > .debug_excp_handler =3D breakpoint_handler, > .debug_check_breakpoint =3D x86_debug_check_breakpoint, > #endif /* !CONFIG_USER_ONLY */ > -- > 2.31.1 > > --0000000000002839f105cb08d4b4 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Sep 2, 2021 at 9:17 AM Philip= pe Mathieu-Daud=C3=A9 <f4bug@amsat.or= g> wrote:
do_interrupt() is sysemu specific. However due to some X86
specific hack, it is also used in user-mode emulation, which
is why it couldn't be restricted to CONFIG_SOFTMMU (see the
comment around added in commit 78271684719: "cpu: tcg_ops:
move to tcg-cpu-ops.h, keep a pointer in CPUClass").
Keep the hack but rename the handler as fake_user_exception()
and restrict do_interrupt() to sysemu.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
RFC: Any better name / idea here?

Maybe= user_mode_exception()? but I'm not sure that's better...
=C2=A0
---
=C2=A0include/hw/core/tcg-cpu-ops.h | 22 ++++++++++++++--------
=C2=A0accel/tcg/cpu-exec.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 4 ++--=
=C2=A0target/i386/tcg/tcg-cpu.c=C2=A0 =C2=A0 =C2=A0|=C2=A0 6 ++++--
=C2=A03 files changed, 20 insertions(+), 12 deletions(-)


Reviewed-by: Warner Losh <imp@bsdimp.com>

=C2=A0
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h<= br> index eab27d0c030..600f0349659 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -37,14 +37,6 @@ struct TCGCPUOps {
=C2=A0 =C2=A0 =C2=A0void (*cpu_exec_exit)(CPUState *cpu);
=C2=A0 =C2=A0 =C2=A0/** @cpu_exec_interrupt: Callback for processing interr= upts in cpu_exec */
=C2=A0 =C2=A0 =C2=A0bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt= _request);
-=C2=A0 =C2=A0 /**
-=C2=A0 =C2=A0 =C2=A0* @do_interrupt: Callback for interrupt handling.
-=C2=A0 =C2=A0 =C2=A0*
-=C2=A0 =C2=A0 =C2=A0* note that this is in general SOFTMMU only, but it ac= tually isn't
-=C2=A0 =C2=A0 =C2=A0* because of an x86 hack (accel/tcg/cpu-exec.c), so we= cannot put it
-=C2=A0 =C2=A0 =C2=A0* in the SOFTMMU section in general.
-=C2=A0 =C2=A0 =C2=A0*/
-=C2=A0 =C2=A0 void (*do_interrupt)(CPUState *cpu);
=C2=A0 =C2=A0 =C2=A0/**
=C2=A0 =C2=A0 =C2=A0 * @tlb_fill: Handle a softmmu tlb miss or user-only ad= dress fault
=C2=A0 =C2=A0 =C2=A0 *
@@ -61,6 +53,20 @@ struct TCGCPUOps {
=C2=A0 =C2=A0 =C2=A0void (*debug_excp_handler)(CPUState *cpu);

=C2=A0#ifdef NEED_CPU_H
+#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386)
+=C2=A0 =C2=A0 /**
+=C2=A0 =C2=A0 =C2=A0* @fake_user_exception: Callback for 'fake excepti= on' handling.
+=C2=A0 =C2=A0 =C2=A0*
+=C2=A0 =C2=A0 =C2=A0* Simulate 'fake exception' which will be hand= led outside the
+=C2=A0 =C2=A0 =C2=A0* cpu execution loop (hack for x86 user mode).
+=C2=A0 =C2=A0 =C2=A0*/
+=C2=A0 =C2=A0 void (*fake_user_exception)(CPUState *cpu);
+#else
+=C2=A0 =C2=A0 /**
+=C2=A0 =C2=A0 =C2=A0* @do_interrupt: Callback for interrupt handling.
+=C2=A0 =C2=A0 =C2=A0*/
+=C2=A0 =C2=A0 void (*do_interrupt)(CPUState *cpu);
+#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
=C2=A0#ifdef CONFIG_SOFTMMU
=C2=A0 =C2=A0 =C2=A0/**
=C2=A0 =C2=A0 =C2=A0 * @do_transaction_failed: Callback for handling failed= memory transactions
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index e5c0ccd1a2a..3e387c944c5 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -651,8 +651,8 @@ static inline bool cpu_handle_exception(CPUState *cpu, = int *ret)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 loop */
=C2=A0#if defined(TARGET_I386)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0CPUClass *cc =3D CPU_GET_CLASS(cpu);
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 cc->tcg_ops->do_interrupt(cpu);
-#endif
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 cc->tcg_ops->fake_user_exception(cpu); +#endif /* TARGET_I386 */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*ret =3D cpu->exception_index;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0cpu->exception_index =3D -1;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return true;
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index 93a79a57415..dce800a8953 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -73,9 +73,11 @@ static const struct TCGCPUOps x86_tcg_ops =3D {
=C2=A0 =C2=A0 =C2=A0.cpu_exec_enter =3D x86_cpu_exec_enter,
=C2=A0 =C2=A0 =C2=A0.cpu_exec_exit =3D x86_cpu_exec_exit,
=C2=A0 =C2=A0 =C2=A0.cpu_exec_interrupt =3D x86_cpu_exec_interrupt,
-=C2=A0 =C2=A0 .do_interrupt =3D x86_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.tlb_fill =3D x86_cpu_tlb_fill,
-#ifndef CONFIG_USER_ONLY
+#ifdef CONFIG_USER_ONLY
+=C2=A0 =C2=A0 .fake_user_exception =3D x86_cpu_do_interrupt,
+#else
+=C2=A0 =C2=A0 .do_interrupt =3D x86_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.debug_excp_handler =3D breakpoint_handler,
=C2=A0 =C2=A0 =C2=A0.debug_check_breakpoint =3D x86_debug_check_breakpoint,=
=C2=A0#endif /* !CONFIG_USER_ONLY */
--
2.31.1

--0000000000002839f105cb08d4b4--