From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CDAFC433F5 for ; Thu, 2 Sep 2021 20:17:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E76AD6113C for ; Thu, 2 Sep 2021 20:17:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E76AD6113C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bsdimp.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:52008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mLt9N-0004GE-UO for qemu-devel@archiver.kernel.org; Thu, 02 Sep 2021 16:17:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39788) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLt7e-0001uo-UI for qemu-devel@nongnu.org; Thu, 02 Sep 2021 16:15:42 -0400 Received: from mail-ua1-x929.google.com ([2607:f8b0:4864:20::929]:44711) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLt7b-00068z-2y for qemu-devel@nongnu.org; Thu, 02 Sep 2021 16:15:41 -0400 Received: by mail-ua1-x929.google.com with SMTP id x6so1562504uai.11 for ; Thu, 02 Sep 2021 13:15:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=HUTdYryH4g0QwdfTQrQx8E5mk3Ak5PJvxWL0FfqOQE8=; b=gT3m451EfStt/xnRBMF3RTRho0JYutgQYFADKXh1SYDddMdaTyEY6NkjLBf+06Hrix Fl7nQIEgd+791t/TITB7kE+M7L5y7+keLXwlC75d9+D2uDtCbkkABi/zPwKrblp4hm2W b/dEN2xjpuBXrPEOm5JuyvRKq6BpZC9zbNxqCzoU+iXmAol24OCwiy7Tym62pWdwx0Fa Bbzz33j2sX1s4PiL6adUK9a4BOCJoYji/WqYNrdkDUHDOZwlw5dARHPv6Ig0RmydN/Tm 0PmYLoOLihR6Z2+gt0zWoA+RBYt1eVpGC6ebLYJN36RIIOlMOnvDCkQKP5hyhzw4H2w8 qGbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=HUTdYryH4g0QwdfTQrQx8E5mk3Ak5PJvxWL0FfqOQE8=; b=I270X3hxivCpPpflGxp7gh8fyA0Rq0hqI36+eB674numDUeTgYOZxgDPwLRpxNcNdw Y0Qm8r7APqQcKSws864KCtI4miboCVPntl2GENchcZzUbZWBDi/n9Xn6YpuIREhn2dwD CuPGQjcZG33lVZ+mkHFuAUV0+Fc8S6LTJ40dlj671xBzrP8NaqNP+XQzNy4vDXfznq9M 2GByP6meBa5gjqXnGTaxoMZ1GHLJGcGMqTw+rlVk3r2tIYe3gIkuhx8UAZkWk21DjFYo eo0kGBpNlaOjQEDC0ltAGiDrMJ+OYn+LBFJvuqx5y4RRmKeGWY8kRaomUdGIQ6ALAd1f aP9A== X-Gm-Message-State: AOAM531XZJcvRzUNuuCCb7/IDfaMVfrNZCdnAT7ExSZikskTBO3bfIK5 2wwrbtLqntYXKMdWtfqT6xmuqI0RgOM9ts32GLqyfA== X-Google-Smtp-Source: ABdhPJz5EIXzhOpDdVKWmu9EObSjnCbGAuXMfATGE79XUEXGmy92hZcyR1XQ/fIl/e5yFn0K8dfQaObYmdG6mCQgSCY= X-Received: by 2002:a9f:31c8:: with SMTP id w8mr41290uad.77.1630613737842; Thu, 02 Sep 2021 13:15:37 -0700 (PDT) MIME-Version: 1.0 References: <20210902151715.383678-1-f4bug@amsat.org> <20210902151715.383678-7-f4bug@amsat.org> In-Reply-To: <20210902151715.383678-7-f4bug@amsat.org> From: Warner Losh Date: Thu, 2 Sep 2021 14:15:27 -0600 Message-ID: Subject: Re: [PATCH 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="0000000000009c418505cb08d8b0" Received-SPF: none client-ip=2607:f8b0:4864:20::929; envelope-from=wlosh@bsdimp.com; helo=mail-ua1-x929.google.com X-Spam_score_int: 0 X-Spam_score: 0.0 X-Spam_bar: / X-Spam_report: (0.0 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bin Meng , Mark Cave-Ayland , QEMU Developers , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Marek Vasut , Yoshinori Sato , qemu-ppc , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Kyle Evans , Richard Henderson , Greg Kurz , qemu-arm , Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Chris Wulff , Laurent Vivier , Palmer Dabbelt , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --0000000000009c418505cb08d8b0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Sep 2, 2021 at 9:17 AM Philippe Mathieu-Daud=C3=A9 wrote: > Restrict cpu_exec_interrupt() and its callees to sysemu. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > target/alpha/cpu.h | 2 +- > target/alpha/cpu.c | 2 +- > target/alpha/helper.c | 5 ++--- > 3 files changed, 4 insertions(+), 5 deletions(-) > Reviewed-by: Warner Losh > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > index 82df108967b..4e993bd15bd 100644 > --- a/target/alpha/cpu.h > +++ b/target/alpha/cpu.h > @@ -274,10 +274,10 @@ struct AlphaCPU { > > #ifndef CONFIG_USER_ONLY > extern const VMStateDescription vmstate_alpha_cpu; > -#endif > > void alpha_cpu_do_interrupt(CPUState *cpu); > bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); > +#endif /* !CONFIG_USER_ONLY */ > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); > hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)= ; > diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c > index 4871ad0c0a6..93e16a2ffb4 100644 > --- a/target/alpha/cpu.c > +++ b/target/alpha/cpu.c > @@ -218,10 +218,10 @@ static const struct SysemuCPUOps alpha_sysemu_ops = =3D { > > static const struct TCGCPUOps alpha_tcg_ops =3D { > .initialize =3D alpha_translate_init, > - .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt, > .tlb_fill =3D alpha_cpu_tlb_fill, > > #ifndef CONFIG_USER_ONLY > + .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt, > .do_interrupt =3D alpha_cpu_do_interrupt, > .do_transaction_failed =3D alpha_cpu_do_transaction_failed, > .do_unaligned_access =3D alpha_cpu_do_unaligned_access, > diff --git a/target/alpha/helper.c b/target/alpha/helper.c > index 4f56fe4d231..81550d9e2ff 100644 > --- a/target/alpha/helper.c > +++ b/target/alpha/helper.c > @@ -293,7 +293,6 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int > size, > prot, mmu_idx, TARGET_PAGE_SIZE); > return true; > } > -#endif /* USER_ONLY */ > > void alpha_cpu_do_interrupt(CPUState *cs) > { > @@ -348,7 +347,6 @@ void alpha_cpu_do_interrupt(CPUState *cs) > > cs->exception_index =3D -1; > > -#if !defined(CONFIG_USER_ONLY) > switch (i) { > case EXCP_RESET: > i =3D 0x0000; > @@ -404,7 +402,6 @@ void alpha_cpu_do_interrupt(CPUState *cs) > > /* Switch to PALmode. */ > env->flags |=3D ENV_FLAG_PAL_MODE; > -#endif /* !USER_ONLY */ > } > > bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > @@ -451,6 +448,8 @@ bool alpha_cpu_exec_interrupt(CPUState *cs, int > interrupt_request) > return false; > } > > +#endif /* !CONFIG_USER_ONLY */ > + > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags) > { > static const char linux_reg_names[31][4] =3D { > -- > 2.31.1 > > --0000000000009c418505cb08d8b0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Sep 2, 2021 at 9:17 AM Philip= pe Mathieu-Daud=C3=A9 <f4bug@amsat.or= g> wrote:
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
=C2=A0target/alpha/cpu.h=C2=A0 =C2=A0 | 2 +-
=C2=A0target/alpha/cpu.c=C2=A0 =C2=A0 | 2 +-
=C2=A0target/alpha/helper.c | 5 ++---
=C2=A03 files changed, 4 insertions(+), 5 deletions(-)

Reviewed-by: Warner Losh <imp@bsdimp.com>
=C2=A0
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 82df108967b..4e993bd15bd 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -274,10 +274,10 @@ struct AlphaCPU {

=C2=A0#ifndef CONFIG_USER_ONLY
=C2=A0extern const VMStateDescription vmstate_alpha_cpu;
-#endif

=C2=A0void alpha_cpu_do_interrupt(CPUState *cpu);
=C2=A0bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
+#endif /* !CONFIG_USER_ONLY */
=C2=A0void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
=C2=A0hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
=C2=A0int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int r= eg);
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 4871ad0c0a6..93e16a2ffb4 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -218,10 +218,10 @@ static const struct SysemuCPUOps alpha_sysemu_ops =3D= {

=C2=A0static const struct TCGCPUOps alpha_tcg_ops =3D {
=C2=A0 =C2=A0 =C2=A0.initialize =3D alpha_translate_init,
-=C2=A0 =C2=A0 .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.tlb_fill =3D alpha_cpu_tlb_fill,

=C2=A0#ifndef CONFIG_USER_ONLY
+=C2=A0 =C2=A0 .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_interrupt =3D alpha_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_transaction_failed =3D alpha_cpu_do_transaction_fai= led,
=C2=A0 =C2=A0 =C2=A0.do_unaligned_access =3D alpha_cpu_do_unaligned_access,=
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 4f56fe4d231..81550d9e2ff 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -293,7 +293,6 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int s= ize,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 prot, mmu_id= x, TARGET_PAGE_SIZE);
=C2=A0 =C2=A0 =C2=A0return true;
=C2=A0}
-#endif /* USER_ONLY */

=C2=A0void alpha_cpu_do_interrupt(CPUState *cs)
=C2=A0{
@@ -348,7 +347,6 @@ void alpha_cpu_do_interrupt(CPUState *cs)

=C2=A0 =C2=A0 =C2=A0cs->exception_index =3D -1;

-#if !defined(CONFIG_USER_ONLY)
=C2=A0 =C2=A0 =C2=A0switch (i) {
=C2=A0 =C2=A0 =C2=A0case EXCP_RESET:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0i =3D 0x0000;
@@ -404,7 +402,6 @@ void alpha_cpu_do_interrupt(CPUState *cs)

=C2=A0 =C2=A0 =C2=A0/* Switch to PALmode.=C2=A0 */
=C2=A0 =C2=A0 =C2=A0env->flags |=3D ENV_FLAG_PAL_MODE;
-#endif /* !USER_ONLY */
=C2=A0}

=C2=A0bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) @@ -451,6 +448,8 @@ bool alpha_cpu_exec_interrupt(CPUState *cs, int interru= pt_request)
=C2=A0 =C2=A0 =C2=A0return false;
=C2=A0}

+#endif /* !CONFIG_USER_ONLY */
+
=C2=A0void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags)
=C2=A0{
=C2=A0 =C2=A0 =C2=A0static const char linux_reg_names[31][4] =3D {
--
2.31.1

--0000000000009c418505cb08d8b0-- From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1mLtB0-0001Am-6i for mharc-qemu-riscv@gnu.org; Thu, 02 Sep 2021 16:19:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39790) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLt7e-0001up-V9 for qemu-riscv@nongnu.org; Thu, 02 Sep 2021 16:15:42 -0400 Received: from mail-ua1-x934.google.com ([2607:f8b0:4864:20::934]:42756) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLt7b-000690-2y for qemu-riscv@nongnu.org; Thu, 02 Sep 2021 16:15:41 -0400 Received: by mail-ua1-x934.google.com with SMTP id m39so1568450uad.9 for ; Thu, 02 Sep 2021 13:15:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=HUTdYryH4g0QwdfTQrQx8E5mk3Ak5PJvxWL0FfqOQE8=; b=gT3m451EfStt/xnRBMF3RTRho0JYutgQYFADKXh1SYDddMdaTyEY6NkjLBf+06Hrix Fl7nQIEgd+791t/TITB7kE+M7L5y7+keLXwlC75d9+D2uDtCbkkABi/zPwKrblp4hm2W b/dEN2xjpuBXrPEOm5JuyvRKq6BpZC9zbNxqCzoU+iXmAol24OCwiy7Tym62pWdwx0Fa Bbzz33j2sX1s4PiL6adUK9a4BOCJoYji/WqYNrdkDUHDOZwlw5dARHPv6Ig0RmydN/Tm 0PmYLoOLihR6Z2+gt0zWoA+RBYt1eVpGC6ebLYJN36RIIOlMOnvDCkQKP5hyhzw4H2w8 qGbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=HUTdYryH4g0QwdfTQrQx8E5mk3Ak5PJvxWL0FfqOQE8=; b=H37GaelFYMlVcigVb3xtE5HQzxftRqCgIRp6GIsVuU4wqkUUr7uZ8crinT5F/nuWhO GkPMAybmE1eA4zL0JLn+hxeLeJxTzM7qvL7LMiC9QLvoHa34BczjbvNKznriJx8oOJel DKcy1PIymNQjExm+ubwi55rBz1b8vKcYyPkXMJxmoXoiOhSVfv5PQKafnoR0fMPPBXOn 1RxFIjyZ6ZoC1BnBRgG9GNybg7ZTx6F+TvtgSBPoJcamkY/lsC9LahQxDh2c57/zBkhN qVdFLgOxByF/W03A8P6URvmZXcSeunoI3zvitP/8aK0NI9HAe+oay8IdMBJtOUXjvCCf y3Bg== X-Gm-Message-State: AOAM532Fh22OwURt6/9PqvoqqDE1qaKLy9F2cGStHZtm+Xau0/UScUk7 qlmlt+pLZH2ekZjIU7FOcrZYYeoKMgmM/29Armdshg== X-Google-Smtp-Source: ABdhPJz5EIXzhOpDdVKWmu9EObSjnCbGAuXMfATGE79XUEXGmy92hZcyR1XQ/fIl/e5yFn0K8dfQaObYmdG6mCQgSCY= X-Received: by 2002:a9f:31c8:: with SMTP id w8mr41290uad.77.1630613737842; Thu, 02 Sep 2021 13:15:37 -0700 (PDT) MIME-Version: 1.0 References: <20210902151715.383678-1-f4bug@amsat.org> <20210902151715.383678-7-f4bug@amsat.org> In-Reply-To: <20210902151715.383678-7-f4bug@amsat.org> From: Warner Losh Date: Thu, 2 Sep 2021 14:15:27 -0600 Message-ID: Subject: Re: [PATCH 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Cc: QEMU Developers , Yoshinori Sato , Jiaxun Yang , qemu-arm , Palmer Dabbelt , Max Filippov , Michael Rolnik , Stafford Horne , Paolo Bonzini , "Edgar E. Iglesias" , Bin Meng , Chris Wulff , Mark Cave-Ayland , David Gibson , Kyle Evans , Peter Maydell , Aurelien Jarno , Eduardo Habkost , Marek Vasut , Artyom Tarasenko , Aleksandar Rikalo , Greg Kurz , qemu-riscv@nongnu.org, Laurent Vivier , qemu-ppc , Richard Henderson , Alistair Francis Content-Type: multipart/alternative; boundary="0000000000009c418505cb08d8b0" Received-SPF: none client-ip=2607:f8b0:4864:20::934; envelope-from=wlosh@bsdimp.com; helo=mail-ua1-x934.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Thu, 02 Sep 2021 16:19:04 -0400 X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Sep 2021 20:15:43 -0000 --0000000000009c418505cb08d8b0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Sep 2, 2021 at 9:17 AM Philippe Mathieu-Daud=C3=A9 wrote: > Restrict cpu_exec_interrupt() and its callees to sysemu. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > target/alpha/cpu.h | 2 +- > target/alpha/cpu.c | 2 +- > target/alpha/helper.c | 5 ++--- > 3 files changed, 4 insertions(+), 5 deletions(-) > Reviewed-by: Warner Losh > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > index 82df108967b..4e993bd15bd 100644 > --- a/target/alpha/cpu.h > +++ b/target/alpha/cpu.h > @@ -274,10 +274,10 @@ struct AlphaCPU { > > #ifndef CONFIG_USER_ONLY > extern const VMStateDescription vmstate_alpha_cpu; > -#endif > > void alpha_cpu_do_interrupt(CPUState *cpu); > bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); > +#endif /* !CONFIG_USER_ONLY */ > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); > hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)= ; > diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c > index 4871ad0c0a6..93e16a2ffb4 100644 > --- a/target/alpha/cpu.c > +++ b/target/alpha/cpu.c > @@ -218,10 +218,10 @@ static const struct SysemuCPUOps alpha_sysemu_ops = =3D { > > static const struct TCGCPUOps alpha_tcg_ops =3D { > .initialize =3D alpha_translate_init, > - .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt, > .tlb_fill =3D alpha_cpu_tlb_fill, > > #ifndef CONFIG_USER_ONLY > + .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt, > .do_interrupt =3D alpha_cpu_do_interrupt, > .do_transaction_failed =3D alpha_cpu_do_transaction_failed, > .do_unaligned_access =3D alpha_cpu_do_unaligned_access, > diff --git a/target/alpha/helper.c b/target/alpha/helper.c > index 4f56fe4d231..81550d9e2ff 100644 > --- a/target/alpha/helper.c > +++ b/target/alpha/helper.c > @@ -293,7 +293,6 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int > size, > prot, mmu_idx, TARGET_PAGE_SIZE); > return true; > } > -#endif /* USER_ONLY */ > > void alpha_cpu_do_interrupt(CPUState *cs) > { > @@ -348,7 +347,6 @@ void alpha_cpu_do_interrupt(CPUState *cs) > > cs->exception_index =3D -1; > > -#if !defined(CONFIG_USER_ONLY) > switch (i) { > case EXCP_RESET: > i =3D 0x0000; > @@ -404,7 +402,6 @@ void alpha_cpu_do_interrupt(CPUState *cs) > > /* Switch to PALmode. */ > env->flags |=3D ENV_FLAG_PAL_MODE; > -#endif /* !USER_ONLY */ > } > > bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > @@ -451,6 +448,8 @@ bool alpha_cpu_exec_interrupt(CPUState *cs, int > interrupt_request) > return false; > } > > +#endif /* !CONFIG_USER_ONLY */ > + > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags) > { > static const char linux_reg_names[31][4] =3D { > -- > 2.31.1 > > --0000000000009c418505cb08d8b0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Sep 2, 2021 at 9:17 AM Philip= pe Mathieu-Daud=C3=A9 <f4bug@amsat.or= g> wrote:
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
=C2=A0target/alpha/cpu.h=C2=A0 =C2=A0 | 2 +-
=C2=A0target/alpha/cpu.c=C2=A0 =C2=A0 | 2 +-
=C2=A0target/alpha/helper.c | 5 ++---
=C2=A03 files changed, 4 insertions(+), 5 deletions(-)

Reviewed-by: Warner Losh <imp@bsdimp.com>
=C2=A0
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 82df108967b..4e993bd15bd 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -274,10 +274,10 @@ struct AlphaCPU {

=C2=A0#ifndef CONFIG_USER_ONLY
=C2=A0extern const VMStateDescription vmstate_alpha_cpu;
-#endif

=C2=A0void alpha_cpu_do_interrupt(CPUState *cpu);
=C2=A0bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
+#endif /* !CONFIG_USER_ONLY */
=C2=A0void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
=C2=A0hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
=C2=A0int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int r= eg);
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 4871ad0c0a6..93e16a2ffb4 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -218,10 +218,10 @@ static const struct SysemuCPUOps alpha_sysemu_ops =3D= {

=C2=A0static const struct TCGCPUOps alpha_tcg_ops =3D {
=C2=A0 =C2=A0 =C2=A0.initialize =3D alpha_translate_init,
-=C2=A0 =C2=A0 .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.tlb_fill =3D alpha_cpu_tlb_fill,

=C2=A0#ifndef CONFIG_USER_ONLY
+=C2=A0 =C2=A0 .cpu_exec_interrupt =3D alpha_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_interrupt =3D alpha_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_transaction_failed =3D alpha_cpu_do_transaction_fai= led,
=C2=A0 =C2=A0 =C2=A0.do_unaligned_access =3D alpha_cpu_do_unaligned_access,=
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 4f56fe4d231..81550d9e2ff 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -293,7 +293,6 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int s= ize,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 prot, mmu_id= x, TARGET_PAGE_SIZE);
=C2=A0 =C2=A0 =C2=A0return true;
=C2=A0}
-#endif /* USER_ONLY */

=C2=A0void alpha_cpu_do_interrupt(CPUState *cs)
=C2=A0{
@@ -348,7 +347,6 @@ void alpha_cpu_do_interrupt(CPUState *cs)

=C2=A0 =C2=A0 =C2=A0cs->exception_index =3D -1;

-#if !defined(CONFIG_USER_ONLY)
=C2=A0 =C2=A0 =C2=A0switch (i) {
=C2=A0 =C2=A0 =C2=A0case EXCP_RESET:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0i =3D 0x0000;
@@ -404,7 +402,6 @@ void alpha_cpu_do_interrupt(CPUState *cs)

=C2=A0 =C2=A0 =C2=A0/* Switch to PALmode.=C2=A0 */
=C2=A0 =C2=A0 =C2=A0env->flags |=3D ENV_FLAG_PAL_MODE;
-#endif /* !USER_ONLY */
=C2=A0}

=C2=A0bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) @@ -451,6 +448,8 @@ bool alpha_cpu_exec_interrupt(CPUState *cs, int interru= pt_request)
=C2=A0 =C2=A0 =C2=A0return false;
=C2=A0}

+#endif /* !CONFIG_USER_ONLY */
+
=C2=A0void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags)
=C2=A0{
=C2=A0 =C2=A0 =C2=A0static const char linux_reg_names[31][4] =3D {
--
2.31.1

--0000000000009c418505cb08d8b0--