From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E04A2C433F5 for ; Thu, 2 Sep 2021 20:36:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5F49A60C3E for ; Thu, 2 Sep 2021 20:36:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5F49A60C3E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bsdimp.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:51076 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mLtRy-0000Ki-FU for qemu-devel@archiver.kernel.org; Thu, 02 Sep 2021 16:36:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42398) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLtIk-0007N4-VM for qemu-devel@nongnu.org; Thu, 02 Sep 2021 16:27:11 -0400 Received: from mail-vs1-xe2e.google.com ([2607:f8b0:4864:20::e2e]:45013) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLtIh-0007Mk-MU for qemu-devel@nongnu.org; Thu, 02 Sep 2021 16:27:10 -0400 Received: by mail-vs1-xe2e.google.com with SMTP id n63so2625503vsc.11 for ; Thu, 02 Sep 2021 13:27:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/sVmxSajWjmvQFNeYbztXOm0im/4xVGH/4yffdaVa2o=; b=IQQ94W6z8/5NeuHYKaXJA7RYxibVGpYbasMkLkmGZJL3M+x3Xa5il3RwL6ueiFAM/e KZfjBSJkhzWt5Kam+dauac+KhHY5NbhN7GOwm2XjxnfuwlwYar9d6+Jz1EPfV8C73l6Z uA45tOQXvh9FlplZau1rLO0tZ2T9gndnL+IsEx8FsgwN0PY68d4exPaH8AviLW9cMyP+ q96MfUxmR6BNfADaAFSggezGnEa4No1M7MPzdaVs5SVhUfszpmfjYXYuloCzhC905SUp vochMfcUBcnTQIfEw8XypsyDGVsrpLtiR61MuRT+EgvuTFEjZq9YJzHOzXJRolWHFWYd QivA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/sVmxSajWjmvQFNeYbztXOm0im/4xVGH/4yffdaVa2o=; b=s8GqmrWocRDoFo2rJUJ1zjWV8nnnFG09RFzdsjRb7N32+bUJ9TpNJig3UtNrjbRl8N TxriFXL4iZu+Ii3L6O4rlRR8TgRfT633E5iEYLewq6K2wxPCH7loqIYVbE0G37bSk6nz 4djPbk3S3K8a4MO/XtAwsoBWdZkOJsbBmtJaV5lmZXd9xJWQ4p1UOzEccrgNnQQTjON1 AUFaP/mKMue32rCNXzZ0VmoM6BHpnmFOWjvXBW8gmBxb8euFF5F35a1BjLaE5BGQUc8f X0exKQdnuicV4M439CVIL0MAEAkRizF8Ru8sPEllh5xq0jeFXhoQHkzPJHd7gNRriEBt bNeg== X-Gm-Message-State: AOAM5301fg33yNQNJBILWvknEF1xwT9ovblpjSwIKDKmfzZLBvoBO25U VPY3ft609BQ6VYnevyDuqG/lF2BuBRKrLOfyr3PqXQ== X-Google-Smtp-Source: ABdhPJxpZYsqFeZuO5Bb4wHZN2UzYcIlZFXJ6eJ9hB59qiuprKLJ0+5UlydVmDR8GTbO2mXPmmHsyx4b3VO6XLhELQQ= X-Received: by 2002:a05:6102:5a:: with SMTP id k26mr4349500vsp.26.1630614426851; Thu, 02 Sep 2021 13:27:06 -0700 (PDT) MIME-Version: 1.0 References: <20210902151715.383678-1-f4bug@amsat.org> <20210902151715.383678-23-f4bug@amsat.org> In-Reply-To: <20210902151715.383678-23-f4bug@amsat.org> From: Warner Losh Date: Thu, 2 Sep 2021 14:26:55 -0600 Message-ID: Subject: Re: [PATCH 22/24] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="000000000000ada9bf05cb090178" Received-SPF: none client-ip=2607:f8b0:4864:20::e2e; envelope-from=wlosh@bsdimp.com; helo=mail-vs1-xe2e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bin Meng , Mark Cave-Ayland , QEMU Developers , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Marek Vasut , Yoshinori Sato , qemu-ppc , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Kyle Evans , Richard Henderson , Greg Kurz , qemu-arm , Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Chris Wulff , Laurent Vivier , Palmer Dabbelt , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000ada9bf05cb090178 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Sep 2, 2021 at 9:19 AM Philippe Mathieu-Daud=C3=A9 wrote: > Restrict cpu_exec_interrupt() and its callees to sysemu. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > target/xtensa/cpu.h | 4 ++-- > target/xtensa/cpu.c | 2 +- > target/xtensa/exc_helper.c | 7 ++----- > 3 files changed, 5 insertions(+), 8 deletions(-) > Reviewed-by: Warner Losh > diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h > index 1e0cb1535ca..cbb720e7cca 100644 > --- a/target/xtensa/cpu.h > +++ b/target/xtensa/cpu.h > @@ -566,14 +566,14 @@ struct XtensaCPU { > bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > MMUAccessType access_type, int mmu_idx, > bool probe, uintptr_t retaddr); > +#ifndef CONFIG_USER_ONLY > void xtensa_cpu_do_interrupt(CPUState *cpu); > bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request); > -#ifndef CONFIG_USER_ONLY > void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, > vaddr addr, > unsigned size, MMUAccessType > access_type, > int mmu_idx, MemTxAttrs attrs, > MemTxResult response, uintptr_t > retaddr); > -#endif /* !CONFIG_USER_ONLY */ > +#endif > void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > void xtensa_count_regs(const XtensaConfig *config, > diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c > index 58ec3a08622..c1cbd03595e 100644 > --- a/target/xtensa/cpu.c > +++ b/target/xtensa/cpu.c > @@ -192,11 +192,11 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = =3D > { > > static const struct TCGCPUOps xtensa_tcg_ops =3D { > .initialize =3D xtensa_translate_init, > - .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt, > .tlb_fill =3D xtensa_cpu_tlb_fill, > .debug_excp_handler =3D xtensa_breakpoint_handler, > > #ifndef CONFIG_USER_ONLY > + .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt, > .do_interrupt =3D xtensa_cpu_do_interrupt, > .do_transaction_failed =3D xtensa_cpu_do_transaction_failed, > .do_unaligned_access =3D xtensa_cpu_do_unaligned_access, > diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c > index 10e75ab070d..9bc7f50d355 100644 > --- a/target/xtensa/exc_helper.c > +++ b/target/xtensa/exc_helper.c > @@ -255,11 +255,6 @@ void xtensa_cpu_do_interrupt(CPUState *cs) > } > check_interrupts(env); > } > -#else > -void xtensa_cpu_do_interrupt(CPUState *cs) > -{ > -} > -#endif > > bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > { > @@ -270,3 +265,5 @@ bool xtensa_cpu_exec_interrupt(CPUState *cs, int > interrupt_request) > } > return false; > } > + > +#endif /* !CONFIG_USER_ONLY */ > -- > 2.31.1 > > --000000000000ada9bf05cb090178 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Sep 2, 2021 at 9:19 AM Philip= pe Mathieu-Daud=C3=A9 <f4bug@amsat.or= g> wrote:
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
=C2=A0target/xtensa/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 | 4 ++--
=C2=A0target/xtensa/cpu.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 | 2 +-
=C2=A0target/xtensa/exc_helper.c | 7 ++-----
=C2=A03 files changed, 5 insertions(+), 8 deletions(-)

Reviewed-by: Warner Losh <imp@bsdimp.com>

=C2=A0
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 1e0cb1535ca..cbb720e7cca 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -566,14 +566,14 @@ struct XtensaCPU {
=C2=A0bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 MMUAccessType access_type, int mmu_idx,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 bool probe, uintptr_t retaddr);
+#ifndef CONFIG_USER_ONLY
=C2=A0void xtensa_cpu_do_interrupt(CPUState *cpu);
=C2=A0bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);=
-#ifndef CONFIG_USER_ONLY
=C2=A0void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, = vaddr addr,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned = size, MMUAccessType access_type,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0int mmu_i= dx, MemTxAttrs attrs,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MemTxResu= lt response, uintptr_t retaddr);
-#endif /* !CONFIG_USER_ONLY */
+#endif
=C2=A0void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
=C2=A0hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
=C2=A0void xtensa_count_regs(const XtensaConfig *config,
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 58ec3a08622..c1cbd03595e 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -192,11 +192,11 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = =3D {

=C2=A0static const struct TCGCPUOps xtensa_tcg_ops =3D {
=C2=A0 =C2=A0 =C2=A0.initialize =3D xtensa_translate_init,
-=C2=A0 =C2=A0 .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.tlb_fill =3D xtensa_cpu_tlb_fill,
=C2=A0 =C2=A0 =C2=A0.debug_excp_handler =3D xtensa_breakpoint_handler,

=C2=A0#ifndef CONFIG_USER_ONLY
+=C2=A0 =C2=A0 .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_interrupt =3D xtensa_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_transaction_failed =3D xtensa_cpu_do_transaction_fa= iled,
=C2=A0 =C2=A0 =C2=A0.do_unaligned_access =3D xtensa_cpu_do_unaligned_access= ,
diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c
index 10e75ab070d..9bc7f50d355 100644
--- a/target/xtensa/exc_helper.c
+++ b/target/xtensa/exc_helper.c
@@ -255,11 +255,6 @@ void xtensa_cpu_do_interrupt(CPUState *cs)
=C2=A0 =C2=A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0check_interrupts(env);
=C2=A0}
-#else
-void xtensa_cpu_do_interrupt(CPUState *cs)
-{
-}
-#endif

=C2=A0bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request) =C2=A0{
@@ -270,3 +265,5 @@ bool xtensa_cpu_exec_interrupt(CPUState *cs, int interr= upt_request)
=C2=A0 =C2=A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0return false;
=C2=A0}
+
+#endif /* !CONFIG_USER_ONLY */
--
2.31.1

--000000000000ada9bf05cb090178-- From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1mLtIn-0007W4-HD for mharc-qemu-riscv@gnu.org; Thu, 02 Sep 2021 16:27:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42400) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLtIl-0007Nu-8t for qemu-riscv@nongnu.org; Thu, 02 Sep 2021 16:27:11 -0400 Received: from mail-vs1-xe31.google.com ([2607:f8b0:4864:20::e31]:41590) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLtIh-0007Mi-QC for qemu-riscv@nongnu.org; Thu, 02 Sep 2021 16:27:10 -0400 Received: by mail-vs1-xe31.google.com with SMTP id l9so2617886vsb.8 for ; Thu, 02 Sep 2021 13:27:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/sVmxSajWjmvQFNeYbztXOm0im/4xVGH/4yffdaVa2o=; b=IQQ94W6z8/5NeuHYKaXJA7RYxibVGpYbasMkLkmGZJL3M+x3Xa5il3RwL6ueiFAM/e KZfjBSJkhzWt5Kam+dauac+KhHY5NbhN7GOwm2XjxnfuwlwYar9d6+Jz1EPfV8C73l6Z uA45tOQXvh9FlplZau1rLO0tZ2T9gndnL+IsEx8FsgwN0PY68d4exPaH8AviLW9cMyP+ q96MfUxmR6BNfADaAFSggezGnEa4No1M7MPzdaVs5SVhUfszpmfjYXYuloCzhC905SUp vochMfcUBcnTQIfEw8XypsyDGVsrpLtiR61MuRT+EgvuTFEjZq9YJzHOzXJRolWHFWYd QivA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/sVmxSajWjmvQFNeYbztXOm0im/4xVGH/4yffdaVa2o=; b=tiLIy4PcMihvOcVF0j1ydP9BEq1d08wAqc+IHSOruJtzK/Vat6n5gSVVkuBCISyydQ UAxb6SFvSrj1VgRDFaTquiwAPardto9+dJXFkW8DPGlMOLgqNvx86QeGm91yPWpH2pPk 7R/uR8Z6dNBzVTjIjafi7afuxMkKf1yNg7xnOBgHVQTkMuChJUoRGH/IK+xv9gQhUGAJ myVeOIPZjkna+ueiOFe4cmKNJHgscoEvzXLGcRqC4OV7FO25mun2wIOZTIATUkKzmTGp bvtBGKsETxvbdbgjLesH4amu7U1FGXIpZBZQy8YUnLubuaJKTzswa0yNk3puIUOiviMl Cafw== X-Gm-Message-State: AOAM5314ZAg1Wf4SQqEqZ21j23UYlzc9nCYnYCkp6IKpKA0zPA3lUi9C eDcAPHjUPB9Y8gQjQpI/Egs2+TONAWeLp/Puf9F6SA== X-Google-Smtp-Source: ABdhPJxpZYsqFeZuO5Bb4wHZN2UzYcIlZFXJ6eJ9hB59qiuprKLJ0+5UlydVmDR8GTbO2mXPmmHsyx4b3VO6XLhELQQ= X-Received: by 2002:a05:6102:5a:: with SMTP id k26mr4349500vsp.26.1630614426851; Thu, 02 Sep 2021 13:27:06 -0700 (PDT) MIME-Version: 1.0 References: <20210902151715.383678-1-f4bug@amsat.org> <20210902151715.383678-23-f4bug@amsat.org> In-Reply-To: <20210902151715.383678-23-f4bug@amsat.org> From: Warner Losh Date: Thu, 2 Sep 2021 14:26:55 -0600 Message-ID: Subject: Re: [PATCH 22/24] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Cc: QEMU Developers , Yoshinori Sato , Jiaxun Yang , qemu-arm , Palmer Dabbelt , Max Filippov , Michael Rolnik , Stafford Horne , Paolo Bonzini , "Edgar E. Iglesias" , Bin Meng , Chris Wulff , Mark Cave-Ayland , David Gibson , Kyle Evans , Peter Maydell , Aurelien Jarno , Eduardo Habkost , Marek Vasut , Artyom Tarasenko , Aleksandar Rikalo , Greg Kurz , qemu-riscv@nongnu.org, Laurent Vivier , qemu-ppc , Richard Henderson , Alistair Francis Content-Type: multipart/alternative; boundary="000000000000ada9bf05cb090178" Received-SPF: none client-ip=2607:f8b0:4864:20::e31; envelope-from=wlosh@bsdimp.com; helo=mail-vs1-xe31.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Sep 2021 20:27:11 -0000 --000000000000ada9bf05cb090178 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Sep 2, 2021 at 9:19 AM Philippe Mathieu-Daud=C3=A9 wrote: > Restrict cpu_exec_interrupt() and its callees to sysemu. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > target/xtensa/cpu.h | 4 ++-- > target/xtensa/cpu.c | 2 +- > target/xtensa/exc_helper.c | 7 ++----- > 3 files changed, 5 insertions(+), 8 deletions(-) > Reviewed-by: Warner Losh > diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h > index 1e0cb1535ca..cbb720e7cca 100644 > --- a/target/xtensa/cpu.h > +++ b/target/xtensa/cpu.h > @@ -566,14 +566,14 @@ struct XtensaCPU { > bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > MMUAccessType access_type, int mmu_idx, > bool probe, uintptr_t retaddr); > +#ifndef CONFIG_USER_ONLY > void xtensa_cpu_do_interrupt(CPUState *cpu); > bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request); > -#ifndef CONFIG_USER_ONLY > void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, > vaddr addr, > unsigned size, MMUAccessType > access_type, > int mmu_idx, MemTxAttrs attrs, > MemTxResult response, uintptr_t > retaddr); > -#endif /* !CONFIG_USER_ONLY */ > +#endif > void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > void xtensa_count_regs(const XtensaConfig *config, > diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c > index 58ec3a08622..c1cbd03595e 100644 > --- a/target/xtensa/cpu.c > +++ b/target/xtensa/cpu.c > @@ -192,11 +192,11 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = =3D > { > > static const struct TCGCPUOps xtensa_tcg_ops =3D { > .initialize =3D xtensa_translate_init, > - .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt, > .tlb_fill =3D xtensa_cpu_tlb_fill, > .debug_excp_handler =3D xtensa_breakpoint_handler, > > #ifndef CONFIG_USER_ONLY > + .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt, > .do_interrupt =3D xtensa_cpu_do_interrupt, > .do_transaction_failed =3D xtensa_cpu_do_transaction_failed, > .do_unaligned_access =3D xtensa_cpu_do_unaligned_access, > diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c > index 10e75ab070d..9bc7f50d355 100644 > --- a/target/xtensa/exc_helper.c > +++ b/target/xtensa/exc_helper.c > @@ -255,11 +255,6 @@ void xtensa_cpu_do_interrupt(CPUState *cs) > } > check_interrupts(env); > } > -#else > -void xtensa_cpu_do_interrupt(CPUState *cs) > -{ > -} > -#endif > > bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > { > @@ -270,3 +265,5 @@ bool xtensa_cpu_exec_interrupt(CPUState *cs, int > interrupt_request) > } > return false; > } > + > +#endif /* !CONFIG_USER_ONLY */ > -- > 2.31.1 > > --000000000000ada9bf05cb090178 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Sep 2, 2021 at 9:19 AM Philip= pe Mathieu-Daud=C3=A9 <f4bug@amsat.or= g> wrote:
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
=C2=A0target/xtensa/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 | 4 ++--
=C2=A0target/xtensa/cpu.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 | 2 +-
=C2=A0target/xtensa/exc_helper.c | 7 ++-----
=C2=A03 files changed, 5 insertions(+), 8 deletions(-)

Reviewed-by: Warner Losh <imp@bsdimp.com>

=C2=A0
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 1e0cb1535ca..cbb720e7cca 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -566,14 +566,14 @@ struct XtensaCPU {
=C2=A0bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 MMUAccessType access_type, int mmu_idx,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 bool probe, uintptr_t retaddr);
+#ifndef CONFIG_USER_ONLY
=C2=A0void xtensa_cpu_do_interrupt(CPUState *cpu);
=C2=A0bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);=
-#ifndef CONFIG_USER_ONLY
=C2=A0void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, = vaddr addr,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned = size, MMUAccessType access_type,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0int mmu_i= dx, MemTxAttrs attrs,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MemTxResu= lt response, uintptr_t retaddr);
-#endif /* !CONFIG_USER_ONLY */
+#endif
=C2=A0void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
=C2=A0hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
=C2=A0void xtensa_count_regs(const XtensaConfig *config,
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 58ec3a08622..c1cbd03595e 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -192,11 +192,11 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = =3D {

=C2=A0static const struct TCGCPUOps xtensa_tcg_ops =3D {
=C2=A0 =C2=A0 =C2=A0.initialize =3D xtensa_translate_init,
-=C2=A0 =C2=A0 .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.tlb_fill =3D xtensa_cpu_tlb_fill,
=C2=A0 =C2=A0 =C2=A0.debug_excp_handler =3D xtensa_breakpoint_handler,

=C2=A0#ifndef CONFIG_USER_ONLY
+=C2=A0 =C2=A0 .cpu_exec_interrupt =3D xtensa_cpu_exec_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_interrupt =3D xtensa_cpu_do_interrupt,
=C2=A0 =C2=A0 =C2=A0.do_transaction_failed =3D xtensa_cpu_do_transaction_fa= iled,
=C2=A0 =C2=A0 =C2=A0.do_unaligned_access =3D xtensa_cpu_do_unaligned_access= ,
diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c
index 10e75ab070d..9bc7f50d355 100644
--- a/target/xtensa/exc_helper.c
+++ b/target/xtensa/exc_helper.c
@@ -255,11 +255,6 @@ void xtensa_cpu_do_interrupt(CPUState *cs)
=C2=A0 =C2=A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0check_interrupts(env);
=C2=A0}
-#else
-void xtensa_cpu_do_interrupt(CPUState *cs)
-{
-}
-#endif

=C2=A0bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request) =C2=A0{
@@ -270,3 +265,5 @@ bool xtensa_cpu_exec_interrupt(CPUState *cs, int interr= upt_request)
=C2=A0 =C2=A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0return false;
=C2=A0}
+
+#endif /* !CONFIG_USER_ONLY */
--
2.31.1

--000000000000ada9bf05cb090178--