From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pranavkumar Sawargaonkar Subject: Re: [PATCH] arm64: dts: Fix GIC reg sizes for APM X-Gene Date: Wed, 11 Feb 2015 09:39:28 +0530 Message-ID: References: <1422342206-4750-1-git-send-email-psawargaonkar@apm.com> <54C75B4B.6050709@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <54C75B4B.6050709@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: devicetree@vger.kernel.org Cc: Feng Kan , Arnd Bergmann , marc.zyngier@arm.com, Jon Masters , patches@apm.com, linux-arm-kernel@lists.infradead.org, Tushar Jagad , kvmarm@lists.cs.columbia.edu, Christoffer Dall List-Id: devicetree@vger.kernel.org Hi, On Tue, Jan 27, 2015 at 3:02 PM, Jon Masters wrote: > On 01/27/2015 02:03 AM, Pranavkumar Sawargaonkar wrote: >> In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned >> in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page >> size due to size alignment checking in vgic driver for VCPU Control and >> VCPU register. >> >> This patch corrects the sizes to be inline with the hardware spec. >> >> CC: linux-arm-kernel@lists.infradead.org >> CC: kvmarm@lists.cs.columbia.edu >> CC: arnd@arndb.de >> CC: marc.zyngier@arm.com >> CC: christoffer.dall@linaro.org >> CC: jcm@redhat.com >> Signed-off-by: Pranavkumar Sawargaonkar >> Signed-off-by: Tushar Jagad >> Signed-off-by: Feng Kan >> --- >> arch/arm64/boot/dts/apm/apm-storm.dtsi | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> index f1ad9c2..65f0e6d 100644 >> --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi >> +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> @@ -81,10 +81,10 @@ >> compatible = "arm,cortex-a15-gic"; >> #interrupt-cells = <3>; >> interrupt-controller; >> - reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */ >> - <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */ >> - <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */ >> - <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */ >> + reg = <0x0 0x78010000 0x0 0x10000>, /* GIC Dist */ >> + <0x0 0x78020000 0x0 0x20000>, /* GIC CPU */ >> + <0x0 0x78040000 0x0 0x10000>, /* GIC VCPU Control */ >> + <0x0 0x78060000 0x0 0x20000>; /* GIC VCPU */ >> interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */ >> }; Any comments on this patch ? > > Thanks. I confirm that we have tested this. > > Jon. > > Thanks, Pranav From mboxrd@z Thu Jan 1 00:00:00 1970 From: psawargaonkar@apm.com (Pranavkumar Sawargaonkar) Date: Wed, 11 Feb 2015 09:39:28 +0530 Subject: [PATCH] arm64: dts: Fix GIC reg sizes for APM X-Gene In-Reply-To: <54C75B4B.6050709@redhat.com> References: <1422342206-4750-1-git-send-email-psawargaonkar@apm.com> <54C75B4B.6050709@redhat.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On Tue, Jan 27, 2015 at 3:02 PM, Jon Masters wrote: > On 01/27/2015 02:03 AM, Pranavkumar Sawargaonkar wrote: >> In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned >> in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page >> size due to size alignment checking in vgic driver for VCPU Control and >> VCPU register. >> >> This patch corrects the sizes to be inline with the hardware spec. >> >> CC: linux-arm-kernel at lists.infradead.org >> CC: kvmarm at lists.cs.columbia.edu >> CC: arnd at arndb.de >> CC: marc.zyngier at arm.com >> CC: christoffer.dall at linaro.org >> CC: jcm at redhat.com >> Signed-off-by: Pranavkumar Sawargaonkar >> Signed-off-by: Tushar Jagad >> Signed-off-by: Feng Kan >> --- >> arch/arm64/boot/dts/apm/apm-storm.dtsi | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> index f1ad9c2..65f0e6d 100644 >> --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi >> +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> @@ -81,10 +81,10 @@ >> compatible = "arm,cortex-a15-gic"; >> #interrupt-cells = <3>; >> interrupt-controller; >> - reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */ >> - <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */ >> - <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */ >> - <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */ >> + reg = <0x0 0x78010000 0x0 0x10000>, /* GIC Dist */ >> + <0x0 0x78020000 0x0 0x20000>, /* GIC CPU */ >> + <0x0 0x78040000 0x0 0x10000>, /* GIC VCPU Control */ >> + <0x0 0x78060000 0x0 0x20000>; /* GIC VCPU */ >> interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */ >> }; Any comments on this patch ? > > Thanks. I confirm that we have tested this. > > Jon. > > Thanks, Pranav