From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754512Ab3JUOXa (ORCPT ); Mon, 21 Oct 2013 10:23:30 -0400 Received: from mail-ve0-f180.google.com ([209.85.128.180]:55859 "EHLO mail-ve0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754481Ab3JUOX1 (ORCPT ); Mon, 21 Oct 2013 10:23:27 -0400 MIME-Version: 1.0 In-Reply-To: <20131021065342.GW3521@intel.com> References: <1382326010-4554-1-git-send-email-bleung@chromium.org> <1382326010-4554-2-git-send-email-bleung@chromium.org> <20131021065342.GW3521@intel.com> Date: Mon, 21 Oct 2013 07:23:26 -0700 X-Google-Sender-Auth: vEIRltCUeVXwZODTRSq63_uK8pE Message-ID: Subject: Re: [PATCH 1/2] i2c-designware-pci: Add Haswell ULT device IDs From: Benson Leung To: Mika Westerberg Cc: wsa@the-dreams.de, khali@linux-fr.org, andriy.shevchenko@linux.intel.com, jacmet@sunsite.dk, linux-i2c@vger.kernel.org, "linux-kernel@vger.kernel.org" , Duncan Laurie Content-Type: text/plain; charset=ISO-8859-1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Oct 20, 2013 at 11:53 PM, Mika Westerberg wrote: >> + [haswell_0] = { >> + .bus_num = -1, >> + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD, >> + .tx_fifo_depth = 32, >> + .rx_fifo_depth = 32, >> + .clk_khz = 25000, > > The input clock for I2C in Haswell is 100MHz, not 25MHz. Thanks for catching that. I will fix it. -- Benson Leung Software Engineer, Chrom* OS bleung@chromium.org From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benson Leung Subject: Re: [PATCH 1/2] i2c-designware-pci: Add Haswell ULT device IDs Date: Mon, 21 Oct 2013 07:23:26 -0700 Message-ID: References: <1382326010-4554-1-git-send-email-bleung@chromium.org> <1382326010-4554-2-git-send-email-bleung@chromium.org> <20131021065342.GW3521@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Return-path: In-Reply-To: <20131021065342.GW3521-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> Sender: linux-i2c-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Mika Westerberg Cc: wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org, khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org, andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, jacmet-OfajU3CKLf1/SzgSGea1oA@public.gmane.org, linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Duncan Laurie List-Id: linux-i2c@vger.kernel.org On Sun, Oct 20, 2013 at 11:53 PM, Mika Westerberg wrote: >> + [haswell_0] = { >> + .bus_num = -1, >> + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD, >> + .tx_fifo_depth = 32, >> + .rx_fifo_depth = 32, >> + .clk_khz = 25000, > > The input clock for I2C in Haswell is 100MHz, not 25MHz. Thanks for catching that. I will fix it. -- Benson Leung Software Engineer, Chrom* OS bleung-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org