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[2607:f8b0:4864:20::a44]) by gmr-mx.google.com with ESMTPS id 63si46019ybe.4.2019.11.04.05.26.34 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 Nov 2019 05:26:34 -0800 (PST) Received-SPF: pass (google.com: domain of chime.evan.dri.devel@gmail.com designates 2607:f8b0:4864:20::a44 as permitted sender) client-ip=2607:f8b0:4864:20::a44; Authentication-Results: gmr-mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=OE5lBLlF; spf=pass (google.com: domain of chime.evan.dri.devel@gmail.com designates 2607:f8b0:4864:20::a44 as permitted sender) smtp.mailfrom=chime.evan.dri.devel@gmail.com; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: by mail-vk1-xa44.google.com with SMTP id r85so3772995vke.3 for ; Mon, 04 Nov 2019 05:26:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Vtl3FORPtY3N8TMJ2F0+1sInx6HH/Xp1cI3Nxpl9Qi8=; b=OE5lBLlFcSccy6FJ+Sd5xwKXzNv5qBix7r8VLELZCF/5qx5iRmQPJf9Xf+mospcVad ObDnhJwXlP/Xfu1lffvqUUBEnElEAcVrSpq6ARTFjEktppZWg0fWp0J9c74s4152NOXl LtnVSQ+z8qofvBYFUTmOEaVxvOE6vVs7+Q2TVMxXNMaebQZQ1E08DeIZna9i5WLzS/IA XPrDwz7INDpYvukyaHDLbvWFck15CnLgreboQ8BOeMU4//sVJaVjZ/7EvrXZ/TFblfwe qeQvKC6gyQjPR+ipSGPKiFFwDsWFVtn8d+58I4KR3U5CU8AZxARbux6TiJ/2LOvbNa60 UURQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Vtl3FORPtY3N8TMJ2F0+1sInx6HH/Xp1cI3Nxpl9Qi8=; b=jG0zx7F2Ec/1yIIx+2imSgWSf/QTJyqxBn33e+mOMMoYyYCgxaJn/mCsC6P0JLebaY W/qR7+UtrNksC4yqagRsCKhOufSCZMA3jD5Cbmd1iNdUS+pOX+vueECpNeI2ZHJ65n0d xLCFenn0EBwDSTgHgKl8x8ssq78uKC12m0qtXYOqrZWW3HXtQ+4AN5gS8ghQDSgEzLQw haO2zJgRpMUgUdnhYKfGOQLPVwugxvFNOw5W2MNysCnPrR7lN+sD2a50EaKbJwS8m9v+ sPyQsqvGO0skdey00ZkjjSyNCZm+zQ5EyAwENgFkqhxsSfDZiny9dehG2d04H1D8wqTW yGOg== X-Gm-Message-State: APjAAAVtpfVsz/z+Z5VteWC0w5Jps0dONtC/L67AwQiJxURq/Hf6PIm+ eWXKGSbUgDruOIhUiWxPg67EHbDkKq3KcNzH7hE= X-Received: by 2002:a1f:11d7:: with SMTP id 206mr282610vkr.19.1572873993908; Mon, 04 Nov 2019 05:26:33 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: evan chime Date: Mon, 4 Nov 2019 13:26:23 +0000 Message-ID: Subject: Re: [Outreachy kernel] [PATCH v2 0/3] Add comment to memory barrier To: Julia Lawall Cc: gregkh@linuxfoundation.org, laurent.pinchart@ideasonboard.com, mchehab@kernel.org, outreachy-kernel@googlegroups.com Content-Type: multipart/alternative; boundary="000000000000aef61a059685439d" --000000000000aef61a059685439d Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, 3 Nov 2019 at 16:27, evan chime wrote: > > On Sun, 3 Nov 2019 at 16:18, Julia Lawall wrote: > >> >> >> On Sun, 3 Nov 2019, Evan Chime wrote: >> >> > Include outreachy mailing list in "cc" list. No change >> > >> > Evan Chime (3): >> > Staging: media: omap4iss: Add comment to memory barrier >> > Staging: media: omap4iss: Add comment to memory barrier >> > Staging: media: omap4iss: Add comment to memory barrier >> >> Each patch should have a different subject. If you end up with patches >> with the same subject, you should make the subjects more specific or mer= ge >> them. >> >> In this case, though, I think that this is an issue that only someone wi= th >> a deep knowledge of the code could really address. The question is not >> what a memory barrier does, but why one is needed at a particular place = in >> the code. >> >> julia > > > Thanks for the feedback Julia > > Kind Regards > Evan > Please I have studied the function. From what I understand, the function checks if ISS submodule needs to wait for next interrupt. If yes, makes the caller to sleep while waiting for such event. The atomic_set(stopping, 1) indicates whether the submodule needs to wait, where stopping is the flag, and atomic_set(stopping, 0) indicates no need to wait According to the comment before the first atomic_set() call and the smp_wmb() call that follows which says: /* Atomic set() doesn=E2=80=99t include memory barrier on ARM platform for = SMP scenario. We=E2=80=99ll call it here to avoid race conditions */, the smp_w= mb() call is I think, to avoid reordering of the atomic_set() operation So can I use one of the following, as the comment A) prevent reordering of atomic_set() B) sync module with it=E2=80=99s idle state(from the comment that introduce= d the function) C) ensures *stopping is persistent D) none of the above :) > > >> >> > >> > drivers/staging/media/omap4iss/iss.c | 6 +++--- >> > 1 file changed, 3 insertions(+), 3 deletions(-) >> > >> > -- >> > 2.17.1 >> > >> > -- >> > You received this message because you are subscribed to the Google >> Groups "outreachy-kernel" group. >> > To unsubscribe from this group and stop receiving emails from it, send >> an email to outreachy-kernel+unsubscribe@googlegroups.com. >> > To view this discussion on the web visit >> https://groups.google.com/d/msgid/outreachy-kernel/cover.1572797322.git.= chime.evan.dri.devel%40gmail.com >> . >> > >> >> -- >> You received this message because you are subscribed to the Google Group= s >> "outreachy-kernel" group. >> To unsubscribe from this group and stop receiving emails from it, send a= n >> email to outreachy-kernel+unsubscribe@googlegroups.com. >> To view this discussion on the web visit >> https://groups.google.com/d/msgid/outreachy-kernel/alpine.DEB.2.21.19110= 31716390.2557%40hadrien >> . >> > --000000000000aef61a059685439d Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


On Sun, 3 Nov 2019 at 16:27, evan chime <chime.evan.dri.devel@gmail.com> w= rote:

On Sun, 3 Nov 2019 at 16:18, J= ulia Lawall <j= ulia.lawall@lip6.fr> wrote:
=

On Sun, 3 Nov 2019, Evan Chime wrote:

> Include outreachy mailing list in "cc" list. No change
>
> Evan Chime (3):
>=C2=A0 =C2=A0Staging: media: omap4iss: Add comment to memory barrier >=C2=A0 =C2=A0Staging: media: omap4iss: Add comment to memory barrier >=C2=A0 =C2=A0Staging: media: omap4iss: Add comment to memory barrier
Each patch should have a different subject.=C2=A0 If you end up with patche= s
with the same subject, you should make the subjects more specific or merge<= br> them.

In this case, though, I think that this is an issue that only someone with<= br> a deep knowledge of the code could really address.=C2=A0 The question is no= t
what a memory barrier does, but why one is needed at a particular place in<= br> the code.

julia

Thanks for = the feedback Julia

Kind= =C2=A0Regards
Evan=C2=A0

=

Please I have studied the function. From what I understand, the functio= n checks if ISS submodule needs to wait for next interrupt. If yes, makes t= he caller to sleep while waiting for such event.=C2=A0


The atomic_set(stopping, 1) indicates whether the = submodule needs to wait, where stopping is the flag, and atomic_set(stoppin= g, 0) indicates no need to wait=C2=A0

<= br>

According to the comment before the first atomic_set() call and the = smp_wmb() call that follows which says:

/* Atomic set() doesn=E2= =80=99t include memory barrier on ARM platform for SMP scenario. We=E2=80= =99ll call it here to avoid race conditions */, the smp_wmb() call is I thi= nk, to avoid reordering of the atomic_set() operation


So can I use one of the following, as the comment=C2= =A0


A) prevent reordering of ato= mic_set()


B) sync module with i= t=E2=80=99s idle state(from the comment that introduced the function)


C) ensures *stopping is persistent=C2= =A0


D) none of the above :)







>
>=C2=A0 drivers/staging/media/omap4iss/iss.c | 6 +++---
>=C2=A0 1 file changed, 3 insertions(+), 3 deletions(-)
>
> --
> 2.17.1
>
> --
> You received this message because you are subscribed to the Google Gro= ups "outreachy-kernel" group.
> To unsubscribe from this group and stop receiving emails from it, send= an email to outreachy-kernel+unsubscribe@googlegroups.com. > To view this discussion on the web visit https://groups.google.com= /d/msgid/outreachy-kernel/cover.1572797322.git.chime.evan.dri.devel%40gmail= .com.
>

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