From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030509AbcGGIbj (ORCPT ); Thu, 7 Jul 2016 04:31:39 -0400 Received: from mail-oi0-f67.google.com ([209.85.218.67]:35334 "EHLO mail-oi0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933365AbcGGIbd (ORCPT ); Thu, 7 Jul 2016 04:31:33 -0400 MIME-Version: 1.0 In-Reply-To: References: <1467863216-5521-1-git-send-email-wanpeng.li@hotmail.com> <1467863216-5521-2-git-send-email-wanpeng.li@hotmail.com> From: Wanpeng Li Date: Thu, 7 Jul 2016 16:31:31 +0800 Message-ID: Subject: Re: [PATCH v3 2/2] KVM: nVMX: Fix preemption timer bit set in vmcs02 even if L1 doesn't enable it To: Paolo Bonzini Cc: "linux-kernel@vger.kernel.org" , kvm , Wanpeng Li , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , Yunhong Jiang , Jan Kiszka , Haozhong Zhang Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2016-07-07 16:10 GMT+08:00 Paolo Bonzini : > > > On 07/07/2016 05:46, Wanpeng Li wrote: >> From: Wanpeng Li >> >> We will go to vcpu_run() loop after L0 emulates VMRESUME which incurs >> kvm_sched_out and kvm_sched_in operations since cond_resched() will be >> called once need resched. Preemption timer will be reprogrammed if vCPU >> is scheduled to a different pCPU. Then the preemption timer bit of vmcs02 >> will be set if L0 enable preemption timer to run L1 even if L1 doesn't >> enable preemption timer to run L2. >> >> This patch fix it by don't reprogram preemption timer of vmcs02 if L1's >> vCPU is scheduled on diffent pCPU when we are in the way to vmresume >> nested guest. > > Again, this is wrong. There is no reason why L1's APIC timer cannot be > emulated through the vmcs12's preemption timer setting. The only issue > is getting the pin-based execution controls right. This patch doesn't intend to implement "L1 TSC deadline timer to trigger while L2 is running", it just solves why vmcs02 is set even if exec_control = vmcs12->pin_based_vm_exec_control; exec_control |= vmcs_config.pin_based_exec_ctrl; exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER; We should set pin-based execution controls right to implement "L1 TSC deadline timer to trigger while L2 is running". Regards, Wanpeng Li