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Date: Tue, 18 Oct 2011 08:36:01 -0500
Message-ID: <CAN_cFWNKQxKnfZGd8zxvL_Z6J9h59rp-K5pe5f=s65zWJw9K0Q@mail.gmail.com>
Subject: Re: [PATCH 34/49] gma500: the GEM and GTT code is device independant
From: Rob Clark <rob.clark@linaro.org>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Hugh Dickins <hughd@google.com>,
        Patrik Jakobsson <patrik.r.jakobsson@gmail.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        Christoph Hellwig <hch@infradead.org>, greg@kroah.com,
        linux-kernel@vger.kernel.org
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On Tue, Oct 18, 2011 at 7:08 AM, Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
> On Tue, 18 Oct 2011 06:59:28 -0500
> Rob Clark <rob.clark@linaro.org> wrote:
>
>> On Tue, Oct 18, 2011 at 5:45 AM, Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
>> >> What troubles could you see for swap+uncached (or more likely,
>> >> writecombine) pages?
>> >
>> > That should never occur. I would argue the driver is responsible for
>> > putting the cache state of the page back sensibly before it unpins it.
>> > That's a simple enough rule and one I think all the drivers follow at
>> > this point.
>>
>> no, what I'm trying to avoid is having two virtual mappings to the
>> same physical page with different cache attributes.  This is not
>> allowed on some architectures (like ARM)
>
> Nor x86... that's a matter for the core architecture code to deal with
> not the drivers.
>

hmm, maybe I'm missing something, but how is this ensured on x86?
Default drm_gem_mmap() maps pages to userspace as writecombine..  but
if page comes from kernel linear map (not highmem), that will be a
cached kernel virtual mapping in addition to the wc userspace mapping.

BR,
-R

> Alan
>