From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by yocto-www.yoctoproject.org (Postfix, from userid 118) id 891D9E00819; Sun, 14 Sep 2014 04:10:52 -0700 (PDT) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on yocto-www.yoctoproject.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,HTML_MESSAGE, RCVD_IN_DNSWL_LOW autolearn=no version=3.3.1 X-Spam-HAM-Report: * -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low * trust * [209.85.216.50 listed in list.dnswl.org] * -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] * 0.0 HTML_MESSAGE BODY: HTML included in message Received: from mail-qa0-f50.google.com (mail-qa0-f50.google.com [209.85.216.50]) by yocto-www.yoctoproject.org (Postfix) with ESMTP id BB6F9E00801 for ; Sun, 14 Sep 2014 04:10:46 -0700 (PDT) Received: by mail-qa0-f50.google.com with SMTP id dc16so2657813qab.37 for ; Sun, 14 Sep 2014 04:10:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:content-type; bh=0hjXuzxao27G9kNto+5l2AQbAvyf1xIWJRAgrFPO+J0=; b=UjTyjjehHDUjV/osc3XBWS44GcScq/hArn9yVdd2PyCXi1jhubiM5D6w3gQylfamAy IkBP8D5ZKpW53AA6XmSft0oyJEoC4Hhi6TEzzcat8SW74aXojtAgB2tjIQMWq+Z1IaL0 ezQiA4jVRp8KGoiyl44mZLpaxJFsWW1p37RX1hgJV2ePRxsC/SBaUw3Czytn3wVtCoRT u9i27rn5U8IFd5xbag6mTaeuCaplHeN0KHD1JYN7ZcKMwQGdepQ9H5yjJuAF4w5jzYCy ROe2CNvNbYFq4SXBinpPCk6nIwO9b9ANbcXbE3g5Opv+0j5tAnqazqDmgmQhSZ58Fxcf V15g== X-Gm-Message-State: ALoCoQnHoFSEeNPwAaIU4xcQqiaxbq9LcbKx49iByhPCudzXxkpwKVt9AEwW1wTmaYhIs5KJSI3b X-Received: by 10.140.29.35 with SMTP id a32mr28667524qga.39.1410693045157; Sun, 14 Sep 2014 04:10:45 -0700 (PDT) MIME-Version: 1.0 Sender: wally.yeh@a-trust.com.tw Received: by 10.224.43.2 with HTTP; Sun, 14 Sep 2014 04:10:05 -0700 (PDT) In-Reply-To: <1410468058-19184-1-git-send-email-otavio@ossystems.com.br> References: <1410468058-19184-1-git-send-email-otavio@ossystems.com.br> From: Wally Yeh Date: Sun, 14 Sep 2014 19:10:05 +0800 X-Google-Sender-Auth: EjFi9-6Zqt8Jbj2uHqvjZX7vGR4 Message-ID: To: meta-freescale Subject: Re: [meta-fsl-arm][PATCH] u-boot-fslc: Update to 318d1cd revision X-BeenThere: meta-freescale@yoctoproject.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Usage and development list for the meta-fsl-* layers List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Sep 2014 11:10:52 -0000 Content-Type: multipart/alternative; boundary=001a113a4342d81ab00503049145 --001a113a4342d81ab00503049145 Content-Type: text/plain; charset=UTF-8 Hi: I have change u-boot-fslc from branch "patches-2014.01" to "patches-2014.07" this week. I notice that gpio_get_value( ) always return 0, no matter I set the bit 0 or 1. when I test gpio by adding #define CONFIG_CMD_GPIO in uboot_src/include/configs/mx6sabresd.h and using gpio toggle to toggle gpio for 3 ~ 4 times, it will failed to change the gpio polarity. Does anyone have the same issue on i.mx6Q sabreSD board? Wally 2014-09-12 4:40 GMT+08:00 Otavio Salvador : > This updates the 2014.07-based branch with more backports from the > 2014.10 upcoming release. The following changes are included: > > 318d1cd mx6sxsabresd: Add PCI support > 919802d pcie_imx: Add mx6solox support > 847d6ce mx6: imx-regs: Provide a structure for GPC registers > f26e33b mx6qsabreauto: Remove imx6q-sabreauto.dts > f22fd9d imx: nitrogen6x: Replace 'fatload' by 'load' command in env > settings to be filesystem independent > e45540b arm: vf610: lpuart: disable FIFO on initializaton > 11571b6 arm: vf610: lpuart: fix status register handling > 09e81f4 mx6: Fix ECSPI typo in soc_boot_modes > b8d5d42 imximage: Fix imximage IVT bug for EIM-NOR boot > 228135e iMX6: Disable the L2 before chaning the PL310 latency > 45108f1 tools: imximage: Fix the maximum DCD size for mx53/mx6 > 9f3f181 pci: add support for board_pci_fixup_dev function > 4ecf3e6 arm: mx6: add get_cpu_type() > b6faaf1 arm: mx6: ddr: fix cs0_end calculation > 07917e7 arm: mx6: ddr: configure MMDC for slow_pd > 66b2f14 arm: mx6: ddr: do not write into reserved bit > b3f847e arm: mx6: ddr: cleanup > eba02a9 i2c: imx: add macros to setup pads for multiple SoC types > e50e740 sata: dwc_ahsata: implement sata_port_status > a45361d compulab: eeprom: add support for defining eeprom i2c bus > 8f82ddd mx6: add clock enabling functions > 5305489 net: fec_mxc: Poll FEC_TBD_READY after polling TDAR > d5e440b net: fec_mxc: Adjust RX DMA alignment for mx6solox > fca8b5a usb: ci_udc: implement dfu_usb_get_reset > 7baddea arm: Add missing .vectors section to linker scripts > 324df11 arm: vf610: add NFC clock support > 10c68b2 arm: vf610: add NFC pin mux > 9bba571 ARM: Fix overflow in MMU setup > 7be9add api: fix build without CMD_NET support > 8a9e527 e1000: add i210 support > dcd2c8c e1000: Implement dcache support > > Signed-off-by: Otavio Salvador > --- > recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb | 2 +- > recipes-bsp/u-boot/u-boot-fslc_2014.07.bb | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb > b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb > index 8ea75ca..8e4331b 100644 > --- a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb > +++ b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb > @@ -7,7 +7,7 @@ PROVIDES = "u-boot-mxsboot" > > PV = "v2014.07" > > -SRCREV = "a824e891767f8bd15edf54013e23639a3228dc24" > +SRCREV = "318d1cd6bd6368316cc590e5985614a6fd0ffe82" > SRCBRANCH = "patches-2014.07" > SRC_URI = "git://github.com/Freescale/u-boot-imx.git;branch=${SRCBRANCH}" > > diff --git a/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb > b/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb > index b219161..3dee9fa 100644 > --- a/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb > +++ b/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb > @@ -2,5 +2,5 @@ include u-boot-fslc.inc > > PV = "v2014.07" > > -SRCREV = "a824e891767f8bd15edf54013e23639a3228dc24" > +SRCREV = "318d1cd6bd6368316cc590e5985614a6fd0ffe82" > SRCBRANCH = "patches-2014.07" > -- > 2.1.0 > > -- > _______________________________________________ > meta-freescale mailing list > meta-freescale@yoctoproject.org > https://lists.yoctoproject.org/listinfo/meta-freescale > --001a113a4342d81ab00503049145 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Hi:
=C2=A0 =C2=A0 I have change u-boot-fslc= from branch "patches-2014.01" to "patches-2014.07" thi= s week.

=C2=A0 =C2=A0 I notice that=C2=A0gpio_get_= value( ) always return 0, no matter I set the bit 0 or 1.
=C2=A0 =C2=A0 when I test gpio by adding #define CONFIG_CMD_GPI= O in uboot_src/include/configs/mx6sabresd.h
and using gpio toggle= <gpio_pin> to toggle gpio for 3 ~ 4 times, it will failed to change = the gpio polarity.

=C2=A0 =C2=A0 Does anyone have = the same issue on i.mx6Q sabreSD board?

Wally

2014-09-12= 4:40 GMT+08:00 Otavio Salvador <otavio@ossystems.com.br>:
This updates the 2014.07-based branc= h with more backports from the
2014.10 upcoming release. The following changes are included:

318d1cd mx6sxsabresd: Add PCI support
919802d pcie_imx: Add mx6solox support
847d6ce mx6: imx-regs: Provide a structure for GPC registers
f26e33b mx6qsabreauto: Remove imx6q-sabreauto.dts
f22fd9d imx: nitrogen6x: Replace 'fatload' by 'load' comman= d in env settings to be filesystem independent
e45540b arm: vf610: lpuart: disable FIFO on initializaton
11571b6 arm: vf610: lpuart: fix status register handling
09e81f4 mx6: Fix ECSPI typo in soc_boot_modes
b8d5d42 imximage: Fix imximage IVT bug for EIM-NOR boot
228135e iMX6: Disable the L2 before chaning the PL310 latency
45108f1 tools: imximage: Fix the maximum DCD size for mx53/mx6
9f3f181 pci: add support for board_pci_fixup_dev function
4ecf3e6 arm: mx6: add get_cpu_type()
b6faaf1 arm: mx6: ddr: fix cs0_end calculation
07917e7 arm: mx6: ddr: configure MMDC for slow_pd
66b2f14 arm: mx6: ddr: do not write into reserved bit
b3f847e arm: mx6: ddr: cleanup
eba02a9 i2c: imx: add macros to setup pads for multiple SoC types
e50e740 sata: dwc_ahsata: implement sata_port_status
a45361d compulab: eeprom: add support for defining eeprom i2c bus
8f82ddd mx6: add clock enabling functions
5305489 net: fec_mxc: Poll FEC_TBD_READY after polling TDAR
d5e440b net: fec_mxc: Adjust RX DMA alignment for mx6solox
fca8b5a usb: ci_udc: implement dfu_usb_get_reset
7baddea arm: Add missing .vectors section to linker scripts
324df11 arm: vf610: add NFC clock support
10c68b2 arm: vf610: add NFC pin mux
9bba571 ARM: Fix overflow in MMU setup
7be9add api: fix build without CMD_NET support
8a9e527 e1000: add i210 support
dcd2c8c e1000: Implement dcache support

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---
=C2=A0recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb | 2 +-
=C2=A0recipes-bsp/u-boot/u-boot-fslc_2014.07.bb=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| 2= +-
=C2=A02 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb b/recipes-bsp/u= -boot/u= -boot-fslc-mxsboot_2014.07.bb
index 8ea75ca..8e4331b 100644
--- a/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb
+++ b/recipes-bsp/u-boot/u-boot-fslc-mxsboot_2014.07.bb
@@ -7,7 +7,7 @@ PROVIDES =3D "u-boot-mxsboot"

=C2=A0PV =3D "v2014.07"

-SRCREV =3D "a824e891767f8bd15edf54013e23639a3228dc24"
+SRCREV =3D "318d1cd6bd6368316cc590e5985614a6fd0ffe82"
=C2=A0SRCBRANCH =3D "patches-2014.07"
=C2=A0SRC_URI =3D "git://github.com/Freescale/u-bo= ot-imx.git;branch=3D${SRCBRANCH}"

diff --git a/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb b/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb
index b219161..3dee9fa 100644
--- a/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb
+++ b/recipes-bsp/u-boot/u-boot-fslc_2014.07.bb
@@ -2,5 +2,5 @@ include u-boot-fslc.inc

=C2=A0PV =3D "v2014.07"

-SRCREV =3D "a824e891767f8bd15edf54013e23639a3228dc24"
+SRCREV =3D "318d1cd6bd6368316cc590e5985614a6fd0ffe82"
=C2=A0SRCBRANCH =3D "patches-2014.07"
--
2.1.0

--
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