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From: Alan Tull <atull@kernel.org>
To: Wu Hao <hao.wu@intel.com>
Cc: Moritz Fischer <mdf@kernel.org>,
	linux-fpga@vger.kernel.org,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-api@vger.kernel.org, "Kang, Luwei" <luwei.kang@intel.com>,
	"Zhang, Yi Z" <yi.z.zhang@intel.com>,
	Xiao Guangrong <guangrong.xiao@linux.intel.com>,
	Tim Whisonant <tim.whisonant@intel.com>,
	Enno Luebbers <enno.luebbers@intel.com>,
	Shiva Rao <shiva.rao@intel.com>,
	Christopher Rauer <christopher.rauer@intel.com>
Subject: Re: [PATCH v5 09/28] fpga: dfl: add feature device infrastructure
Date: Tue, 5 Jun 2018 16:14:43 -0500	[thread overview]
Message-ID: <CANk1AXRyqn_Y26HZiYkFQUoWUVzc89F-znVNWQXGAk+arNB6XA@mail.gmail.com> (raw)
In-Reply-To: <1525229431-3087-10-git-send-email-hao.wu@intel.com>

On Tue, May 1, 2018 at 9:50 PM, Wu Hao <hao.wu@intel.com> wrote:

Hi Hao,

Some minor things, otherwise looks fine.

> From: Xiao Guangrong <guangrong.xiao@linux.intel.com>
>
> This patch abstracts the common operations of the sub features, and defines
> the feature_ops data structure, including init, uinit and ioctl function
> pointers. And this patch adds some common helper functions for FME and AFU
> drivers, e.g dfl_feature_dev_use_begin/end which are used to ensure
> exclusive usage of the feature device file.
>
> Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
> Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
> Signed-off-by: Shiva Rao <shiva.rao@intel.com>
> Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
> Signed-off-by: Kang Luwei <luwei.kang@intel.com>
> Signed-off-by: Zhang Yi <yi.z.zhang@intel.com>
> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>

> ---
> v2: rebased
> v3: use const for feature_ops.
>     replace pci related function.
> v4: rebase and add more comments in code.
> v5: remove useless WARN_ON().
>     reorder declarations in functions per suggestion from Moritz.
>     add "dfl_" prefix to functions and data structure.
> ---
>  drivers/fpga/dfl.c | 57 +++++++++++++++++++++++++++++++++++++
>  drivers/fpga/dfl.h | 82 +++++++++++++++++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 138 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index 1e06efb..c4c47d6 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -74,6 +74,63 @@ static enum dfl_id_type feature_dev_id_type(struct platform_device *pdev)
>         return DFL_ID_MAX;
>  }
>
> +void dfl_fpga_dev_feature_uinit(struct platform_device *pdev)
> +{
> +       struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
> +       struct dfl_feature *feature;
> +
> +       dfl_fpga_dev_for_each_feature(pdata, feature)
> +               if (feature->ops) {
> +                       feature->ops->uinit(pdev, feature);
> +                       feature->ops = NULL;
> +               }
> +}
> +EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit);

Please add kernel-doc for functions that are exported to recommend and
guide their usage.

> +
> +static int dfl_feature_instance_init(struct platform_device *pdev,
> +                                    struct dfl_feature_platform_data *pdata,
> +                                    struct dfl_feature *feature,
> +                                    struct dfl_feature_driver *drv)
> +{
> +       int ret;
> +
> +       ret = drv->ops->init(pdev, feature);
> +       if (ret)
> +               return ret;
> +
> +       feature->ops = drv->ops;
> +
> +       return ret;
> +}
> +
> +int dfl_fpga_dev_feature_init(struct platform_device *pdev,
> +                             struct dfl_feature_driver *feature_drvs)
> +{
> +       struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
> +       struct dfl_feature_driver *drv = feature_drvs;
> +       struct dfl_feature *feature;
> +       int ret;
> +
> +       while (drv->ops) {
> +               dfl_fpga_dev_for_each_feature(pdata, feature) {
> +                       /* match feature and drv using id */
> +                       if (feature->id == drv->id) {
> +                               ret = dfl_feature_instance_init(pdev, pdata,
> +                                                               feature, drv);
> +                               if (ret)
> +                                       goto exit;
> +                       }
> +               }
> +               drv++;
> +       }
> +
> +       return 0;
> +exit:
> +       dfl_fpga_dev_feature_uinit(pdev);
> +       return ret;
> +}
> +EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_init);
> +
>  struct dfl_chardev_info {
>         const char *name;
>         dev_t devt;
> diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> index 2b6aaef..27f7a74 100644
> --- a/drivers/fpga/dfl.h
> +++ b/drivers/fpga/dfl.h
> @@ -132,6 +132,17 @@
>  #define PORT_CTRL_SFTRST_ACK   BIT_ULL(4)              /* HW ack for reset */
>
>  /**
> + * struct dfl_feature_driver - sub feature's driver
> + *
> + * @id: sub feature id.
> + * @ops: ops of this sub feature.
> + */
> +struct dfl_feature_driver {
> +       u64 id;
> +       const struct dfl_feature_ops *ops;
> +};
> +
> +/**
>   * struct dfl_feature - sub feature of the feature devices
>   *
>   * @id: sub feature id.
> @@ -139,13 +150,17 @@
>   *                 this index is used to find its mmio resource from the
>   *                 feature dev (platform device)'s reources.
>   * @ioaddr: mapped mmio resource address.
> + * @ops: ops of this sub feature.
>   */
>  struct dfl_feature {
>         u64 id;
>         int resource_index;
>         void __iomem *ioaddr;
> +       const struct dfl_feature_ops *ops;
>  };
>
> +#define DEV_STATUS_IN_USE      0
> +
>  /**
>   * struct dfl_feature_platform_data - platform data for feature devices
>   *
> @@ -156,6 +171,8 @@ struct dfl_feature {
>   * @dfl_cdev: ptr to container device.
>   * @disable_count: count for port disable.
>   * @num: number for sub features.
> + * @dev_status: dev status (e.g DEV_STATUS_IN_USE).
> + * @private: ptr to feature dev private data.
>   * @features: sub features of this feature dev.
>   */
>  struct dfl_feature_platform_data {
> @@ -165,11 +182,49 @@ struct dfl_feature_platform_data {
>         struct platform_device *dev;
>         struct dfl_fpga_cdev *dfl_cdev;
>         unsigned int disable_count;
> -
> +       unsigned long dev_status;
> +       void *private;
>         int num;
>         struct dfl_feature features[0];
>  };
>
> +static inline
> +int dfl_feature_dev_use_begin(struct dfl_feature_platform_data *pdata)
> +{
> +       /* Test and set IN_USE flags to ensure file is exclusively used */
> +       if (test_and_set_bit_lock(DEV_STATUS_IN_USE, &pdata->dev_status))
> +               return -EBUSY;
> +
> +       return 0;
> +}
> +
> +static inline
> +void dfl_feature_dev_use_end(struct dfl_feature_platform_data *pdata)
> +{
> +       clear_bit_unlock(DEV_STATUS_IN_USE, &pdata->dev_status);
> +}
> +
> +static inline
> +void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata,
> +                               void *private)
> +{
> +       pdata->private = private;
> +}
> +
> +static inline
> +void *dfl_fpga_pdata_get_private(struct dfl_feature_platform_data *pdata)
> +{
> +       return pdata->private;
> +}
> +
> +struct dfl_feature_ops {
> +       int (*init)(struct platform_device *pdev, struct dfl_feature *feature);
> +       void (*uinit)(struct platform_device *pdev,
> +                     struct dfl_feature *feature);
> +       long (*ioctl)(struct platform_device *pdev, struct dfl_feature *feature,
> +                     unsigned int cmd, unsigned long arg);
> +};
> +
>  #define DFL_FPGA_FEATURE_DEV_FME               "dfl-fme"
>  #define DFL_FPGA_FEATURE_DEV_PORT              "dfl-port"

Please move these to the same place as other things that will need to
be added to as feature devices are added as noted in the other reviews
today.

>
> @@ -179,6 +234,10 @@ static inline int dfl_feature_platform_data_size(const int num)
>                 num * sizeof(struct dfl_feature);
>  }
>
> +void dfl_fpga_dev_feature_uinit(struct platform_device *pdev);
> +int dfl_fpga_dev_feature_init(struct platform_device *pdev,
> +                             struct dfl_feature_driver *feature_drvs);
> +
>  enum dfl_fpga_devt_type {
>         DFL_FPGA_DEVT_FME,
>         DFL_FPGA_DEVT_PORT,
> @@ -190,6 +249,16 @@ int dfl_fpga_register_dev_ops(struct platform_device *pdev,
>                               struct module *owner);
>  void dfl_fpga_unregister_dev_ops(struct platform_device *pdev);
>
> +static inline
> +struct platform_device *dfl_fpga_inode_to_feature_dev(struct inode *inode)
> +{
> +       struct dfl_feature_platform_data *pdata;
> +
> +       pdata = container_of(inode->i_cdev, struct dfl_feature_platform_data,
> +                            cdev);
> +       return pdata->dev;
> +}
> +
>  #define dfl_fpga_dev_for_each_feature(pdata, feature)                      \
>         for ((feature) = (pdata)->features;                                 \
>            (feature) < (pdata)->features + (pdata)->num; (feature)++)
> @@ -219,6 +288,17 @@ void __iomem *dfl_get_feature_ioaddr_by_id(struct device *dev, u64 id)
>         return NULL;
>  }
>
> +static inline bool is_dfl_feature_present(struct device *dev, u64 id)
> +{
> +       return !!dfl_get_feature_ioaddr_by_id(dev, id);
> +}
> +
> +static inline
> +struct device *dfl_fpga_pdata_to_parent(struct dfl_feature_platform_data *pdata)
> +{
> +       return pdata->dev->dev.parent->parent;
> +}
> +
>  static inline bool dfl_feature_is_fme(void __iomem *base)
>  {
>         u64 v = readq(base + DFH);
> --
> 1.8.3.1
>

  reply	other threads:[~2018-06-05 21:15 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-02  2:50 [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Wu Hao
2018-05-02  2:50 ` [PATCH v5 01/28] docs: fpga: add a document for FPGA Device Feature List (DFL) Framework Overview Wu Hao
2018-06-06 16:16   ` Alan Tull
2018-06-07  2:00     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 02/28] fpga: mgr: add region_id to fpga_image_info Wu Hao
2018-05-02  2:50 ` [PATCH v5 03/28] fpga: mgr: add status for fpga-manager Wu Hao
2018-05-02  2:50 ` [PATCH v5 04/28] fpga: mgr: add compat_id support Wu Hao
2018-05-07 21:09   ` Alan Tull
2018-05-21  3:03     ` Wu Hao
2018-05-21 17:33       ` Alan Tull
2018-05-22  9:39         ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 05/28] fpga: region: " Wu Hao
2018-05-07 21:09   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 06/28] fpga: add device feature list support Wu Hao
2018-06-05 20:21   ` Alan Tull
2018-06-06 12:22     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 07/28] fpga: dfl: add chardev support for feature devices Wu Hao
2018-06-05 20:21   ` Alan Tull
2018-06-06 12:24     ` Wu Hao
2018-06-07 18:03       ` Alan Tull
2018-06-08  0:11         ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 08/28] fpga: dfl: add dfl_fpga_cdev_find_port Wu Hao
2018-05-02  2:50 ` [PATCH v5 09/28] fpga: dfl: add feature device infrastructure Wu Hao
2018-06-05 21:14   ` Alan Tull [this message]
2018-06-06 12:33     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 10/28] fpga: dfl: add dfl_fpga_port_ops support Wu Hao
2018-06-05 21:24   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 11/28] fpga: dfl: add dfl_fpga_check_port_id function Wu Hao
2018-06-05 21:25   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 12/28] fpga: add FPGA DFL PCIe device driver Wu Hao
2018-05-02  2:50 ` [PATCH v5 13/28] fpga: dfl-pci: add enumeration for feature devices Wu Hao
2018-05-02  2:50 ` [PATCH v5 14/28] fpga: dfl: add FPGA Management Engine driver basic framework Wu Hao
2018-06-06 16:08   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 15/28] fpga: dfl: fme: add header sub feature support Wu Hao
2018-05-02  2:50 ` [PATCH v5 16/28] fpga: dfl: fme: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02  2:50 ` [PATCH v5 17/28] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2018-06-06 16:08   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 18/28] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-06-06 15:52   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 19/28] fpga: dfl: fme-mgr: add compat_id support Wu Hao
2018-05-07 21:12   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 20/28] fpga: dfl: add fpga bridge platform driver for FME Wu Hao
2018-05-23 15:15   ` Alan Tull
2018-05-23 15:28     ` Wu Hao
2018-05-23 21:06       ` Alan Tull
2018-05-23 23:42         ` Wu Hao
2018-05-24 17:26           ` Alan Tull
2018-05-24 23:59             ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 21/28] fpga: dfl: add fpga region " Wu Hao
2018-05-02  2:50 ` [PATCH v5 22/28] fpga: dfl: fme-region: add support for compat_id Wu Hao
2018-05-07 21:12   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 23/28] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2018-05-02  2:50 ` [PATCH v5 24/28] fpga: dfl: afu: add port ops support Wu Hao
2018-06-06 15:57   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 25/28] fpga: dfl: afu: add header sub feature support Wu Hao
2018-05-02  2:50 ` [PATCH v5 26/28] fpga: dfl: afu: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02  2:50 ` [PATCH v5 27/28] fpga: dfl: afu: add afu sub feature support Wu Hao
2018-06-06 16:04   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 28/28] fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2018-06-06 16:09   ` Alan Tull
2018-05-03 21:14 ` [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Alan Tull
2018-05-04  0:15   ` Wu Hao

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