From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751425AbdCXRdp (ORCPT ); Fri, 24 Mar 2017 13:33:45 -0400 Received: from mail-qk0-f194.google.com ([209.85.220.194]:34169 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750767AbdCXRdf (ORCPT ); Fri, 24 Mar 2017 13:33:35 -0400 MIME-Version: 1.0 In-Reply-To: <20170324152318.GA13089@tyrael.amer.corp.natinst.com> References: <1489781473-30772-1-git-send-email-mdf@kernel.org> <20170324145908.aiijqixf5xcnkksa@rob-hp-laptop> <20170324152318.GA13089@tyrael.amer.corp.natinst.com> From: Alan Tull Date: Fri, 24 Mar 2017 12:25:25 -0500 Message-ID: Subject: Re: [PATCH v3 1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler To: Moritz Fischer Cc: Rob Herring , Moritz Fischer , linux-fpga@vger.kernel.org, Mark Rutland , "linux-arm-kernel@lists.infradead.org" , Greg Kroah-Hartman , Michal Simek , =?UTF-8?Q?S=C3=B6ren_Brinkmann?= , linux-kernel , "devicetree@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v2OHXnwh010466 On Fri, Mar 24, 2017 at 10:23 AM, Moritz Fischer wrote: > On Fri, Mar 24, 2017 at 09:59:08AM -0500, Rob Herring wrote: >> On Fri, Mar 17, 2017 at 01:11:12PM -0700, Moritz Fischer wrote: >> > This adds the binding documentation for the Xilinx LogiCORE PR >> > Decoupler soft core. >> > >> > Signed-off-by: Moritz Fischer >> > Cc: Michal Simek >> > Cc: Sören Brinkmann >> > Cc: linux-kernel@vger.kernel.org >> > Cc: devicetree@vger.kernel.org >> > --- >> > >> > Changes from v2: >> > - Added refence to generic fpga-region bindings >> > - Fixed up reg property in example >> > - Added fallback to "xlnx,pr-decoupler" without version >> > >> > Changes from v1: >> > - Added clock names & clock to example >> > - Merged some of the description from Michal's version >> > >> > --- >> > .../bindings/fpga/xilinx-pr-decoupler.txt | 35 ++++++++++++++++++++++ >> > 1 file changed, 35 insertions(+) >> > create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt >> > >> > diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt >> > new file mode 100644 >> > index 0000000..16141bd >> > --- /dev/null >> > +++ b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt >> > @@ -0,0 +1,35 @@ >> > +Xilinx LogiCORE Partial Reconfig Decoupler Softcore >> > + >> > +The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more >> > +decouplers / fpga bridges. >> > +The controller can decouple/disable the bridges which prevents signal >> > +changes from passing through the bridge. The controller can also >> > +couple / enable the bridges which allows traffic to pass through the >> > +bridge normally. >> > + >> > +The Driver supports only MMIO handling. A PR region can have multiple >> > +PR Decouples which can bhe handled independently or chaines via decouple/ >> >> s/chaines/chains/ > > Fixed in v4. > >> > +decouple_status signals. >> > + >> > +Required properties: >> > +- compatible : Should contain "xlnx,pr-decoupler-1.00" >> > +- regs : base address and size for decoupler module >> > +- clocks : input clock to IP >> > +- clock-names : should contain "aclk" >> > + >> > +Optional properties: >> > +- bridge-enable : 0 if driver should disable bridge at startup >> > + 1 if driver should enable bridge at startup >> > + Default is to leave bridge in current state. >> >> This is common and should move into a common doc. Maybe fpga-region.txt >> works? > > Ok will add patch for that to v5 series. Arg, our emails criss-crossed. I've already sent v4 to Greg. I hope we don't need v5 for this one thing. bridge-enable is common for the fpga bridges (altera-fpga2sdram-bridge.txt, altera-freeze-bridge.txt, altera-hps2fpga-bridge.txt, xilinx-pr-decoupler.txt). Probably we need a new patch to move this common bridges binding from all the above to fpga-region.txt or create a new fpga-bridges.txt. At first blush, I prefer the later. Alan > > Thanks for your feedback, > > Moritz From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alan Tull Subject: Re: [PATCH v3 1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler Date: Fri, 24 Mar 2017 12:25:25 -0500 Message-ID: References: <1489781473-30772-1-git-send-email-mdf@kernel.org> <20170324145908.aiijqixf5xcnkksa@rob-hp-laptop> <20170324152318.GA13089@tyrael.amer.corp.natinst.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170324152318.GA13089@tyrael.amer.corp.natinst.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Moritz Fischer Cc: Mark Rutland , Rob Herring , "devicetree@vger.kernel.org" , Greg Kroah-Hartman , linux-fpga@vger.kernel.org, Michal Simek , linux-kernel , Moritz Fischer , =?UTF-8?Q?S=C3=B6ren_Brinkmann?= , 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<1489781473-30772-1-git-send-email-mdf@kernel.org> <20170324145908.aiijqixf5xcnkksa@rob-hp-laptop> <20170324152318.GA13089@tyrael.amer.corp.natinst.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Mar 24, 2017 at 10:23 AM, Moritz Fischer wrote: > On Fri, Mar 24, 2017 at 09:59:08AM -0500, Rob Herring wrote: >> On Fri, Mar 17, 2017 at 01:11:12PM -0700, Moritz Fischer wrote: >> > This adds the binding documentation for the Xilinx LogiCORE PR >> > Decoupler soft core. >> > >> > Signed-off-by: Moritz Fischer >> > Cc: Michal Simek >> > Cc: S?ren Brinkmann >> > Cc: linux-kernel at vger.kernel.org >> > Cc: devicetree at vger.kernel.org >> > --- >> > >> > Changes from v2: >> > - Added refence to generic fpga-region bindings >> > - Fixed up reg property in example >> > - Added fallback to "xlnx,pr-decoupler" without version >> > >> > Changes from v1: >> > - Added clock names & clock to example >> > - Merged some of the description from Michal's version >> > >> > --- >> > .../bindings/fpga/xilinx-pr-decoupler.txt | 35 ++++++++++++++++++++++ >> > 1 file changed, 35 insertions(+) >> > create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt >> > >> > diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt >> > new file mode 100644 >> > index 0000000..16141bd >> > --- /dev/null >> > +++ b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt >> > @@ -0,0 +1,35 @@ >> > +Xilinx LogiCORE Partial Reconfig Decoupler Softcore >> > + >> > +The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more >> > +decouplers / fpga bridges. >> > +The controller can decouple/disable the bridges which prevents signal >> > +changes from passing through the bridge. The controller can also >> > +couple / enable the bridges which allows traffic to pass through the >> > +bridge normally. >> > + >> > +The Driver supports only MMIO handling. A PR region can have multiple >> > +PR Decouples which can bhe handled independently or chaines via decouple/ >> >> s/chaines/chains/ > > Fixed in v4. > >> > +decouple_status signals. >> > + >> > +Required properties: >> > +- compatible : Should contain "xlnx,pr-decoupler-1.00" >> > +- regs : base address and size for decoupler module >> > +- clocks : input clock to IP >> > +- clock-names : should contain "aclk" >> > + >> > +Optional properties: >> > +- bridge-enable : 0 if driver should disable bridge at startup >> > + 1 if driver should enable bridge at startup >> > + Default is to leave bridge in current state. >> >> This is common and should move into a common doc. Maybe fpga-region.txt >> works? > > Ok will add patch for that to v5 series. Arg, our emails criss-crossed. I've already sent v4 to Greg. I hope we don't need v5 for this one thing. bridge-enable is common for the fpga bridges (altera-fpga2sdram-bridge.txt, altera-freeze-bridge.txt, altera-hps2fpga-bridge.txt, xilinx-pr-decoupler.txt). Probably we need a new patch to move this common bridges binding from all the above to fpga-region.txt or create a new fpga-bridges.txt. At first blush, I prefer the later. Alan > > Thanks for your feedback, > > Moritz