From: Alan Tull <email@example.com> To: Moritz Fischer <firstname.lastname@example.org> Cc: "Nadathur, Sundar" <email@example.com>, Yves Vandervennet <firstname.lastname@example.org>, Jason Gunthorpe <email@example.com>, "firstname.lastname@example.org" <email@example.com>, linux-kernel <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org> Subject: Re: [RFC 7/8] fpga-region: add sysfs interface Date: Sun, 19 Feb 2017 17:16:11 -0600 [thread overview] Message-ID: <CANk1AXTVuVJR6mAKPWgs-+fyRRU1akgmYidu2ubcGJXAwu0oBQ@mail.gmail.com> (raw) In-Reply-To: <CANk1AXTCi6ccimHmXrNPXUn_MJBAoserCmC2kmapQ3Y=zjM79w@mail.gmail.com> On Sun, Feb 19, 2017 at 9:00 AM, Alan Tull <email@example.com> wrote: > On Sat, Feb 18, 2017 at 2:45 PM, Moritz Fischer > <firstname.lastname@example.org> wrote: >> On Sat, Feb 18, 2017 at 02:10:43PM -0600, Alan Tull wrote: >>> On Sat, Feb 18, 2017 at 6:45 AM, Nadathur, Sundar >>> <email@example.com> wrote: >>> >>> > Hi all, >>> > Interesting discussion. The discussion so far has brought out many concerns such as OS independence. There is an existing format, well-known to developers, with widespread support, and which is quite extensible: Type-Length-Value triples. >>> > >>> > To elaborate, a TLV-based format has many advantages: >>> > * It is highly extensible in many ways >>> > -- You can express structures and arrays using TLVs. Our needs right now may seem limited but requirements grow over time. > > Device tree can express arrays. > >>> > -- The space of Type values can be decomposed into standard pre-defined values that are in upstreamed code, and possibly experimental or feature-specific values. >>> > -- Forward compatibility: We can write parsers that can skip unexpected type values, thus allowing old parsers to work with new additions. With some tweaks, old parsers can also reject unexpected values in some ranges while accepting them in other ranges. >>> > * It is OS-independent. >>> > * It can be easily parsed, in kernel or user space. >> >> Are there other users of the format? I have to admit I didn't look very >> long, but couldn't find any libs / existing code at a first glance. > > Is there a standard you are looking at? Have you seen any use of TLV's > in the Linux kernel you could point to? > >> >>> > * It can be validated, in terms of Type values, acceptable lengths, etc. >>> > >>> > It is not directly human-readable but that can be easily addressed with a tool that parses TLVs. >>> > >>> > Compared to some other proposals: >>> > * Compared to DTs, TLVs are OS-independent. >> >> That's just alternative facts here. Just because Linux uses fdt for >> devicetree blobs it is *not* OS dependent. There are several (see >> last email) non-Linux users of fdt / libfdt. >> >> Thanks, >> >> Moritz > > It is worth repeating that libdtc is GPL/BSD with the intent of > allowing proprietary code to use libdtc. So license shouldn't be a barrier. > > Using device tree in the header would give us a way of doing enumeration at > least for Linux, not sure if that kind of info can be used in Windows > in some way. Actually, enumeration is the only advantage I see with DT. Currently I like key/value pairs because they are easily implemented and expandable without being rigid in any way. If we use key/value pairs, we could pass in child device info in one of the keys. It could be either a device tree overlay or an ACPI overlay. Or could just be left out. So platforms that aren't already using DT wouldn't have to. Platforms that are have a smooth road to enumeration. Alan > > Alan
next prev parent reply other threads:[~2017-02-19 23:16 UTC|newest] Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-02-15 16:14 FPGA Region enhancements and fixes Alan Tull 2017-02-15 16:14 ` [RFC 1/8] fpga-mgr: add a single function for fpga loading methods Alan Tull 2017-02-16 0:36 ` matthew.gerlach 2017-02-15 16:14 ` [RFC 2/8] fpga-region: support more than one overlay per FPGA region Alan Tull 2017-02-16 16:50 ` matthew.gerlach 2017-02-16 17:35 ` Alan Tull 2017-02-15 16:14 ` [RFC 3/8] fpga-bridge: add non-dt support Alan Tull 2017-02-15 16:14 ` [RFC 4/8] doc: fpga-mgr: separate getting/locking FPGA manager Alan Tull 2017-02-17 17:14 ` Li, Yi 2017-02-17 21:55 ` Alan Tull 2017-02-17 17:52 ` Moritz Fischer 2017-02-17 22:02 ` Alan Tull 2017-02-15 16:14 ` [RFC 5/8] " Alan Tull 2017-02-15 16:14 ` [RFC 6/8] fpga-region: separate out common code to allow non-dt support Alan Tull 2017-02-15 16:14 ` [RFC 7/8] fpga-region: add sysfs interface Alan Tull 2017-02-15 17:21 ` Jason Gunthorpe 2017-02-15 17:46 ` Alan Tull 2017-02-15 17:55 ` Moritz Fischer 2017-02-15 18:06 ` Jason Gunthorpe 2017-02-15 18:23 ` Alan Tull 2017-02-15 18:31 ` Moritz Fischer 2017-02-15 19:49 ` Jason Gunthorpe 2017-02-15 22:49 ` Alan Tull 2017-02-15 23:07 ` Jason Gunthorpe 2017-02-15 20:07 ` matthew.gerlach 2017-02-15 20:37 ` Jason Gunthorpe 2017-02-15 20:54 ` Moritz Fischer 2017-02-15 21:15 ` Jason Gunthorpe 2017-02-15 21:36 ` Moritz Fischer 2017-02-15 22:42 ` Alan Tull 2017-02-16 0:16 ` Moritz Fischer 2017-02-16 17:47 ` Alan Tull 2017-02-16 17:56 ` Jason Gunthorpe 2017-02-16 18:11 ` Moritz Fischer 2017-02-17 22:28 ` Yves Vandervennet 2017-02-18 2:30 ` Moritz Fischer 2017-02-18 12:45 ` Nadathur, Sundar 2017-02-18 20:10 ` Alan Tull 2017-02-18 20:45 ` Moritz Fischer 2017-02-19 15:00 ` Alan Tull 2017-02-19 23:16 ` Alan Tull [this message] 2017-02-20 23:49 ` Moritz Fischer 2017-02-21 18:33 ` Alan Tull 2017-02-22 3:13 ` Nadathur, Sundar 2017-02-22 3:49 ` Moritz Fischer 2017-02-22 5:12 ` Jason Gunthorpe 2017-02-22 5:38 ` Moritz Fischer 2017-02-22 5:46 ` Nadathur, Sundar 2017-02-22 6:05 ` Moritz Fischer 2017-02-22 16:44 ` Jason Gunthorpe 2017-02-22 17:50 ` Moritz Fischer 2017-02-22 17:54 ` Jason Gunthorpe 2017-02-22 17:57 ` Moritz Fischer 2017-02-22 16:33 ` Alan Tull 2017-02-22 16:44 ` Moritz Fischer 2017-02-22 16:52 ` Alan Tull 2017-02-27 20:09 ` Alan Tull 2017-02-27 22:49 ` Moritz Fischer 2017-02-28 0:04 ` matthew.gerlach 2017-02-15 21:20 ` Anatolij Gustschin 2017-02-15 16:14 ` [RFC 8/8] doc: fpga: add sysfs document for fpga region Alan Tull 2017-02-28 17:35 ` FPGA Region enhancements and fixes Alan Tull 2017-02-28 22:03 ` Alan Tull
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