From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752653AbdBORqL (ORCPT ); Wed, 15 Feb 2017 12:46:11 -0500 Received: from mail-qk0-f193.google.com ([209.85.220.193]:34370 "EHLO mail-qk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752629AbdBORqI (ORCPT ); Wed, 15 Feb 2017 12:46:08 -0500 MIME-Version: 1.0 In-Reply-To: <20170215172157.GA3317@obsidianresearch.com> References: <1487175261-7051-1-git-send-email-atull@kernel.org> <1487175261-7051-8-git-send-email-atull@kernel.org> <20170215172157.GA3317@obsidianresearch.com> From: Alan Tull Date: Wed, 15 Feb 2017 11:46:01 -0600 Message-ID: Subject: Re: [RFC 7/8] fpga-region: add sysfs interface To: Jason Gunthorpe Cc: Moritz Fischer , linux-kernel , linux-fpga@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 15, 2017 at 11:21 AM, Jason Gunthorpe wrote: > On Wed, Feb 15, 2017 at 10:14:20AM -0600, Alan Tull wrote: >> Add a sysfs interface to control programming FPGA. >> >> Each fpga-region will get the following files which set values >> in the fpga_image_info struct for that region. More files will >> need to be added as fpga_image_info expands. >> >> firmware_name >> * writing a name of a FPGA image file to firmware_name causes the >> FPGA region to write the FPGA >> >> partial_config >> * 0 : full reconfiguration >> * 1 : partial reconfiguration > > This is really a property of the bitfile. It would be really nice to > have a saner system for describing the bitfiles that doesn't rely on > so much out of band stuff. > > Eg when doing partial reconfiguration it would be really sane to have > some checks that the full bitfile is the correct basis for the partial > bitfile. > > It also seems link Zynq needs an encrypted/not encrypted flag.. > > I wonder if we should require a Linux specific header on the bitfile > instead? That would make the bitfile self describing at least. Hi Jason, I agree. I've heard some discussions about adding a header. We would want it to not be manufacturer or fpga device specific. That would be nice and would eliminate some of this struct. We would need a tool to add the header, given a bitstream and some info about the bitstream. If the tool communicated seamlessly with vendor's tools that would be nice, but that is complicated to get that to happen. So far nobody has posted their proposals to the mailing list. Alan > > Jason