* [PATCH] target/riscv: Disallow WFI instruction from U-mode
@ 2020-01-23 19:52 ` Jonathan Behrens
0 siblings, 0 replies; 5+ messages in thread
From: Jonathan Behrens @ 2020-01-23 19:52 UTC (permalink / raw)
Cc: Palmer Dabbelt, open list:RISC-V TCG CPUs, Sagar Karandikar,
Jonathan Behrens, Palmer Dabbelt, open list:All patches CC here,
Alistair Francis, Bastian Koppelmann
From the RISC-V Priviliged Specification:
"When S-mode is implemented, then executing WFI in U-mode causes an illegal
instruction exception, unless it completes within an implementation-specific,
bounded time limit. A future revision of this specification might add a feature
that allows S-mode to selectively permit WFI in U-mode."
Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/op_helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
index 331cc36232..2e5a980192 100644
--- a/target/riscv/op_helper.c
+++ b/target/riscv/op_helper.c
@@ -129,10 +129,10 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
void helper_wfi(CPURISCVState *env)
{
CPUState *cs = env_cpu(env);
-
- if (env->priv == PRV_S &&
- env->priv_ver >= PRIV_VERSION_1_10_0 &&
- get_field(env->mstatus, MSTATUS_TW)) {
+ if (!(env->priv >= PRV_S) ||
+ (env->priv == PRV_S &&
+ env->priv_ver >= PRIV_VERSION_1_10_0 &&
+ get_field(env->mstatus, MSTATUS_TW))) {
riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
} else {
cs->halted = 1;
--
2.25.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] target/riscv: Disallow WFI instruction from U-mode
@ 2020-01-23 19:52 ` Jonathan Behrens
0 siblings, 0 replies; 5+ messages in thread
From: Jonathan Behrens @ 2020-01-23 19:52 UTC (permalink / raw)
Cc: Jonathan Behrens, Palmer Dabbelt, Alistair Francis,
Palmer Dabbelt, Alistair Francis, Sagar Karandikar,
Bastian Koppelmann, open list:RISC-V TCG CPUs,
open list:All patches CC here
From the RISC-V Priviliged Specification:
"When S-mode is implemented, then executing WFI in U-mode causes an illegal
instruction exception, unless it completes within an implementation-specific,
bounded time limit. A future revision of this specification might add a feature
that allows S-mode to selectively permit WFI in U-mode."
Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/op_helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
index 331cc36232..2e5a980192 100644
--- a/target/riscv/op_helper.c
+++ b/target/riscv/op_helper.c
@@ -129,10 +129,10 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
void helper_wfi(CPURISCVState *env)
{
CPUState *cs = env_cpu(env);
-
- if (env->priv == PRV_S &&
- env->priv_ver >= PRIV_VERSION_1_10_0 &&
- get_field(env->mstatus, MSTATUS_TW)) {
+ if (!(env->priv >= PRV_S) ||
+ (env->priv == PRV_S &&
+ env->priv_ver >= PRIV_VERSION_1_10_0 &&
+ get_field(env->mstatus, MSTATUS_TW))) {
riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
} else {
cs->halted = 1;
--
2.25.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] target/riscv: Disallow WFI instruction from U-mode
2020-01-23 19:52 ` Jonathan Behrens
@ 2020-01-23 23:34 ` Richard Henderson
-1 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2020-01-23 23:34 UTC (permalink / raw)
To: Jonathan Behrens
Cc: Palmer Dabbelt, open list:RISC-V TCG CPUs, Sagar Karandikar,
Bastian Koppelmann, Palmer Dabbelt,
open list:All patches CC here, Alistair Francis
On 1/23/20 9:52 AM, Jonathan Behrens wrote:
> + if (!(env->priv >= PRV_S) ||
For integers, !(x >= y) is a poor way to write x < y.
r~
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] target/riscv: Disallow WFI instruction from U-mode
@ 2020-01-23 23:34 ` Richard Henderson
0 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2020-01-23 23:34 UTC (permalink / raw)
To: Jonathan Behrens
Cc: Palmer Dabbelt, open list:RISC-V TCG CPUs, Sagar Karandikar,
Palmer Dabbelt, open list:All patches CC here, Alistair Francis,
Bastian Koppelmann
On 1/23/20 9:52 AM, Jonathan Behrens wrote:
> + if (!(env->priv >= PRV_S) ||
For integers, !(x >= y) is a poor way to write x < y.
r~
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] target/riscv: Disallow WFI instruction from U-mode
2020-01-23 23:34 ` Richard Henderson
(?)
@ 2020-01-24 3:22 ` Jonathan Behrens
-1 siblings, 0 replies; 5+ messages in thread
From: Jonathan Behrens @ 2020-01-24 3:22 UTC (permalink / raw)
To: Richard Henderson
Cc: Palmer Dabbelt, open list:RISC-V TCG CPUs, Sagar Karandikar,
Bastian Koppelmann, Palmer Dabbelt,
open list:All patches CC here, Alistair Francis
[-- Attachment #1: Type: text/plain, Size: 580 bytes --]
Haha, fair enough. I just copied that line from one of the other functions
in that file, which all use the same style. The check is actually a bit
worse than it looks because PRV_S is defined to be 1. Hence, the whole
thing is equivalent to just writing `env->priv == PRV_U`. I can send out a
new version with that changed.
Jonathan
On Thu, Jan 23, 2020 at 6:35 PM Richard Henderson <
richard.henderson@linaro.org> wrote:
> On 1/23/20 9:52 AM, Jonathan Behrens wrote:
> > + if (!(env->priv >= PRV_S) ||
>
> For integers, !(x >= y) is a poor way to write x < y.
>
>
> r~
>
>
[-- Attachment #2: Type: text/html, Size: 953 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-01-24 3:24 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2020-01-23 19:52 [PATCH] target/riscv: Disallow WFI instruction from U-mode Jonathan Behrens
2020-01-23 19:52 ` Jonathan Behrens
2020-01-23 23:34 ` Richard Henderson
2020-01-23 23:34 ` Richard Henderson
2020-01-24 3:22 ` Jonathan Behrens
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