From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1424800AbdDVOq1 (ORCPT ); Sat, 22 Apr 2017 10:46:27 -0400 Received: from mail-it0-f41.google.com ([209.85.214.41]:37171 "EHLO mail-it0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1424603AbdDVOq0 (ORCPT ); Sat, 22 Apr 2017 10:46:26 -0400 MIME-Version: 1.0 In-Reply-To: References: From: Jonathan Liu Date: Sun, 23 Apr 2017 00:46:24 +1000 Message-ID: Subject: Re: [linux-sunxi] [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver To: plaes@plaes.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree , linux-clk@vger.kernel.org, linux-sunxi , Icenowy Zheng , Russell King , Chen-Yu Tsai , Maxime Ripard , Mark Rutland , Rob Herring , Stephen Boyd , Michael Turquette , Philipp Zabel Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Priit, On 27 March 2017 at 04:20, Priit Laes wrote: > +static struct ccu_nkmp pll_ve_clk = { > + .enable = BIT(31), > + .n = _SUNXI_CCU_MULT_OFFSET(8, 5, 0), > + .k = _SUNXI_CCU_MULT(4, 2), > + .m = _SUNXI_CCU_DIV(0, 2), > + .p = _SUNXI_CCU_DIV(16, 2), > + .common = { > + .reg = 0x018, > + .hw.init = CLK_HW_INIT("pll-ve", > + "hosc", > + &ccu_nkmp_ops, > + 0), > + }, > +}; pll-ve is a NKMP clock in A10 but a NK clock in A20. > +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x", > + "pll-vide01", "pll-video1-2x" }; "pll-vide01" should be "pll-video1". Regards, Jonathan From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jonathan Liu Subject: Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver Date: Sun, 23 Apr 2017 00:46:24 +1000 Message-ID: References: Reply-To: net147-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: plaes-q/aMd4JkU83YtjvyW6yDsg@public.gmane.org Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree , linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi , Icenowy Zheng , Russell King , Chen-Yu Tsai , Maxime Ripard , Mark Rutland , Rob Herring , Stephen Boyd , Michael Turquette , Philipp Zabel List-Id: devicetree@vger.kernel.org Hi Priit, On 27 March 2017 at 04:20, Priit Laes wrote: > +static struct ccu_nkmp pll_ve_clk = { > + .enable = BIT(31), > + .n = _SUNXI_CCU_MULT_OFFSET(8, 5, 0), > + .k = _SUNXI_CCU_MULT(4, 2), > + .m = _SUNXI_CCU_DIV(0, 2), > + .p = _SUNXI_CCU_DIV(16, 2), > + .common = { > + .reg = 0x018, > + .hw.init = CLK_HW_INIT("pll-ve", > + "hosc", > + &ccu_nkmp_ops, > + 0), > + }, > +}; pll-ve is a NKMP clock in A10 but a NK clock in A20. > +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x", > + "pll-vide01", "pll-video1-2x" }; "pll-vide01" should be "pll-video1". Regards, Jonathan From mboxrd@z Thu Jan 1 00:00:00 1970 From: net147@gmail.com (Jonathan Liu) Date: Sun, 23 Apr 2017 00:46:24 +1000 Subject: [linux-sunxi] [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver In-Reply-To: References: Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Priit, On 27 March 2017 at 04:20, Priit Laes wrote: > +static struct ccu_nkmp pll_ve_clk = { > + .enable = BIT(31), > + .n = _SUNXI_CCU_MULT_OFFSET(8, 5, 0), > + .k = _SUNXI_CCU_MULT(4, 2), > + .m = _SUNXI_CCU_DIV(0, 2), > + .p = _SUNXI_CCU_DIV(16, 2), > + .common = { > + .reg = 0x018, > + .hw.init = CLK_HW_INIT("pll-ve", > + "hosc", > + &ccu_nkmp_ops, > + 0), > + }, > +}; pll-ve is a NKMP clock in A10 but a NK clock in A20. > +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x", > + "pll-vide01", "pll-video1-2x" }; "pll-vide01" should be "pll-video1". Regards, Jonathan