* [PATCH] arm64: dts: qcom: msm8916: Disable coresight by default
@ 2020-05-13 18:47 michael.srba
2020-05-13 20:24 ` Jeffrey Hugo
2020-05-13 21:22 ` Bjorn Andersson
0 siblings, 2 replies; 3+ messages in thread
From: michael.srba @ 2020-05-13 18:47 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson
Cc: Jeffrey Hugo, Rob Herring, Mathieu Poirier, Suzuki K Poulose,
Mike Leach, linux-arm-msm, devicetree, linux-kernel,
~postmarketos/upstreaming, Michael Srba
From: Michael Srba <michael.srba@seznam.cz>
On some msm8916 devices, attempts at initializing coresight cause the boot to
fail. This was fixed by disabling the coresight-related nodes in the board dts
files. However, a cleaner approach was chosen for fixing the same issue on
msm8998: disabling coresight by default, and enabling it in board dts files
where desired.
This patch implements the same solution for msm8916, removes now redundant
overwrites in board specific dts files and and enables coresight in db410c's
board dts in order to keep the current behavior.
Fixes: b1fcc5702a41 ("arm64: dts: qcom: msm8916: Add CTI options")
Signed-off-by: Michael Srba <michael.srba@seznam.cz>
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 21 +++++++++++
.../boot/dts/qcom/msm8916-longcheer-l8150.dts | 23 ------------
.../qcom/msm8916-samsung-a2015-common.dtsi | 23 ------------
arch/arm64/boot/dts/qcom/msm8916.dtsi | 35 +++++++++++++++++++
4 files changed, 56 insertions(+), 46 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 14982762088d..07c150b0ed54 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -519,6 +519,27 @@ mpps@a000 {
wcnss@a21b000 {
status = "okay";
};
+
+ tpiu@820000 { status = "okay"; };
+ funnel@821000 { status = "okay"; };
+ replicator@824000 { status = "okay"; };
+ etf@825000 { status = "okay"; };
+ etr@826000 { status = "okay"; };
+ funnel@841000 { status = "okay"; };
+ debug@850000 { status = "okay"; };
+ debug@852000 { status = "okay"; };
+ debug@854000 { status = "okay"; };
+ debug@856000 { status = "okay"; };
+ etm@85c000 { status = "okay"; };
+ etm@85d000 { status = "okay"; };
+ etm@85e000 { status = "okay"; };
+ etm@85f000 { status = "okay"; };
+ cti@810000 { status = "okay"; };
+ cti@811000 { status = "okay"; };
+ cti@858000 { status = "okay"; };
+ cti@859000 { status = "okay"; };
+ cti@85a000 { status = "okay"; };
+ cti@85b000 { status = "okay"; };
};
usb2513 {
diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
index d1ccb9472c8b..691eb1a87bc9 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
+++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
@@ -82,29 +82,6 @@ phy {
wcnss@a21b000 {
status = "okay";
};
-
- /*
- * Attempting to enable these devices causes a "synchronous
- * external abort". Suspected cause is that the debug power
- * domain is not enabled by default on this device.
- * Disable these devices for now to avoid the crash.
- *
- * See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
- */
- tpiu@820000 { status = "disabled"; };
- funnel@821000 { status = "disabled"; };
- replicator@824000 { status = "disabled"; };
- etf@825000 { status = "disabled"; };
- etr@826000 { status = "disabled"; };
- funnel@841000 { status = "disabled"; };
- debug@850000 { status = "disabled"; };
- debug@852000 { status = "disabled"; };
- debug@854000 { status = "disabled"; };
- debug@856000 { status = "disabled"; };
- etm@85c000 { status = "disabled"; };
- etm@85d000 { status = "disabled"; };
- etm@85e000 { status = "disabled"; };
- etm@85f000 { status = "disabled"; };
};
// FIXME: Use extcon device provided by charger driver when available
diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
index 43c5e0f882f1..af812f76e8be 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
@@ -75,29 +75,6 @@ phy {
wcnss@a21b000 {
status = "okay";
};
-
- /*
- * Attempting to enable these devices causes a "synchronous
- * external abort". Suspected cause is that the debug power
- * domain is not enabled by default on this device.
- * Disable these devices for now to avoid the crash.
- *
- * See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
- */
- tpiu@820000 { status = "disabled"; };
- funnel@821000 { status = "disabled"; };
- replicator@824000 { status = "disabled"; };
- etf@825000 { status = "disabled"; };
- etr@826000 { status = "disabled"; };
- funnel@841000 { status = "disabled"; };
- debug@850000 { status = "disabled"; };
- debug@852000 { status = "disabled"; };
- debug@854000 { status = "disabled"; };
- debug@856000 { status = "disabled"; };
- etm@85c000 { status = "disabled"; };
- etm@85d000 { status = "disabled"; };
- etm@85e000 { status = "disabled"; };
- etm@85f000 { status = "disabled"; };
};
gpio-keys {
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 8b429954ea29..5cf117e247df 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1228,6 +1228,8 @@ tpiu@820000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
+ status = "disabled";
+
in-ports {
port {
tpiu_in: endpoint {
@@ -1244,6 +1246,8 @@ funnel@821000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
+ status = "disabled";
+
in-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1283,6 +1287,8 @@ replicator@824000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
+ status = "disabled";
+
out-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1317,6 +1323,8 @@ etf@825000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
+ status = "disabled";
+
in-ports {
port {
etf_in: endpoint {
@@ -1341,6 +1349,8 @@ etr@826000 {
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
+ status = "disabled";
+
in-ports {
port {
etr_in: endpoint {
@@ -1357,6 +1367,8 @@ funnel@841000 { /* APSS funnel only 4 inputs are used */
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
+ status = "disabled";
+
in-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1402,6 +1414,7 @@ debug@850000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU0>;
+ status = "disabled";
};
debug@852000 {
@@ -1410,6 +1423,7 @@ debug@852000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU1>;
+ status = "disabled";
};
debug@854000 {
@@ -1418,6 +1432,7 @@ debug@854000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU2>;
+ status = "disabled";
};
debug@856000 {
@@ -1426,6 +1441,7 @@ debug@856000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU3>;
+ status = "disabled";
};
etm0: etm@85c000 {
@@ -1438,6 +1454,8 @@ etm0: etm@85c000 {
cpu = <&CPU0>;
+ status = "disabled";
+
out-ports {
port {
etm0_out: endpoint {
@@ -1457,6 +1475,8 @@ etm1: etm@85d000 {
cpu = <&CPU1>;
+ status = "disabled";
+
out-ports {
port {
etm1_out: endpoint {
@@ -1476,6 +1496,8 @@ etm2: etm@85e000 {
cpu = <&CPU2>;
+ status = "disabled";
+
out-ports {
port {
etm2_out: endpoint {
@@ -1495,6 +1517,8 @@ etm3: etm@85f000 {
cpu = <&CPU3>;
+ status = "disabled";
+
out-ports {
port {
etm3_out: endpoint {
@@ -1512,6 +1536,8 @@ cti@810000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
+
+ status = "disabled";
};
/* CTI 1 - TPIU connections */
@@ -1521,6 +1547,8 @@ cti@811000 {
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
+
+ status = "disabled";
};
/* CTIs 2-11 - no information - not instantiated */
@@ -1538,6 +1566,7 @@ cti@858000 {
cpu = <&CPU0>;
arm,cs-dev-assoc = <&etm0>;
+ status = "disabled";
};
/* CTI - CPU-1 */
@@ -1551,6 +1580,8 @@ cti@859000 {
cpu = <&CPU1>;
arm,cs-dev-assoc = <&etm1>;
+
+ status = "disabled";
};
/* CTI - CPU-2 */
@@ -1564,6 +1595,8 @@ cti@85a000 {
cpu = <&CPU2>;
arm,cs-dev-assoc = <&etm2>;
+
+ status = "disabled";
};
/* CTI - CPU-3 */
@@ -1577,6 +1610,8 @@ cti@85b000 {
cpu = <&CPU3>;
arm,cs-dev-assoc = <&etm3>;
+
+ status = "disabled";
};
--
2.24.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: qcom: msm8916: Disable coresight by default
2020-05-13 18:47 [PATCH] arm64: dts: qcom: msm8916: Disable coresight by default michael.srba
@ 2020-05-13 20:24 ` Jeffrey Hugo
2020-05-13 21:22 ` Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Jeffrey Hugo @ 2020-05-13 20:24 UTC (permalink / raw)
To: michael.srba
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Mathieu Poirier,
Suzuki K Poulose, Mike Leach, MSM, DTML, lkml,
~postmarketos/upstreaming
On Wed, May 13, 2020 at 12:50 PM <michael.srba@seznam.cz> wrote:
>
> From: Michael Srba <michael.srba@seznam.cz>
>
> On some msm8916 devices, attempts at initializing coresight cause the boot to
> fail. This was fixed by disabling the coresight-related nodes in the board dts
> files. However, a cleaner approach was chosen for fixing the same issue on
> msm8998: disabling coresight by default, and enabling it in board dts files
> where desired.
>
> This patch implements the same solution for msm8916, removes now redundant
> overwrites in board specific dts files and and enables coresight in db410c's
> board dts in order to keep the current behavior.
>
> Fixes: b1fcc5702a41 ("arm64: dts: qcom: msm8916: Add CTI options")
> Signed-off-by: Michael Srba <michael.srba@seznam.cz>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: qcom: msm8916: Disable coresight by default
2020-05-13 18:47 [PATCH] arm64: dts: qcom: msm8916: Disable coresight by default michael.srba
2020-05-13 20:24 ` Jeffrey Hugo
@ 2020-05-13 21:22 ` Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2020-05-13 21:22 UTC (permalink / raw)
To: michael.srba
Cc: Andy Gross, Jeffrey Hugo, Rob Herring, Mathieu Poirier,
Suzuki K Poulose, Mike Leach, linux-arm-msm, devicetree,
linux-kernel, ~postmarketos/upstreaming
On Wed 13 May 11:47 PDT 2020, michael.srba@seznam.cz wrote:
> From: Michael Srba <michael.srba@seznam.cz>
>
> On some msm8916 devices, attempts at initializing coresight cause the boot to
> fail. This was fixed by disabling the coresight-related nodes in the board dts
> files. However, a cleaner approach was chosen for fixing the same issue on
> msm8998: disabling coresight by default, and enabling it in board dts files
> where desired.
>
> This patch implements the same solution for msm8916, removes now redundant
> overwrites in board specific dts files and and enables coresight in db410c's
> board dts in order to keep the current behavior.
>
Applied, with Jeff's r-b.
Thanks,
Bjorn
> Fixes: b1fcc5702a41 ("arm64: dts: qcom: msm8916: Add CTI options")
> Signed-off-by: Michael Srba <michael.srba@seznam.cz>
>
> ---
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 21 +++++++++++
> .../boot/dts/qcom/msm8916-longcheer-l8150.dts | 23 ------------
> .../qcom/msm8916-samsung-a2015-common.dtsi | 23 ------------
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 35 +++++++++++++++++++
> 4 files changed, 56 insertions(+), 46 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> index 14982762088d..07c150b0ed54 100644
> --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> @@ -519,6 +519,27 @@ mpps@a000 {
> wcnss@a21b000 {
> status = "okay";
> };
> +
> + tpiu@820000 { status = "okay"; };
> + funnel@821000 { status = "okay"; };
> + replicator@824000 { status = "okay"; };
> + etf@825000 { status = "okay"; };
> + etr@826000 { status = "okay"; };
> + funnel@841000 { status = "okay"; };
> + debug@850000 { status = "okay"; };
> + debug@852000 { status = "okay"; };
> + debug@854000 { status = "okay"; };
> + debug@856000 { status = "okay"; };
> + etm@85c000 { status = "okay"; };
> + etm@85d000 { status = "okay"; };
> + etm@85e000 { status = "okay"; };
> + etm@85f000 { status = "okay"; };
> + cti@810000 { status = "okay"; };
> + cti@811000 { status = "okay"; };
> + cti@858000 { status = "okay"; };
> + cti@859000 { status = "okay"; };
> + cti@85a000 { status = "okay"; };
> + cti@85b000 { status = "okay"; };
> };
>
> usb2513 {
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
> index d1ccb9472c8b..691eb1a87bc9 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
> +++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
> @@ -82,29 +82,6 @@ phy {
> wcnss@a21b000 {
> status = "okay";
> };
> -
> - /*
> - * Attempting to enable these devices causes a "synchronous
> - * external abort". Suspected cause is that the debug power
> - * domain is not enabled by default on this device.
> - * Disable these devices for now to avoid the crash.
> - *
> - * See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
> - */
> - tpiu@820000 { status = "disabled"; };
> - funnel@821000 { status = "disabled"; };
> - replicator@824000 { status = "disabled"; };
> - etf@825000 { status = "disabled"; };
> - etr@826000 { status = "disabled"; };
> - funnel@841000 { status = "disabled"; };
> - debug@850000 { status = "disabled"; };
> - debug@852000 { status = "disabled"; };
> - debug@854000 { status = "disabled"; };
> - debug@856000 { status = "disabled"; };
> - etm@85c000 { status = "disabled"; };
> - etm@85d000 { status = "disabled"; };
> - etm@85e000 { status = "disabled"; };
> - etm@85f000 { status = "disabled"; };
> };
>
> // FIXME: Use extcon device provided by charger driver when available
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
> index 43c5e0f882f1..af812f76e8be 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
> @@ -75,29 +75,6 @@ phy {
> wcnss@a21b000 {
> status = "okay";
> };
> -
> - /*
> - * Attempting to enable these devices causes a "synchronous
> - * external abort". Suspected cause is that the debug power
> - * domain is not enabled by default on this device.
> - * Disable these devices for now to avoid the crash.
> - *
> - * See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
> - */
> - tpiu@820000 { status = "disabled"; };
> - funnel@821000 { status = "disabled"; };
> - replicator@824000 { status = "disabled"; };
> - etf@825000 { status = "disabled"; };
> - etr@826000 { status = "disabled"; };
> - funnel@841000 { status = "disabled"; };
> - debug@850000 { status = "disabled"; };
> - debug@852000 { status = "disabled"; };
> - debug@854000 { status = "disabled"; };
> - debug@856000 { status = "disabled"; };
> - etm@85c000 { status = "disabled"; };
> - etm@85d000 { status = "disabled"; };
> - etm@85e000 { status = "disabled"; };
> - etm@85f000 { status = "disabled"; };
> };
>
> gpio-keys {
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 8b429954ea29..5cf117e247df 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1228,6 +1228,8 @@ tpiu@820000 {
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> + status = "disabled";
> +
> in-ports {
> port {
> tpiu_in: endpoint {
> @@ -1244,6 +1246,8 @@ funnel@821000 {
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> + status = "disabled";
> +
> in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -1283,6 +1287,8 @@ replicator@824000 {
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> + status = "disabled";
> +
> out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -1317,6 +1323,8 @@ etf@825000 {
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> + status = "disabled";
> +
> in-ports {
> port {
> etf_in: endpoint {
> @@ -1341,6 +1349,8 @@ etr@826000 {
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> + status = "disabled";
> +
> in-ports {
> port {
> etr_in: endpoint {
> @@ -1357,6 +1367,8 @@ funnel@841000 { /* APSS funnel only 4 inputs are used */
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> + status = "disabled";
> +
> in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -1402,6 +1414,7 @@ debug@850000 {
> clocks = <&rpmcc RPM_QDSS_CLK>;
> clock-names = "apb_pclk";
> cpu = <&CPU0>;
> + status = "disabled";
> };
>
> debug@852000 {
> @@ -1410,6 +1423,7 @@ debug@852000 {
> clocks = <&rpmcc RPM_QDSS_CLK>;
> clock-names = "apb_pclk";
> cpu = <&CPU1>;
> + status = "disabled";
> };
>
> debug@854000 {
> @@ -1418,6 +1432,7 @@ debug@854000 {
> clocks = <&rpmcc RPM_QDSS_CLK>;
> clock-names = "apb_pclk";
> cpu = <&CPU2>;
> + status = "disabled";
> };
>
> debug@856000 {
> @@ -1426,6 +1441,7 @@ debug@856000 {
> clocks = <&rpmcc RPM_QDSS_CLK>;
> clock-names = "apb_pclk";
> cpu = <&CPU3>;
> + status = "disabled";
> };
>
> etm0: etm@85c000 {
> @@ -1438,6 +1454,8 @@ etm0: etm@85c000 {
>
> cpu = <&CPU0>;
>
> + status = "disabled";
> +
> out-ports {
> port {
> etm0_out: endpoint {
> @@ -1457,6 +1475,8 @@ etm1: etm@85d000 {
>
> cpu = <&CPU1>;
>
> + status = "disabled";
> +
> out-ports {
> port {
> etm1_out: endpoint {
> @@ -1476,6 +1496,8 @@ etm2: etm@85e000 {
>
> cpu = <&CPU2>;
>
> + status = "disabled";
> +
> out-ports {
> port {
> etm2_out: endpoint {
> @@ -1495,6 +1517,8 @@ etm3: etm@85f000 {
>
> cpu = <&CPU3>;
>
> + status = "disabled";
> +
> out-ports {
> port {
> etm3_out: endpoint {
> @@ -1512,6 +1536,8 @@ cti@810000 {
>
> clocks = <&rpmcc RPM_QDSS_CLK>;
> clock-names = "apb_pclk";
> +
> + status = "disabled";
> };
>
> /* CTI 1 - TPIU connections */
> @@ -1521,6 +1547,8 @@ cti@811000 {
>
> clocks = <&rpmcc RPM_QDSS_CLK>;
> clock-names = "apb_pclk";
> +
> + status = "disabled";
> };
>
> /* CTIs 2-11 - no information - not instantiated */
> @@ -1538,6 +1566,7 @@ cti@858000 {
> cpu = <&CPU0>;
> arm,cs-dev-assoc = <&etm0>;
>
> + status = "disabled";
> };
>
> /* CTI - CPU-1 */
> @@ -1551,6 +1580,8 @@ cti@859000 {
>
> cpu = <&CPU1>;
> arm,cs-dev-assoc = <&etm1>;
> +
> + status = "disabled";
> };
>
> /* CTI - CPU-2 */
> @@ -1564,6 +1595,8 @@ cti@85a000 {
>
> cpu = <&CPU2>;
> arm,cs-dev-assoc = <&etm2>;
> +
> + status = "disabled";
> };
>
> /* CTI - CPU-3 */
> @@ -1577,6 +1610,8 @@ cti@85b000 {
>
> cpu = <&CPU3>;
> arm,cs-dev-assoc = <&etm3>;
> +
> + status = "disabled";
> };
>
>
> --
> 2.24.0
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-05-13 21:24 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-13 18:47 [PATCH] arm64: dts: qcom: msm8916: Disable coresight by default michael.srba
2020-05-13 20:24 ` Jeffrey Hugo
2020-05-13 21:22 ` Bjorn Andersson
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