From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 372ADC352AA for ; Tue, 1 Oct 2019 18:01:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 058D821924 for ; Tue, 1 Oct 2019 18:01:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="rEjkaQmY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727021AbfJASBX (ORCPT ); Tue, 1 Oct 2019 14:01:23 -0400 Received: from mail-io1-f65.google.com ([209.85.166.65]:35925 "EHLO mail-io1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725844AbfJASBX (ORCPT ); Tue, 1 Oct 2019 14:01:23 -0400 Received: by mail-io1-f65.google.com with SMTP id b136so50314150iof.3; Tue, 01 Oct 2019 11:01:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=e3ZpzW2TyFiOL+UNzjwCdjiPvcI1e9f1za2Ko3AAr0s=; b=rEjkaQmYsYDQCb6ctDX5gQepVnjXhbo4zSgtC17Bwz2P4Q/3UWeESJs9t+DbKzJRkE h2icO+Bym55hSufk12IbuzwRuxR4xcF824kYTgNkdTUMu7rukY0cRYSmcS5ev/sjJKCu JI1zgWFNKorMTLZ/lV97yJnIzK6nOEUVzkF5vKeCHEsiOPbEodIM5IFTDcKIa7xYbP9Z L0NRlgr6Pnm/4sQrFdn0EUSZRxmN51s6WWAqmyfAdrz+pCxscd6ct7HHWopSfH+rfTz6 Wj+yPETwqLPP9IqU2DERuq2e/QvlWjFsEOdq/lRm2uFEwZS8ryDRF2Qimn7qTQD8JFsg liRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=e3ZpzW2TyFiOL+UNzjwCdjiPvcI1e9f1za2Ko3AAr0s=; b=XB5rUR6ZmnbwPKw5kZrD9MtockLkRn42LryiPtRZinpnxAiWGRoAn3Y/1c538NTWmv YSTRpK4otr3qHvpNdGoS7xbDql+iVR8+C0cXoLQoolK5NgeIQkaJTUXBP/sMZwxJ1k0O kmk3wK9WezdqXIfTGlZg86t9VLTVBoD9DzgLVzSvHieFc3p3F3JJcz2BFeuyJRzq41r5 ClTz+C7oRTzJQ4tOgCX57gIvEr7bsloZuwQmg3++1QdDppN2+tawJU2DVqi7s9iONkth sL0TxiSGG9B+jjKTHHphqO14uIAlQmHJUmBoBhZGtnLm64AULNkT7n2SHuttF+dAWjWB +7tA== X-Gm-Message-State: APjAAAXByuKfniOBwnDO6XZQ7OtKdI5IS947VntNwmQNEBKPzGQV6d+O cUp0n+CpHLQb0HYYgBUeocgIQeY4lyqKoAh1aRw= X-Google-Smtp-Source: APXvYqxotoq/8hGS9XgSO6JelXixa5l0w10bNwBRyvjvkP91TkYP1WblQo3zRuYvlhJRnSm4XrDvkt4p1Lkv3X5Q30g= X-Received: by 2002:a6b:90c4:: with SMTP id s187mr6632690iod.178.1569952882448; Tue, 01 Oct 2019 11:01:22 -0700 (PDT) MIME-Version: 1.0 References: <90114e06825e537c3aafd3de5c78743a9de6fadc.1564550873.git.saiprakash.ranjan@codeaurora.org> <16212a577339204e901cf4eefa5e82f1@codeaurora.org> In-Reply-To: From: Jeffrey Hugo Date: Tue, 1 Oct 2019 12:01:11 -0600 Message-ID: Subject: Re: [PATCHv9 2/3] arm64: dts: qcom: msm8998: Add Coresight support To: Sai Prakash Ranjan Cc: Mark Rutland , Rajendra Nayak , Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , MSM , Marc Gonzalez , lkml , Bjorn Andersson , David Brown , Andy Gross , Sibi Sankar , Leo Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue, Oct 1, 2019 at 11:52 AM Sai Prakash Ranjan wrote: > > On 2019-10-01 10:14, Jeffrey Hugo wrote: > > On Tue, Oct 1, 2019 at 11:04 AM Sai Prakash Ranjan > > wrote: > >> > >> On 2019-10-01 09:13, Jeffrey Hugo wrote: > >> > Sai, > >> > > >> > This patch breaks boot on the 835 laptops. However, I haven't seen > >> > the same issue on the MTP. I wonder, is coresight expected to work > >> > with production fused devices? I wonder if thats the difference > >> > between the laptop and MTP that is causing the issue. > >> > > >> > Let me know what I can do to help debug. > >> > > >> > >> I did test on MSM8998 MTP and didn't face any issue. I am guessing > >> this > >> is the same issue which you reported regarding cpuidle? Coresight ETM > > > > Yes, its the same issue. Right now, I need both patches reverted to > > boot. > > > >> and cpuidle do not work well together since ETMs share the same power > >> domain as CPU and they might get turned off when CPU enters idle > >> states. > >> Can you try with cpuidle.off=1 cmdline or just remove idle states from > >> DT to confirm? If this is the issue, then we can try the below patch > >> from Andrew Murray for ETM save and restore: > >> > >> https://patchwork.kernel.org/patch/11097893/ > > > > Is there still value in testing this if the idle states are removed, > > yet the coresight nodes still cause issues? > > > > Funny enough, I'm using the arm64 defconfig which doesn't seem to > > select CONFIG_CORESIGHT, so I'm not even sure what would be binding to > > the DT devices... > > > > Haan then likely it's the firmware issue. > We should probably disable coresight in soc dtsi and enable only for > MTP. For now you can add a status=disabled for all coresight nodes in > msm8998.dtsi and I will send the patch doing the same in a day or > two(sorry I am travelling currently). This sounds sane to me (and is what I did while bisecting the issue). When you do create the patch, feel free to add the following tags as you see fit. Reported-by: Jeffrey Hugo Tested-by: Jeffrey Hugo From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47E62ECE587 for ; Tue, 1 Oct 2019 18:01:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1271F21906 for ; Tue, 1 Oct 2019 18:01:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cdnOjgFe"; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=e3ZpzW2TyFiOL+UNzjwCdjiPvcI1e9f1za2Ko3AAr0s=; b=UC/1/mxiZ5fycEK4LSsJLCznF+1kNYEUayR3kB+mHx2DsJPApnMScJ/nPMFWP5FblY zCT0KQ7JI0VMvnBp7Bt33Rk+/6iNIEgOds/t/PQkihgvec+E9wHWM+R9fte71T9gaAtl bmzXi6NaOHycQ5PpBp1viN+Fd6+Pxdt2l8g9TZGznmTDEVqi6lY70jKS6RKh11o37UYV A+vAw8AyIS4B9TSEvJ8iHi1hambhRTBrtq+2Suv/g+gqKbwcDnEmdqbV5jPdvLzGiBVr umYpqIBam5eMF1A8PXCfW3hmW3IGtus7Vlh3KB1hDOKONSURHX5vMvcM0nMGbGFEcYtP 6Cug== X-Gm-Message-State: APjAAAX+zx3EXnORQigFh6uSKLdMhv94A33stiQU3poTKFR6SfCmeQba KmxTzzDBI0gnJ0OV9MKJu16edcArklPNRESAO+s= X-Google-Smtp-Source: APXvYqxotoq/8hGS9XgSO6JelXixa5l0w10bNwBRyvjvkP91TkYP1WblQo3zRuYvlhJRnSm4XrDvkt4p1Lkv3X5Q30g= X-Received: by 2002:a6b:90c4:: with SMTP id s187mr6632690iod.178.1569952882448; Tue, 01 Oct 2019 11:01:22 -0700 (PDT) MIME-Version: 1.0 References: <90114e06825e537c3aafd3de5c78743a9de6fadc.1564550873.git.saiprakash.ranjan@codeaurora.org> <16212a577339204e901cf4eefa5e82f1@codeaurora.org> In-Reply-To: From: Jeffrey Hugo Date: Tue, 1 Oct 2019 12:01:11 -0600 Message-ID: Subject: Re: [PATCHv9 2/3] arm64: dts: qcom: msm8998: Add Coresight support To: Sai Prakash Ranjan X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191001_110123_476978_8B907E02 X-CRM114-Status: GOOD ( 21.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rajendra Nayak , Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , MSM , Marc Gonzalez , lkml , Bjorn Andersson , David Brown , Andy Gross , Sibi Sankar , Leo Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Oct 1, 2019 at 11:52 AM Sai Prakash Ranjan wrote: > > On 2019-10-01 10:14, Jeffrey Hugo wrote: > > On Tue, Oct 1, 2019 at 11:04 AM Sai Prakash Ranjan > > wrote: > >> > >> On 2019-10-01 09:13, Jeffrey Hugo wrote: > >> > Sai, > >> > > >> > This patch breaks boot on the 835 laptops. However, I haven't seen > >> > the same issue on the MTP. I wonder, is coresight expected to work > >> > with production fused devices? I wonder if thats the difference > >> > between the laptop and MTP that is causing the issue. > >> > > >> > Let me know what I can do to help debug. > >> > > >> > >> I did test on MSM8998 MTP and didn't face any issue. I am guessing > >> this > >> is the same issue which you reported regarding cpuidle? Coresight ETM > > > > Yes, its the same issue. Right now, I need both patches reverted to > > boot. > > > >> and cpuidle do not work well together since ETMs share the same power > >> domain as CPU and they might get turned off when CPU enters idle > >> states. > >> Can you try with cpuidle.off=1 cmdline or just remove idle states from > >> DT to confirm? If this is the issue, then we can try the below patch > >> from Andrew Murray for ETM save and restore: > >> > >> https://patchwork.kernel.org/patch/11097893/ > > > > Is there still value in testing this if the idle states are removed, > > yet the coresight nodes still cause issues? > > > > Funny enough, I'm using the arm64 defconfig which doesn't seem to > > select CONFIG_CORESIGHT, so I'm not even sure what would be binding to > > the DT devices... > > > > Haan then likely it's the firmware issue. > We should probably disable coresight in soc dtsi and enable only for > MTP. For now you can add a status=disabled for all coresight nodes in > msm8998.dtsi and I will send the patch doing the same in a day or > two(sorry I am travelling currently). This sounds sane to me (and is what I did while bisecting the issue). When you do create the patch, feel free to add the following tags as you see fit. Reported-by: Jeffrey Hugo Tested-by: Jeffrey Hugo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel