From mboxrd@z Thu Jan  1 00:00:00 1970
From: Fabio Estevam <festevam@gmail.com>
Date: Thu, 19 Jul 2018 10:58:38 -0300
Subject: [U-Boot] [PATCH V2 14/32] armv8: add cpu core helper functions
In-Reply-To: <20180718013602.26574-15-peng.fan@nxp.com>
References: <20180718013602.26574-1-peng.fan@nxp.com>
 <20180718013602.26574-15-peng.fan@nxp.com>
Message-ID: <CAOMZO5AOXvXhOHEba8SeMzhX_3epXe3JLgh3iQHcfEJWENTyAg@mail.gmail.com>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hi Peng,

On Tue, Jul 17, 2018 at 10:35 PM, Peng Fan <peng.fan@nxp.com> wrote:
> Add helper functions to identify different armv8 variants.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm/include/asm/armv8/cpu.h | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
>  create mode 100644 arch/arm/include/asm/armv8/cpu.h
>
> diff --git a/arch/arm/include/asm/armv8/cpu.h b/arch/arm/include/asm/armv8/cpu.h
> new file mode 100644
> index 0000000000..40d54dc85a
> --- /dev/null
> +++ b/arch/arm/include/asm/armv8/cpu.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2018 NXP
> + */
> +
> +#define MIDR_PARTNUM_CORTEX_A35        0xD04
> +#define MIDR_PARTNUM_CORTEX_A53        0xD03
> +#define MIDR_PARTNUM_CORTEX_A72        0xD08
> +#define MIDR_PARTNUM_SHIFT     0x4
> +#define MIDR_PARTNUM_MASK      (0xFFF << 0x4)
> +
> +static inline unsigned int read_midr(void)
> +{
> +       unsigned long val;
> +
> +       asm volatile("mrs %0, midr_el1" : "=r" (val));
> +
> +       return val;
> +}
> +
> +#define is_cortex_a35() (((read_midr() & MIDR_PARTNUM_MASK) >> \
> +                        MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A35)
> +#define is_cortex_a53() (((read_midr() & MIDR_PARTNUM_MASK) >> \
> +                        MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A53)
> +#define is_cortex_a72() (((read_midr() & MIDR_PARTNUM_MASK) >>\
> +                        MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A72)

This is not mx8 specific, so this header could be on a more common location.