[U-Boot] [PATCH 1/4] mx7dsabresd: Fix LCD_PWR_EN output setting

[U-Boot] [PATCH 1/4] mx7dsabresd: Fix LCD_PWR_EN output setting

[Peng Fan]

From: Ye Li <ye.li@nxp.com>

LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect
D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3
is actually 1.2V.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---
 board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index c3062f1..1f4fc03 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -171,7 +171,7 @@ static enum qn_level seq[3][2] = {
 
 static enum qn_func qn_output[8] = {
 	qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,
-	qn_enable
+	qn_disable
 };
 
 static void iox74lv_init(void)
-- 
2.6.2

[U-Boot] [PATCH 2/4] imx6ulevk: fix 74LV OE usage

[Peng Fan]

Fix 74LV OE gpio index. gpio index is wrong,
so gpio output will not have effect, since we
use wrong GPIO5_IO18, but not correct GPIO5_IO8.

And at the end of the initialization of 74lv init, should
keep OE voltage level at LOW to make 74lv output the correct
voltage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 88d3fbd..b861122 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -66,7 +66,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IOX_SDI IMX_GPIO_NR(5, 10)
 #define IOX_STCP IMX_GPIO_NR(5, 7)
 #define IOX_SHCP IMX_GPIO_NR(5, 11)
-#define IOX_OE IMX_GPIO_NR(5, 18)
+#define IOX_OE IMX_GPIO_NR(5, 8)
 
 static iomux_v3_cfg_t const iox_pads[] = {
 	/* IOX_SDI */
@@ -154,8 +154,6 @@ static void iox74lv_init(void)
 	 * shift register will be output to pins
 	 */
 	gpio_direction_output(IOX_STCP, 1);
-
-	gpio_direction_output(IOX_OE, 1);
 };
 
 #ifdef CONFIG_SYS_I2C_MXC
-- 
2.6.2

[U-Boot] [PATCH 3/4] imx6ulevk: fix LCD_nPWREN setting

[Peng Fan]

Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3.
If LCD_nPWREN is high, output is 2.4V which is not correct.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index b861122..112e6ab 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -117,7 +117,7 @@ static enum qn_level seq[3][2] = {
 
 static enum qn_func qn_output[8] = {
 	qn_reset, qn_reset, qn_reset, qn_enable, qn_disable, qn_reset,
-	qn_disable, qn_enable
+	qn_disable, qn_disable
 };
 
 static void iox74lv_init(void)
-- 
2.6.2

[U-Boot] [PATCH 4/4] imx: mx6ulevk: change QSPI PAD DSE to 120ohm

[Peng Fan]

The current pad DSE for QSPI is 60ohm. This setting cause
too strong drive to clock and data signals. Need to change
the DSE to 120ohm for better signal quality.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---
 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 112e6ab..92c9211 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -303,7 +303,7 @@ static void setup_iomux_uart(void)
 
 #define QSPI_PAD_CTRL1	\
 	(PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
-	 PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_60ohm)
+	 PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
 
 static iomux_v3_cfg_t const quadspi_pads[] = {
 	MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-- 
2.6.2

[U-Boot] [PATCH 1/4] mx7dsabresd: Fix LCD_PWR_EN output setting

[Fabio Estevam]

On Wed, Jun 15, 2016 at 3:18 AM, Peng Fan <van.freenix@gmail.com> wrote:
> From: Ye Li <ye.li@nxp.com>
>
> LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect
> D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3
> is actually 1.2V.
>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

[U-Boot] [PATCH 2/4] imx6ulevk: fix 74LV OE usage

[Fabio Estevam]

On Wed, Jun 15, 2016 at 3:18 AM, Peng Fan <van.freenix@gmail.com> wrote:
> Fix 74LV OE gpio index. gpio index is wrong,
> so gpio output will not have effect, since we
> use wrong GPIO5_IO18, but not correct GPIO5_IO8.
>
> And at the end of the initialization of 74lv init, should
> keep OE voltage level at LOW to make 74lv output the correct
> voltage.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

[U-Boot] [PATCH 3/4] imx6ulevk: fix LCD_nPWREN setting

[Fabio Estevam]

On Wed, Jun 15, 2016 at 3:18 AM, Peng Fan <van.freenix@gmail.com> wrote:
> Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3.
> If LCD_nPWREN is high, output is 2.4V which is not correct.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

[U-Boot] [PATCH 4/4] imx: mx6ulevk: change QSPI PAD DSE to 120ohm

[Fabio Estevam]

On Wed, Jun 15, 2016 at 3:18 AM, Peng Fan <van.freenix@gmail.com> wrote:
> The current pad DSE for QSPI is 60ohm. This setting cause
> too strong drive to clock and data signals. Need to change
> the DSE to 120ohm for better signal quality.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

[U-Boot] [PATCH 1/4] mx7dsabresd: Fix LCD_PWR_EN output setting

[Stefano Babic]

On 15/06/2016 08:18, Peng Fan wrote:
> From: Ye Li <ye.li@nxp.com>
> 
> LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect
> D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3
> is actually 1.2V.
> 
> Signed-off-by: Ye Li <ye.li@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> ---
>  board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
> index c3062f1..1f4fc03 100644
> --- a/board/freescale/mx7dsabresd/mx7dsabresd.c
> +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
> @@ -171,7 +171,7 @@ static enum qn_level seq[3][2] = {
>  
>  static enum qn_func qn_output[8] = {
>  	qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,
> -	qn_enable
> +	qn_disable
>  };
>  
>  static void iox74lv_init(void)
> 

Applied to master (bug fix), thanks !

Best regards,
Stefano Babic

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