From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753073AbbJFR5i (ORCPT ); Tue, 6 Oct 2015 13:57:38 -0400 Received: from mail-ig0-f193.google.com ([209.85.213.193]:33771 "EHLO mail-ig0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752337AbbJFR5g (ORCPT ); Tue, 6 Oct 2015 13:57:36 -0400 MIME-Version: 1.0 In-Reply-To: References: <20150808160251.GM7557@n2100.arm.linux.org.uk> Date: Tue, 6 Oct 2015 14:57:36 -0300 Message-ID: Subject: Re: [PATCH 03/12] gpu: imx: simplify sync polarity setting From: Fabio Estevam To: Russell King Cc: linux-rockchip@lists.infradead.org, DRI mailing list , linux-kernel , "linux-arm-kernel@lists.infradead.org" , Fabio Estevam , Yakir Yang , Andy Yan Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 8, 2015 at 1:03 PM, Russell King wrote: > Use a function to convert the sync pin to a bit mask for the DI_GENERAL > register, and move this out of the interlace/non-interlace path to the > common path. > > Signed-off-by: Russell King Reviewed-by: Fabio Estevam From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabio Estevam Subject: Re: [PATCH 03/12] gpu: imx: simplify sync polarity setting Date: Tue, 6 Oct 2015 14:57:36 -0300 Message-ID: References: <20150808160251.GM7557@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Russell King Cc: Fabio Estevam , linux-kernel , DRI mailing list , linux-rockchip@lists.infradead.org, Andy Yan , "linux-arm-kernel@lists.infradead.org" List-Id: linux-rockchip.vger.kernel.org T24gU2F0LCBBdWcgOCwgMjAxNSBhdCAxOjAzIFBNLCBSdXNzZWxsIEtpbmcKPHJtaytrZXJuZWxA YXJtLmxpbnV4Lm9yZy51az4gd3JvdGU6Cj4gVXNlIGEgZnVuY3Rpb24gdG8gY29udmVydCB0aGUg c3luYyBwaW4gdG8gYSBiaXQgbWFzayBmb3IgdGhlIERJX0dFTkVSQUwKPiByZWdpc3RlciwgYW5k IG1vdmUgdGhpcyBvdXQgb2YgdGhlIGludGVybGFjZS9ub24taW50ZXJsYWNlIHBhdGggdG8gdGhl Cj4gY29tbW9uIHBhdGguCj4KPiBTaWduZWQtb2ZmLWJ5OiBSdXNzZWxsIEtpbmcgPHJtaytrZXJu ZWxAYXJtLmxpbnV4Lm9yZy51az4KClJldmlld2VkLWJ5OiBGYWJpbyBFc3RldmFtIDxmYWJpby5l c3RldmFtQGZyZWVzY2FsZS5jb20+Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVk ZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v ZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: festevam@gmail.com (Fabio Estevam) Date: Tue, 6 Oct 2015 14:57:36 -0300 Subject: [PATCH 03/12] gpu: imx: simplify sync polarity setting In-Reply-To: References: <20150808160251.GM7557@n2100.arm.linux.org.uk> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Sat, Aug 8, 2015 at 1:03 PM, Russell King wrote: > Use a function to convert the sync pin to a bit mask for the DI_GENERAL > register, and move this out of the interlace/non-interlace path to the > common path. > > Signed-off-by: Russell King Reviewed-by: Fabio Estevam