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* [U-Boot] [PATCH] net: fec: Avoid MX28 bus sync issue
@ 2013-09-15 18:12 Oliver Metz
  2013-09-15 18:16 ` Fabio Estevam
  0 siblings, 1 reply; 58+ messages in thread
From: Oliver Metz @ 2013-09-15 18:12 UTC (permalink / raw)
  To: u-boot

Dear Fabio,

>Hi Robert and Hector, 
>
>On Fri, Sep 13, 2013 at 2:46 PM, Wolfgang Denk <[hidden email]> wrote: 
>
>> That's ALLOC_CACHE_ALIGN_BUFFER.   Thanks. 
>
>Could you please let us know wthether the change below fix the problem? 
>
>Thanks, 
>
>Fabio Estevam 
>
>--- a/drivers/net/fec_mxc.c 
>+++ b/drivers/net/fec_mxc.c 
>@@ -794,7 +794,7 @@ static int fec_recv(struct eth_device *dev) 
>        uint16_t bd_status; 
>        uint32_t addr, size, end; 
>        int i; 
>-       uchar buff[FEC_MAX_PKT_SIZE] __aligned(ARCH_DMA_MINALIGN); 
>+       ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE); 
>
>        /* 
>         * Check if any critical events have happened 

I can confirm that this patch fixes the issue for me on the mx28 board. Before the patch transmitting a linux kernel archive failed many times. With the patch applied the file was transfered successfully with the first try.

Used gcc version:
gcc version 4.5.4 20110808 (prerelease) (Linaro GCC 4.5-2011.08)

Regards
Oliver

^ permalink raw reply	[flat|nested] 58+ messages in thread
* [U-Boot] [PATCH] net: fec: Avoid MX28 bus sync issue
@ 2013-07-11 23:03 Marek Vasut
  2013-07-11 23:18 ` Fabio Estevam
                   ` (2 more replies)
  0 siblings, 3 replies; 58+ messages in thread
From: Marek Vasut @ 2013-07-11 23:03 UTC (permalink / raw)
  To: u-boot

The MX28 multi-layer AHB bus can be too slow and trigger the
FEC DMA too early, before all the data hit the DRAM. This patch
ensures the data are written in the RAM before the DMA starts.
Please see the comment in the patch for full details.

This patch was produced with an amazing help from Albert Aribaud,
who pointed out it can possibly be such a bus synchronisation
issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 drivers/net/fec_mxc.c |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 97bf8fe..ec5b9db 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -737,6 +737,28 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
 	flush_dcache_range(addr, addr + size);
 
 	/*
+	 * Below we read the DMA descriptor's last four bytes back from the
+	 * DRAM. This is important in order to make sure that all WRITE
+	 * operations on the bus that were triggered by previous cache FLUSH
+	 * have completed.
+	 *
+	 * Otherwise, on MX28, it is possible to observe a corruption of the
+	 * DMA descriptors. Please refer to schematic "Figure 1-2" in MX28RM
+	 * for the bus structure of MX28. The scenario is as follows:
+	 *
+	 * 1) ARM core triggers a series of WRITEs on the AHB_ARB2 bus going
+	 *    to DRAM due to flush_dcache_range()
+	 * 2) ARM core writes the FEC registers via AHB_ARB2
+	 * 3) FEC DMA starts reading/writing from/to DRAM via AHB_ARB3
+	 *
+	 * Note that 2) does sometimes finish before 1) due to reordering of
+	 * WRITE accesses on the AHB bus, therefore triggering 3) before the
+	 * DMA descriptor is fully written into DRAM. This results in occasional
+	 * corruption of the DMA descriptor.
+	 */
+	readl(addr + size - 4);
+
+	/*
 	 * Enable SmartDMA transmit task
 	 */
 	fec_tx_task_enable(fec);
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 58+ messages in thread

end of thread, other threads:[~2013-09-15 18:16 UTC | newest]

Thread overview: 58+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-09-15 18:12 [U-Boot] [PATCH] net: fec: Avoid MX28 bus sync issue Oliver Metz
2013-09-15 18:16 ` Fabio Estevam
  -- strict thread matches above, loose matches on Subject: below --
2013-07-11 23:03 Marek Vasut
2013-07-11 23:18 ` Fabio Estevam
2013-07-12  3:41   ` Alexandre Pereira da Silva
2013-07-12  3:51     ` Marek Vasut
2013-07-12 11:37       ` Hector Palacios
2013-07-12 11:39         ` Fabio Estevam
2013-07-12 12:01         ` Marek Vasut
2013-07-12 15:08           ` Hector Palacios
2013-07-12 15:50             ` Albert ARIBAUD
2013-07-12 16:48             ` Marek Vasut
2013-07-15  8:58               ` Hector Palacios
2013-07-15 12:30                 ` Marek Vasut
2013-07-15 15:09                   ` Hector Palacios
2013-07-15 15:12                     ` Marek Vasut
2013-07-15 15:24                       ` Hector Palacios
2013-07-16  3:51                     ` Fabio Estevam
2013-07-16  4:18                       ` Fabio Estevam
2013-07-16  4:44                         ` Marek Vasut
2013-07-17 15:55                           ` Hector Palacios
2013-07-18  4:12                             ` Marek Vasut
2013-09-12 10:22                             ` Hector Palacios
2013-09-12 10:50                               ` Marek Vasut
     [not found]                                 ` <52319DE8.5080607@digi.com>
2013-09-12 11:00                                   ` Marek Vasut
2013-09-12 11:02                                 ` Robert Hodaszi
2013-09-12 14:05                                   ` Marek Vasut
2013-09-12 14:15                                     ` Robert Hodaszi
2013-09-12 14:31                                       ` Marek Vasut
2013-09-12 14:32                                         ` Robert Hodaszi
2013-09-12 15:06                                           ` Marek Vasut
2013-09-12 18:17                                     ` Wolfgang Denk
2013-09-12 18:39                                       ` Fabio Estevam
2013-09-12 18:53                                         ` Wolfgang Denk
2013-09-12 19:37                                           ` Fabio Estevam
2013-09-13 11:11                                             ` Robert Hodaszi
2013-09-13 11:13                                               ` Robert Hodaszi
2013-09-13 14:01                                                 ` Marek Vasut
2013-09-13 14:24                                                   ` Robert Hodaszi
2013-09-13 16:06                                               ` Wolfgang Denk
2013-09-13 16:24                                                 ` Marek Vasut
2013-09-13 17:46                                                   ` Wolfgang Denk
2013-09-14 22:05                                                     ` Fabio Estevam
2013-09-12 11:08                                 ` Robert Hodaszi
2013-09-12 18:12                                   ` Wolfgang Denk
2013-09-12 17:50                               ` Wolfgang Denk
2013-07-13  2:43   ` Troy Kisky
2013-07-15 13:41     ` Albert ARIBAUD
2013-07-15 17:39       ` Troy Kisky
2013-07-15 19:59         ` Troy Kisky
2013-07-15 20:20           ` Albert ARIBAUD
2013-07-15 20:20         ` Albert ARIBAUD
2013-07-15 21:18           ` Troy Kisky
2013-07-12  5:57 ` Albert ARIBAUD
2013-07-12  6:39   ` Albert ARIBAUD
2013-07-12 11:51     ` Marek Vasut
2013-07-12  6:56   ` Stefano Babic
2013-07-12  7:30 ` Stefano Babic

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