From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03207C64EC7 for ; Sat, 25 Feb 2023 20:39:30 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C1708858A7; Sat, 25 Feb 2023 21:39:28 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="OGyWbUZN"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 13EBE85930; Sat, 25 Feb 2023 21:39:27 +0100 (CET) Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0C9D385748 for ; Sat, 25 Feb 2023 21:39:24 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=michael@amarulasolutions.com Received: by mail-ed1-x52c.google.com with SMTP id cq23so10770337edb.1 for ; Sat, 25 Feb 2023 12:39:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=70JCZw3OPZdD4Qp5Az6QWhuOOuGXtFyEoEtiX5rbcns=; b=OGyWbUZNjkawAwDOyDWZreyhzXn3N2QUI71UuizsS6Gskb5lC1R/1Qy6F8+OcLGo1h oum3lcy3IGC4IOe6N3SZfLgsPo88AhpNw7EwvivnirSFvqHifabTR3aw2tFbEVlb1uCO JTO7pBcweevuoN5EkSGKKsMlsSJgL6zPA6DZA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=70JCZw3OPZdD4Qp5Az6QWhuOOuGXtFyEoEtiX5rbcns=; b=JoNMgK10eMp/QUZDBy/2BqSDDjm4Eb4rtvBd9ftGbLj2HHyYBmALE0edN3sP+TM/r2 ZmbPP/bOiMxfR9ymxLva11kCkY45Wy1D+2L0OWp8sUPD63kwDNFR70JG2U8JdBVqpHhW f7Khh6Lh3m/rNKApFUd5vhAgKPqgmdUDgbQtc8dxDt+LKY+ANJaLgCfkycEcOtbS1pe9 n3mqXHUZRj7v8qtSxWC4gBWs43WEcYfF3IncSLurTH082jjgcxaQe/r38F1LN2bpTmVw QppZDHlX4fIG7o2KAATwNmcMUSrOmeFqQVWmJu14PQk0Eq+zkWsBVcXFWlec4K7NX0Lc R9Jg== X-Gm-Message-State: AO0yUKWFopEzbP2DC6jP4BHfaSPqm+Qa0SRmdvy+WJbOeZtW1IICU69d x0nDHgjukXHmtgOYn2paQ/q7OxpUut2T22mHsdYriA== X-Google-Smtp-Source: AK7set9YLYzTna7hQ21DMvCPwpxtKWZxdI4OLxKK7IbCuPBbs8MexTTfR6S0Zmmiu5nMxxF/ozb6RajvliUN4H/sK4w= X-Received: by 2002:a17:907:7e84:b0:8ad:d366:54c4 with SMTP id qb4-20020a1709077e8400b008add36654c4mr2611613ejc.4.1677357563442; Sat, 25 Feb 2023 12:39:23 -0800 (PST) MIME-Version: 1.0 References: <49d0321c-72e4-429f-335e-8f23ff866d39@rock-chips.com> <0a708ae1-4b92-a572-1d74-343070c8a26b@gmail.com> In-Reply-To: From: Michael Nazzareno Trimarchi Date: Sat, 25 Feb 2023 21:39:11 +0100 Message-ID: Subject: Re: [RFC PATCH v1 3/4] drivers: use devfdt_get_addr_size_index_ptr when cast to pointer To: Johan Jonker Cc: dario.binacchi@amarulasolutions.com, sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, u-boot@lists.denx.de, yifeng.zhao@rock-chips.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi On Sat, Feb 25, 2023 at 8:19=E2=80=AFPM Johan Jonker wr= ote: > > The fdt_addr_t and phys_addr_t size have been decoupled. > A 32bit CPU can expect 64-bit data from the device tree parser, > so use devfdt_get_addr_size_index_ptr instead of > the devfdt_get_addr_size_index function in the various files > in the drivers directory that cast to a pointer. > Nice if you use more size for each line ;) > Signed-off-by: Johan Jonker > --- > > Note: > > This is needed for a Rockchip patch serie to pass the test and > must be merged before by Rockchip maintainers: > > [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 > https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail= .com/ > > Replacement command used: > find . -type f -exec sed -i 's/*)devfdt_get_addr_size_index(/ > *)devfdt_get_addr_size_index_ptr(/g' {} + > --- > drivers/pci/pcie_dw_mvebu.c | 6 +++--- > drivers/spi/cadence_qspi.c | 3 +-- > 2 files changed, 4 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c > index a0b82c78..3b2ada54 100644 > --- a/drivers/pci/pcie_dw_mvebu.c > +++ b/drivers/pci/pcie_dw_mvebu.c > @@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *d= ev) > return -EINVAL; > > /* Get the config space base address and size */ > - pcie->cfg_base =3D (void *)devfdt_get_addr_size_index(dev, 1, > - &pcie->cfg_size)= ; > - if ((fdt_addr_t)pcie->cfg_base =3D=3D FDT_ADDR_T_NONE) > + pcie->cfg_base =3D devfdt_get_addr_size_index_ptr(dev, 1, > + &pcie->cfg_size); > + if (!pcie->cfg_base) > return -EINVAL; > > return 0; > diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c > index ab0a681c..93e57a54 100644 > --- a/drivers/spi/cadence_qspi.c > +++ b/drivers/spi/cadence_qspi.c > @@ -378,8 +378,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus= ) > ofnode subnode; > > plat->regbase =3D (void *)devfdt_get_addr_index(bus, 0); > - plat->ahbbase =3D (void *)devfdt_get_addr_size_index(bus, 1, > - &plat->ahbsize); > + plat->ahbbase =3D devfdt_get_addr_size_index_ptr(bus, 1, &plat->a= hbsize); hope that ahbbase then is checked if is NULL > plat->is_decoded_cs =3D dev_read_bool(bus, "cdns,is-decoded-cs"); > plat->fifo_depth =3D dev_read_u32_default(bus, "cdns,fifo-depth",= 128); > plat->fifo_width =3D dev_read_u32_default(bus, "cdns,fifo-width",= 4); Reviewed-by: Michael Trimarchi > -- > 2.20.1 > --=20 Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@amarulasolutions.com __________________________________ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 info@amarulasolutions.com www.amarulasolutions.com