From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 618B3C433EF for ; Wed, 15 Jun 2022 06:43:53 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 30CE284435; Wed, 15 Jun 2022 08:43:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="TN1XqbuK"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6E25284435; Wed, 15 Jun 2022 08:43:49 +0200 (CEST) Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 88D928442E for ; Wed, 15 Jun 2022 08:43:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=michael@amarulasolutions.com Received: by mail-pf1-x42c.google.com with SMTP id y196so10584225pfb.6 for ; Tue, 14 Jun 2022 23:43:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=xdZoJdntyzLvfyAjwl8Ug7FeAGnqlYb/0sB7DvfF1bA=; b=TN1XqbuKQLHI+Jl4LCo6KpEl3/QdXmEZijdkTJx9mwtFhi/ypD0Q6LSb+ARLueJ91B WfHCjCZx8bUYFYheVDVfHwy8XnD9A4mQ5rUS4PHij9SjdF02vvv0h1+k56GL7mgi1A3U 0CQppIAF0u00N4lsKPPuKeFE/DQpa3xCDs9v8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xdZoJdntyzLvfyAjwl8Ug7FeAGnqlYb/0sB7DvfF1bA=; b=mtDLCIOGssVWZCYeCDnoJd81JEpalVvRo64X7ebjOidTYdQMg4Ei7UvkVFjwHQE8J2 3nL24CsHYJZ5Gak1AWGXDMQb6f+Oy+ED99ijzydM6iMyGn0/M0pOXkQHmGLAJ9L5r2gs p32aPUdzoku6UuOKq9Fn9178c3qg69yAVZx8oK4wRq4eevNroyXZHaz46StK+T9h+lXX tBt435hja98XNs26rcVQW8nocIuehY5tkoGJE0qUJ1PI1DAIhS2uEA+KYRpbD0dv87nx V5wbQ7VK1F+Zl9SyLFC4L7e4LgXkQqlU6vAjHutOxxI2+dCBCy5nZVo/hEAfmFCRx0Q7 nqow== X-Gm-Message-State: AOAM530xelsinTrPzO1CIoJTm7HUev5Qkt2eouQRBx5hQkSGK9r62mKu Yrowf0GQWmLMA2VHIfiwIObOu3c+ZASlhwvlpBvs9Q== X-Google-Smtp-Source: ABdhPJw4pul0fJBCtWcvVc9JpekmBvLIH/kC4nmOvavlylTB4nP/1+WRf0pwAVLGnah6dQdMXSNwOxPpxUxY1JovXro= X-Received: by 2002:a63:914b:0:b0:3fc:f8b2:d947 with SMTP id l72-20020a63914b000000b003fcf8b2d947mr7631628pge.491.1655275424844; Tue, 14 Jun 2022 23:43:44 -0700 (PDT) MIME-Version: 1.0 References: <20220613211005.30871-1-heiko.thiery@gmail.com> In-Reply-To: From: Michael Nazzareno Trimarchi Date: Wed, 15 Jun 2022 08:43:33 +0200 Message-ID: Subject: Re: [PATCH v4] imx: add i.MX8MN DDR3L evk board support To: Heiko Thiery Cc: Marek Vasut , u-boot@lists.denx.de, Ying-Chun Liu , Peng Fan , Fabio Estevam , Marcel Ziswiler , Tim Harvey , Sean Anderson , =?UTF-8?Q?Thomas_Sch=C3=A4fer?= , Stefano Babic , Fabio Estevam Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi Heiko On Wed, Jun 15, 2022 at 8:23 AM Heiko Thiery wrote: > > Hi Marek, > > [SNIP] > > > > diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c > > > index 14cb51368f..0d9909a662 100644 > > > --- a/board/freescale/imx8mn_evk/spl.c > > > +++ b/board/freescale/imx8mn_evk/spl.c > > > @@ -83,6 +83,15 @@ int power_init_board(void) > > > #ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE > > > /* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mode */ > > > pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10); > > > +#elif defined(CONFIG_TARGET_IMX8MN_DDR3L_EVK) > > > + /* Set VDD_SOC to 0.85v for DDR3L at 1600MTS */ > > > + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); > > > + > > > + /* Disable the BUCK2 */ > > > + pmic_reg_write(dev, PCA9450_BUCK2CTRL, 0x48); > > > + > > > + /* Set NVCC_DRAM to 1.35v */ > > > + pmic_reg_write(dev, PCA9450_BUCK6OUT, 0x1E); > > > #else > > > > All this part is not done by the spl pmic driver? > > I saw that you added the PCA9450 driver. Do you know if this > initialization can be done by the driver when CONFIG_SPL_DM_REGULATOR > is enabled? If I see this correctly, it can't be done. Is that > correct? +&i2c1 { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { + u-boot,dm-spl; +}; + +&pinctrl_i2c1 { + u-boot,dm-spl; +}; + +&pinctrl_pmic { + u-boot,dm-spl; +}; + Maybe something like this should work. Now question is about should be done in pre-reloc or not Michael > > -- > Heiko -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@amarulasolutions.com __________________________________ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 info@amarulasolutions.com www.amarulasolutions.com