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From: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
To: Adam Ford <aford173@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>, Marek Vasut <marex@denx.de>,
	 Tommaso Merciai <tommaso.merciai@amarulasolutions.com>,
	 U-Boot Mailing List <u-boot@lists.denx.de>,
	Lukasz Majewski <lukma@denx.de>,
	Sean Anderson <seanga2@gmail.com>,
	 Fabio Estevam <festevam@gmail.com>,
	Tim Harvey <tharvey@gateworks.com>
Subject: Re: imx8mm eLCDIF clock
Date: Thu, 21 Apr 2022 14:08:04 +0200	[thread overview]
Message-ID: <CAOf5uwk82i=74btPtzzQBLm7yr9V2WeM=Gii6ctd0=ZTW=nvEQ@mail.gmail.com> (raw)
In-Reply-To: <CAHCN7xJoG4ZVesr4ZFG2H+hj-aPP_nKWZv_9ZusYUMrURUKpog@mail.gmail.com>

Hi

On Thu, Apr 21, 2022 at 2:05 PM Adam Ford <aford173@gmail.com> wrote:
>
> On Thu, Apr 21, 2022 at 7:03 AM Stefano Babic <sbabic@denx.de> wrote:
> >
> > On 21.04.22 14:01, Marek Vasut wrote:
> > > On 4/21/22 13:54, Tommaso Merciai wrote:
> > >> On Thu, Apr 21, 2022 at 01:20:58PM +0200, Marek Vasut wrote:
> > >>> On 4/21/22 13:14, Adam Ford wrote:
> > >>>> On Thu, Apr 21, 2022 at 5:29 AM Tommaso Merciai
> > >>>> <tommaso.merciai@amarulasolutions.com> wrote:
> > >>>>>
> > >>>>> On Thu, Apr 21, 2022 at 08:48:05AM +0200, Tommaso Merciai wrote:
> > >>>>>
> > >>>>> + Fabio
> > >>>>> + Tim
> > >>>>> + Michael
> > >>>>> + Marek
> > >>>>> + Adam
> > >>>>>
> > >>>>>> Hi,
> > >>>>>> I'm working on drivers/clk/imx/clk-imx8mm.c to port and bring up
> > >>>>>> eLCDIF
> > >>>>>> clocks. After port all necessary clocks needed by eLCDIF I found that
> > >>>>>> IMX8MM_VIDEO_PLL1 clock is not enabled and need the clk_enable to
> > >>>>>> enable
> > >>>>>> it at the end of the clk-imx8mm probe:
> > >>>>>>
> > >>>>>> struct clk *clkp;
> > >>>>>>
> > >>>>>> clk_get_by_id(IMX8MM_VIDEO_PLL1, &clkp);
> > >>>>>> clk_set_rate(clkp, 594000000UL);
> > >>>>>> clk_enable(clkp);
> > >>>>>>
> > >>>>>> What do you think about this solution?
> > >>>>>> There is a more standard way to do this?
> > >>>>>> I'm missing somethings?
> > >>>>
> > >>>> I think the LCD driver should request the clock and clock rate based
> > >>>> on settings the device tree.  However, I think the bigger issues is
> > >>>> that you might run into issues with the lack of a disp-blkctrl driver.
> > >>>> Marek enable the GPC driver fairly recently, but the blkctrl driver
> > >>>> will be needed to enable the LCD and DSI portions or the system may
> > >>>> hang.
> > >>>
> > >>> Just boot quickly and init the graphics pipeline in Linux ?
> > >>
> > >> Hi Marek,
> > >> Thanks for your feedback. You think make no sense to enable support
> > >> for the graphics pipeline at U-Boot level? Some customers want this
> > >> feature for that I think is better to have support for that.
> > >> What do you think about?
> > >
> > > I think it makes no sense to duplicate graphics pipeline in U-Boot.
> > >
> > > Just boot quickly enough and bring the graphics pipeline in Linux,
> >
> > +1
> >
> > Rather, it is not time anymore to get a flickering-free display from
> > U-Boot to Linux (it was possible on some SOC before DRM). Just booting
> > fast is the best option.
> >
> > Regards,
> > Stefano
> >
> > > then
> > > maintain one copy of all the drivers involved in the pipeline (scanout
> > > engine, GPCs, block controllers, bridge drivers, panel drivers). Also,
> > > you won't have to deal with the display pipeline handoff from U-Boot to
> > > Linux, which incurs flicker.
>
> For what it's worth, there was a thread about using Falcon mode with
> ARM64.  I was going to investigate it when I have some time.  It would
> be nice to bypass the U-Boot phase completely and jump from
> SPL->ATF->Linux if possible.
>
> adam

Well we should consider graphics panel in uboot, it's standard chain
for mobile phone, or rockchip bsp

Michael


> >
> >
> >
> >
> > --
> > =====================================================================
> > DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de
> > =====================================================================



--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com

  reply	other threads:[~2022-04-21 12:08 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-21  6:48 imx8mm eLCDIF clock Tommaso Merciai
2022-04-21 10:29 ` Tommaso Merciai
2022-04-21 11:14   ` Adam Ford
2022-04-21 11:20     ` Marek Vasut
2022-04-21 11:54       ` Tommaso Merciai
2022-04-21 12:01         ` Marek Vasut
2022-04-21 12:03           ` Stefano Babic
2022-04-21 12:05             ` Adam Ford
2022-04-21 12:08               ` Michael Nazzareno Trimarchi [this message]
2022-04-21 11:50     ` Tommaso Merciai
2022-04-22  0:09 ` Sean Anderson
2022-04-22  6:39   ` Tommaso Merciai
2022-05-27  3:41     ` Sean Anderson

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