From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Nazzareno Trimarchi Date: Tue, 5 Mar 2019 17:41:46 +0100 Subject: [U-Boot] IMX6 NAND boot regression In-Reply-To: References: <373ab899-ed9f-d5b7-cae4-910d4666125e@toradex.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de HI all On Mon, Feb 4, 2019 at 7:14 PM Tim Harvey wrote: > > On Sat, Feb 2, 2019 at 5:30 AM Adam Ford wrote: > > > > On Sat, Feb 2, 2019 at 12:29 AM Jagan Teki = wrote: > > > > > > +Adam, Shyam > > > > > > On Sat, 2 Feb, 2019, 8:49 AM Stefan Agner > > > > > > Hi Tim, > > > > > > > > On 02.02.19 03:32, Tim Harvey wrote: > > > > > Stefan, > > > > > > > > > > I'm trying to track down an IMX6 SPL NAND boot regression that st= arted > > > > > in v2018.07 with your patch series to mxs_nand. > > > > > > > > I am sorry about that. Unfortunately I did not had a design at hand= where > > > > I was able to test the NAND driver in SPL... > > > > > > > > > > > > > > I bisected it back to '5346c31e305a37d39f535cc0d5ae87d8b7e81230 m= td: > > > > > nand: mxs_nand: use self init'. With this particular patch nand b= bt > > > > > scanning would crash the board because of nand_chip.scan_btt not = being > > > > > assigned. This was later fixed in > > > > > '96d0be07e7498e7174daa6f3b56fc807b9feb71d MTD: nand: mxs_nand_spl= : Fix > > > > > empty function pointer for BBT' but cherry-picking that on top of > > > > > 5346c31 fixes the immediate crash while scanning but then I find = that > > > > > mxs_read_page_ecc() hangs on the 4th page of reading u-boot.img f= rom > > > > > the NAND. This gets worse 2 patches later where in > > > > > '28897e8d21f8e197e259a91c693de09cd81f2d5a: mtd: nand: mxs_nand: u= se > > > > > structure for BCH geometry' I find that the first byte of every p= age > > > > > read is wrong because mxs_nand_swap_block_mark() is getting calle= d on > > > > > the page which swaps the first bytes with oob. > > > > > > > > > > There are several IMX6 boards out there using both NAND and SPL I > > > > > believe that I would assume were broken by this series. Any ideas= on > > > > > the proper resolution? > > > > > > > > > > Look like 2017.03 can be stable boot from nand as for as my test is c= oncern. > > > > > > We are also trying hard using git bisect, but seems like multiple bre= akings. > > > > > > Will keep posted if something move further. > > > > > > From a different thread, someone was able to test these patches and > > found they fixed their booting issues: > > > > There was a broken function pointer here that was fixed and applied > > the imx-master, but pending merge with master > > http://patchwork.ozlabs.org/patch/1019440/ > > right, this one was the 96d0be07 merged upstream already. I'm not > clear how any NAND SPL would have worked after Sefan's series back in > June without this one. > >>SPL: board_init_r() spl_init Trying to boot from NAND spl: nand - using hw ecc 0x2c:0xdc erasesize=3D262144 (>>18) writesize=3D4096 (>>12) oobsize=3D224 chipsize=3D536870912 nand_spl_load_image offset:0x00200000 len:64 page:512 SPL: payload image: U-Boot 2019.04-rc3-dirty for imx=EF=BF=BD load addr: 0x177fffc0 size: 635435 nand_spl_load_image offset:0x00200000 len:635435 page:512 is_badblock offs=3D0x00240000 block:9 page:576 is_badblock offs=3D0x00280000 block:10 page:640 Jumping to U-Boot loaded - jumping to U-Boot... image entry point: 0x17800000 I'm stuck here. Booting from mmc is fine Michael > > > > Configure ECC from SPL here: > > http://patchwork.ozlabs.org/patch/1020160/ > > For my boards with Micron MT29F2G08AB 2Gbit NAND (oob=3D64) this was > enough but with Micron MT29F16G08AD 16Gbit (oob=3D224) and Cypress > S34ML16G202BH 16GBit (oob=3D128) NAND flash your other patch is needed. > > > > > Remove hard-coded ECC parameters since the patch above can autoset the= m. > > http://patchwork.ozlabs.org/patch/1026638/ > > > > Thanks Adam, this one resolved the boot issue with Micron MT29F16G08AD > 16Gbit (oob=3D224) and Cypress S34ML16G202BH 16Gbit (oob=3D128) NAND. > > I will ack those last 2 patches that are still pending and take note > to avoid anything between v2018.07 and the next release v2019.03 for > IMX NAND SPL. > > It kind of sucks that patches that affected IMX NAND SPL were accepted > with no testing on a NAND SPL board or cc's sent to maintainers of > boards using IMX NAND SPL but I understand the difficulty in even > identifying those maintainers and realize it is everyones > responsibility to test RC's on their own boards so I accept > responsibility for that. I'll make a note to remember that U-Boot is > broken for IMX NAND SPL between 2017.07 and 2019.03. > > Thanks, > > Tim > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > https://lists.denx.de/listinfo/u-boot --=20 | Michael Nazzareno Trimarchi Amarula Solutions BV | | COO - Founder Cruquiuskade 47 | | +31(0)851119172 Amsterdam 1018 AM NL | | [`as] http://www.amarulasolutions.com |