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* imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 14:56 ` Michael Trimarchi
  0 siblings, 0 replies; 35+ messages in thread
From: Michael Trimarchi @ 2018-01-24 14:56 UTC (permalink / raw)
  To: Fabio Estevam, Peter Chen
  Cc: Stefano Babic, u-boot, linux-usb, Michael Trimarchi

SION bit should be used in the situation that we need
to read back the value of a pin and should be set by
default. This can generate any kind of random malfunction
as described in this thread.

According to this thread:
https://www.spinics.net/lists/linux-usb/msg162574.html

We consider this an early bug so all the boards running imx25
with a minimimal set of functionalities can be affected.

As reported by this application note:
https://www.nxp.com/docs/en/application-note/AN5078.pdf

The software input on (SION) bit is an option to force an input
path to be active regardless of the value driven by the
corresponding module. It is used when the nature direction
of a pin depending on selected alternative function is an output,
but it is needed to read the real logic value on a pin.

The SION bit can be used in:
• Loopback: the module of a selected alternative function drives
the pad and also receives the pad value as an input
• GPIO capture: the module of a selected alternative function
drives the pin and the value is captured by the GPIO

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Refer-to:
	MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
	DataTraveler SE9 64GB

---
 arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
 1 file changed, 340 insertions(+), 340 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
index 5b2863e..2fcaf60 100644
--- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
+++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
@@ -30,481 +30,481 @@
 
 /*							    PAD    MUX    ALT INPSE PATH PADCTRL */
 enum {
-	MX25_PAD_A10__A10			= IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A10__GPIO_4_0			= IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A10__A10			= IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A10__GPIO_4_0			= IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A13__A13			= IOMUX_PAD(0x22C, 0x00c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A13__GPIO_4_1			= IOMUX_PAD(0x22C, 0x00c, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A13__A13			= IOMUX_PAD(0x22C, 0x00c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A13__GPIO_4_1			= IOMUX_PAD(0x22C, 0x00c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A14__A14			= IOMUX_PAD(0x230, 0x010, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A14__GPIO_2_0			= IOMUX_PAD(0x230, 0x010, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A14__A14			= IOMUX_PAD(0x230, 0x010, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A14__GPIO_2_0			= IOMUX_PAD(0x230, 0x010, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A15__A15			= IOMUX_PAD(0x234, 0x014, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A15__GPIO_2_1			= IOMUX_PAD(0x234, 0x014, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A15__A15			= IOMUX_PAD(0x234, 0x014, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A15__GPIO_2_1			= IOMUX_PAD(0x234, 0x014, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A16__A16			= IOMUX_PAD(0x000, 0x018, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A16__GPIO_2_2			= IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A16__A16			= IOMUX_PAD(0x000, 0x018, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A16__GPIO_2_2			= IOMUX_PAD(0x000, 0x018, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A17__A17			= IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A17__GPIO_2_3			= IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A17__A17			= IOMUX_PAD(0x238, 0x01c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A17__GPIO_2_3			= IOMUX_PAD(0x238, 0x01c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A18__A18			= IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A18__GPIO_2_4			= IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A18__FEC_COL			= IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL),
+	MX25_PAD_A18__A18			= IOMUX_PAD(0x23c, 0x020, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A18__GPIO_2_4			= IOMUX_PAD(0x23c, 0x020, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A18__FEC_COL			= IOMUX_PAD(0x23c, 0x020, 7, 0x504, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A19__A19			= IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A19__FEC_RX_ER			= IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL),
-	MX25_PAD_A19__GPIO_2_5			= IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A19__A19			= IOMUX_PAD(0x240, 0x024, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A19__FEC_RX_ER			= IOMUX_PAD(0x240, 0x024, 7, 0x518, 0, NO_PAD_CTRL),
+	MX25_PAD_A19__GPIO_2_5			= IOMUX_PAD(0x240, 0x024, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A20__A20			= IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A20__GPIO_2_6			= IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A20__FEC_RDATA2		= IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL),
+	MX25_PAD_A20__A20			= IOMUX_PAD(0x244, 0x028, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A20__GPIO_2_6			= IOMUX_PAD(0x244, 0x028, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A20__FEC_RDATA2		= IOMUX_PAD(0x244, 0x028, 7, 0x50c, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A21__A21			= IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A21__GPIO_2_7			= IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A21__FEC_RDATA3		= IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL),
+	MX25_PAD_A21__A21			= IOMUX_PAD(0x248, 0x02c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A21__GPIO_2_7			= IOMUX_PAD(0x248, 0x02c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A21__FEC_RDATA3		= IOMUX_PAD(0x248, 0x02c, 7, 0x510, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A22__A22			= IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A22__GPIO_2_8			= IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A22__A22			= IOMUX_PAD(0x000, 0x030, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A22__GPIO_2_8			= IOMUX_PAD(0x000, 0x030, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A23__A23			= IOMUX_PAD(0x24c, 0x034, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A23__GPIO_2_9			= IOMUX_PAD(0x24c, 0x034, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A23__A23			= IOMUX_PAD(0x24c, 0x034, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A23__GPIO_2_9			= IOMUX_PAD(0x24c, 0x034, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A24__A24			= IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A24__GPIO_2_10			= IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A24__FEC_RX_CLK		= IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL),
+	MX25_PAD_A24__A24			= IOMUX_PAD(0x250, 0x038, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A24__GPIO_2_10			= IOMUX_PAD(0x250, 0x038, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A24__FEC_RX_CLK		= IOMUX_PAD(0x250, 0x038, 7, 0x514, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A25__A25			= IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A25__GPIO_2_11			= IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A25__FEC_CRS			= IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL),
+	MX25_PAD_A25__A25			= IOMUX_PAD(0x254, 0x03c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A25__GPIO_2_11			= IOMUX_PAD(0x254, 0x03c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A25__FEC_CRS			= IOMUX_PAD(0x254, 0x03c, 7, 0x508, 0, NO_PAD_CTRL),
 
-	MX25_PAD_EB0__EB0			= IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_EB0__AUD4_TXD			= IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL),
-	MX25_PAD_EB0__GPIO_2_12			= IOMUX_PAD(0x258, 0x040, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB0__EB0			= IOMUX_PAD(0x258, 0x040, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB0__AUD4_TXD			= IOMUX_PAD(0x258, 0x040, 4, 0x464, 0, NO_PAD_CTRL),
+	MX25_PAD_EB0__GPIO_2_12			= IOMUX_PAD(0x258, 0x040, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_EB1__EB1			= IOMUX_PAD(0x25c, 0x044, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_EB1__AUD4_RXD			= IOMUX_PAD(0x25c, 0x044, 0x14, 0x460, 0, NO_PAD_CTRL),
-	MX25_PAD_EB1__GPIO_2_13			= IOMUX_PAD(0x25c, 0x044, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB1__EB1			= IOMUX_PAD(0x25c, 0x044, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB1__AUD4_RXD			= IOMUX_PAD(0x25c, 0x044, 4, 0x460, 0, NO_PAD_CTRL),
+	MX25_PAD_EB1__GPIO_2_13			= IOMUX_PAD(0x25c, 0x044, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_OE__OE				= IOMUX_PAD(0x260, 0x048, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_OE__AUD4_TXC			= IOMUX_PAD(0x260, 0x048, 0x14, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_OE__GPIO_2_14			= IOMUX_PAD(0x260, 0x048, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE__OE				= IOMUX_PAD(0x260, 0x048, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE__AUD4_TXC			= IOMUX_PAD(0x260, 0x048, 4, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE__GPIO_2_14			= IOMUX_PAD(0x260, 0x048, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS0__CS0			= IOMUX_PAD(0x000, 0x04c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS0__GPIO_4_2			= IOMUX_PAD(0x000, 0x04c, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS0__CS0			= IOMUX_PAD(0x000, 0x04c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS0__GPIO_4_2			= IOMUX_PAD(0x000, 0x04c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS1__CS1			= IOMUX_PAD(0x000, 0x050, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS1__NF_CE3			= IOMUX_PAD(0x000, 0x050, 0x01, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS1__GPIO_4_3			= IOMUX_PAD(0x000, 0x050, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS1__CS1			= IOMUX_PAD(0x000, 0x050, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS1__NF_CE3			= IOMUX_PAD(0x000, 0x050, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS1__GPIO_4_3			= IOMUX_PAD(0x000, 0x050, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS4__CS4			= IOMUX_PAD(0x264, 0x054, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS4__NF_CE1			= IOMUX_PAD(0x264, 0x054, 0x01, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS4__UART5_CTS			= IOMUX_PAD(0x264, 0x054, 0x13, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS4__GPIO_3_20			= IOMUX_PAD(0x264, 0x054, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__CS4			= IOMUX_PAD(0x264, 0x054, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__NF_CE1			= IOMUX_PAD(0x264, 0x054, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__UART5_CTS			= IOMUX_PAD(0x264, 0x054, 3, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__GPIO_3_20			= IOMUX_PAD(0x264, 0x054, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS5__CS5			= IOMUX_PAD(0x268, 0x058, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS5__NF_CE2			= IOMUX_PAD(0x268, 0x058, 0x01, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS5__UART5_RTS			= IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL),
-	MX25_PAD_CS5__GPIO_3_21			= IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__CS5			= IOMUX_PAD(0x268, 0x058, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__NF_CE2			= IOMUX_PAD(0x268, 0x058, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__UART5_RTS			= IOMUX_PAD(0x268, 0x058, 3, 0x574, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__GPIO_3_21			= IOMUX_PAD(0x268, 0x058, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NF_CE0__NF_CE0			= IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NF_CE0__GPIO_3_22		= IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NF_CE0__NF_CE0			= IOMUX_PAD(0x26c, 0x05c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NF_CE0__GPIO_3_22		= IOMUX_PAD(0x26c, 0x05c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_ECB__ECB			= IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_ECB__UART5_TXD_MUX		= IOMUX_PAD(0x270, 0x060, 0x13, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_ECB__GPIO_3_23			= IOMUX_PAD(0x270, 0x060, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_ECB__ECB			= IOMUX_PAD(0x270, 0x060, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_ECB__UART5_TXD_MUX		= IOMUX_PAD(0x270, 0x060, 3, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_ECB__GPIO_3_23			= IOMUX_PAD(0x270, 0x060, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LBA__LBA			= IOMUX_PAD(0x274, 0x064, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_LBA__UART5_RXD_MUX		= IOMUX_PAD(0x274, 0x064, 0x13, 0x578, 0, NO_PAD_CTRL),
-	MX25_PAD_LBA__GPIO_3_24			= IOMUX_PAD(0x274, 0x064, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LBA__LBA			= IOMUX_PAD(0x274, 0x064, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LBA__UART5_RXD_MUX		= IOMUX_PAD(0x274, 0x064, 3, 0x578, 0, NO_PAD_CTRL),
+	MX25_PAD_LBA__GPIO_3_24			= IOMUX_PAD(0x274, 0x064, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_BCLK__BCLK			= IOMUX_PAD(0x000, 0x068, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BCLK__GPIO_4_4			= IOMUX_PAD(0x000, 0x068, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BCLK__BCLK			= IOMUX_PAD(0x000, 0x068, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BCLK__GPIO_4_4			= IOMUX_PAD(0x000, 0x068, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_RW__RW				= IOMUX_PAD(0x278, 0x06c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_RW__AUD4_TXFS			= IOMUX_PAD(0x278, 0x06c, 0x14, 0x474, 0, NO_PAD_CTRL),
-	MX25_PAD_RW__GPIO_3_25			= IOMUX_PAD(0x278, 0x06c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RW__RW				= IOMUX_PAD(0x278, 0x06c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RW__AUD4_TXFS			= IOMUX_PAD(0x278, 0x06c, 4, 0x474, 0, NO_PAD_CTRL),
+	MX25_PAD_RW__GPIO_3_25			= IOMUX_PAD(0x278, 0x06c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFWE_B__NFWE_B			= IOMUX_PAD(0x000, 0x070, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFWE_B__GPIO_3_26		= IOMUX_PAD(0x000, 0x070, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWE_B__NFWE_B			= IOMUX_PAD(0x000, 0x070, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWE_B__GPIO_3_26		= IOMUX_PAD(0x000, 0x070, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFRE_B__NFRE_B			= IOMUX_PAD(0x000, 0x074, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFRE_B__GPIO_3_27		= IOMUX_PAD(0x000, 0x074, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFRE_B__NFRE_B			= IOMUX_PAD(0x000, 0x074, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFRE_B__GPIO_3_27		= IOMUX_PAD(0x000, 0x074, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFALE__NFALE			= IOMUX_PAD(0x000, 0x078, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFALE__GPIO_3_28		= IOMUX_PAD(0x000, 0x078, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFALE__NFALE			= IOMUX_PAD(0x000, 0x078, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFALE__GPIO_3_28		= IOMUX_PAD(0x000, 0x078, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFCLE__NFCLE			= IOMUX_PAD(0x000, 0x07c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFCLE__GPIO_3_29		= IOMUX_PAD(0x000, 0x07c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFCLE__NFCLE			= IOMUX_PAD(0x000, 0x07c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFCLE__GPIO_3_29		= IOMUX_PAD(0x000, 0x07c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFWP_B__NFWP_B			= IOMUX_PAD(0x000, 0x080, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFWP_B__GPIO_3_30		= IOMUX_PAD(0x000, 0x080, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWP_B__NFWP_B			= IOMUX_PAD(0x000, 0x080, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWP_B__GPIO_3_30		= IOMUX_PAD(0x000, 0x080, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFRB__NFRB			= IOMUX_PAD(0x27c, 0x084, 0x10, 0, 0, PAD_CTL_PKE),
-	MX25_PAD_NFRB__GPIO_3_31		= IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFRB__NFRB			= IOMUX_PAD(0x27c, 0x084, 0, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_NFRB__GPIO_3_31		= IOMUX_PAD(0x27c, 0x084, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D15__D15			= IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D15__LD16			= IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_D15__GPIO_4_5			= IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D15__D15			= IOMUX_PAD(0x280, 0x088, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D15__LD16			= IOMUX_PAD(0x280, 0x088, 1, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_D15__GPIO_4_5			= IOMUX_PAD(0x280, 0x088, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D14__D14			= IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D14__LD17			= IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_D14__GPIO_4_6			= IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D14__D14			= IOMUX_PAD(0x284, 0x08c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D14__LD17			= IOMUX_PAD(0x284, 0x08c, 1, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_D14__GPIO_4_6			= IOMUX_PAD(0x284, 0x08c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D13__D13			= IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D13__LD18			= IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_D13__GPIO_4_7			= IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D13__D13			= IOMUX_PAD(0x288, 0x090, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D13__LD18			= IOMUX_PAD(0x288, 0x090, 1, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_D13__GPIO_4_7			= IOMUX_PAD(0x288, 0x090, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D12__D12			= IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D12__GPIO_4_8			= IOMUX_PAD(0x28c, 0x094, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D12__D12			= IOMUX_PAD(0x28c, 0x094, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D12__GPIO_4_8			= IOMUX_PAD(0x28c, 0x094, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D11__D11			= IOMUX_PAD(0x290, 0x098, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D11__GPIO_4_9			= IOMUX_PAD(0x290, 0x098, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D11__D11			= IOMUX_PAD(0x290, 0x098, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D11__GPIO_4_9			= IOMUX_PAD(0x290, 0x098, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D10__D10			= IOMUX_PAD(0x294, 0x09c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D10__GPIO_4_10			= IOMUX_PAD(0x294, 0x09c, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D10__USBOTG_OC			= IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_D10__D10			= IOMUX_PAD(0x294, 0x09c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D10__GPIO_4_10			= IOMUX_PAD(0x294, 0x09c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D10__USBOTG_OC			= IOMUX_PAD(0x294, 0x09c, 6, 0x57c, 0, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_D9__D9				= IOMUX_PAD(0x298, 0x0a0, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D9__GPIO_4_11			= IOMUX_PAD(0x298, 0x0a0, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D9__USBH2_PWR			= IOMUX_PAD(0x298, 0x0a0, 0x06, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_D9__D9				= IOMUX_PAD(0x298, 0x0a0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D9__GPIO_4_11			= IOMUX_PAD(0x298, 0x0a0, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D9__USBH2_PWR			= IOMUX_PAD(0x298, 0x0a0, 6, 0, 0, PAD_CTL_PKE),
 
-	MX25_PAD_D8__D8				= IOMUX_PAD(0x29c, 0x0a4, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D8__GPIO_4_12			= IOMUX_PAD(0x29c, 0x0a4, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D8__USBH2_OC			= IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_D8__D8				= IOMUX_PAD(0x29c, 0x0a4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D8__GPIO_4_12			= IOMUX_PAD(0x29c, 0x0a4, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D8__USBH2_OC			= IOMUX_PAD(0x29c, 0x0a4, 6, 0x580, 0, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_D7__D7				= IOMUX_PAD(0x2a0, 0x0a8, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D7__GPIO_4_13			= IOMUX_PAD(0x2a0, 0x0a8, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D7__D7				= IOMUX_PAD(0x2a0, 0x0a8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D7__GPIO_4_13			= IOMUX_PAD(0x2a0, 0x0a8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D6__D6				= IOMUX_PAD(0x2a4, 0x0ac, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D6__GPIO_4_14			= IOMUX_PAD(0x2a4, 0x0ac, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D6__D6				= IOMUX_PAD(0x2a4, 0x0ac, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D6__GPIO_4_14			= IOMUX_PAD(0x2a4, 0x0ac, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D5__D5				= IOMUX_PAD(0x2a8, 0x0b0, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D5__GPIO_4_15			= IOMUX_PAD(0x2a8, 0x0b0, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D5__D5				= IOMUX_PAD(0x2a8, 0x0b0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D5__GPIO_4_15			= IOMUX_PAD(0x2a8, 0x0b0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D4__D4				= IOMUX_PAD(0x2ac, 0x0b4, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D4__GPIO_4_16			= IOMUX_PAD(0x2ac, 0x0b4, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D4__D4				= IOMUX_PAD(0x2ac, 0x0b4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D4__GPIO_4_16			= IOMUX_PAD(0x2ac, 0x0b4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D3__D3				= IOMUX_PAD(0x2b0, 0x0b8, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D3__GPIO_4_17			= IOMUX_PAD(0x2b0, 0x0b8, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D3__D3				= IOMUX_PAD(0x2b0, 0x0b8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D3__GPIO_4_17			= IOMUX_PAD(0x2b0, 0x0b8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D2__D2				= IOMUX_PAD(0x2b4, 0x0bc, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D2__GPIO_4_18			= IOMUX_PAD(0x2b4, 0x0bc, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D2__D2				= IOMUX_PAD(0x2b4, 0x0bc, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D2__GPIO_4_18			= IOMUX_PAD(0x2b4, 0x0bc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D1__D1				= IOMUX_PAD(0x2b8, 0x0c0, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D1__GPIO_4_19			= IOMUX_PAD(0x2b8, 0x0c0, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D1__D1				= IOMUX_PAD(0x2b8, 0x0c0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D1__GPIO_4_19			= IOMUX_PAD(0x2b8, 0x0c0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D0__D0				= IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D0__GPIO_4_20			= IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D0__D0				= IOMUX_PAD(0x2bc, 0x0c4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D0__GPIO_4_20			= IOMUX_PAD(0x2bc, 0x0c4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD0__LD0			= IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD0__CSI_D0			= IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL),
-	MX25_PAD_LD0__GPIO_2_15			= IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD0__LD0			= IOMUX_PAD(0x2c0, 0x0c8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD0__CSI_D0			= IOMUX_PAD(0x2c0, 0x0c8, 2, 0x488, 0, NO_PAD_CTRL),
+	MX25_PAD_LD0__GPIO_2_15			= IOMUX_PAD(0x2c0, 0x0c8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD1__LD1			= IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD1__CSI_D1			= IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL),
-	MX25_PAD_LD1__GPIO_2_16			= IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD1__LD1			= IOMUX_PAD(0x2c4, 0x0cc, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD1__CSI_D1			= IOMUX_PAD(0x2c4, 0x0cc, 2, 0x48c, 0, NO_PAD_CTRL),
+	MX25_PAD_LD1__GPIO_2_16			= IOMUX_PAD(0x2c4, 0x0cc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD2__LD2			= IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD2__GPIO_2_17			= IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD2__LD2			= IOMUX_PAD(0x2c8, 0x0d0, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD2__GPIO_2_17			= IOMUX_PAD(0x2c8, 0x0d0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD3__LD3			= IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD3__GPIO_2_18			= IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD3__LD3			= IOMUX_PAD(0x2cc, 0x0d4, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD3__GPIO_2_18			= IOMUX_PAD(0x2cc, 0x0d4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD4__LD4			= IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD4__GPIO_2_19			= IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD4__LD4			= IOMUX_PAD(0x2d0, 0x0d8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD4__GPIO_2_19			= IOMUX_PAD(0x2d0, 0x0d8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD5__LD5			= IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD5__GPIO_1_19			= IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD5__LD5			= IOMUX_PAD(0x2d4, 0x0dc, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD5__GPIO_1_19			= IOMUX_PAD(0x2d4, 0x0dc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD6__LD6			= IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD6__GPIO_1_20			= IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD6__LD6			= IOMUX_PAD(0x2d8, 0x0e0, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD6__GPIO_1_20			= IOMUX_PAD(0x2d8, 0x0e0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD7__LD7			= IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD7__GPIO_1_21			= IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD7__LD7			= IOMUX_PAD(0x2dc, 0x0e4, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD7__GPIO_1_21			= IOMUX_PAD(0x2dc, 0x0e4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD8__LD8			= IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD8__FEC_TX_ERR		= IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD8__LD8			= IOMUX_PAD(0x2e0, 0x0e8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD8__FEC_TX_ERR		= IOMUX_PAD(0x2e0, 0x0e8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD9__LD9			= IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD9__FEC_COL			= IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL),
+	MX25_PAD_LD9__LD9			= IOMUX_PAD(0x2e4, 0x0ec, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD9__FEC_COL			= IOMUX_PAD(0x2e4, 0x0ec, 5, 0x504, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD10__LD10			= IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD10__FEC_RX_ER		= IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL),
+	MX25_PAD_LD10__LD10			= IOMUX_PAD(0x2e8, 0x0f0, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD10__FEC_RX_ER		= IOMUX_PAD(0x2e8, 0x0f0, 5, 0x518, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD11__LD11			= IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD11__FEC_RDATA2		= IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL),
+	MX25_PAD_LD11__LD11			= IOMUX_PAD(0x2ec, 0x0f4, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD11__FEC_RDATA2		= IOMUX_PAD(0x2ec, 0x0f4, 5, 0x50c, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD12__LD12			= IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD12__FEC_RDATA3		= IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL),
+	MX25_PAD_LD12__LD12			= IOMUX_PAD(0x2f0, 0x0f8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD12__FEC_RDATA3		= IOMUX_PAD(0x2f0, 0x0f8, 5, 0x510, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD13__LD13			= IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD13__FEC_TDATA2		= IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD13__LD13			= IOMUX_PAD(0x2f4, 0x0fc, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD13__FEC_TDATA2		= IOMUX_PAD(0x2f4, 0x0fc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD14__LD14			= IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD14__FEC_TDATA3		= IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD14__LD14			= IOMUX_PAD(0x2f8, 0x100, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD14__FEC_TDATA3		= IOMUX_PAD(0x2f8, 0x100, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD15__LD15			= IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD15__FEC_RX_CLK		= IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL),
+	MX25_PAD_LD15__LD15			= IOMUX_PAD(0x2fc, 0x104, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD15__FEC_RX_CLK		= IOMUX_PAD(0x2fc, 0x104, 5, 0x514, 1, NO_PAD_CTRL),
 
-	MX25_PAD_HSYNC__HSYNC			= IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_HSYNC__GPIO_1_22		= IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_HSYNC__HSYNC			= IOMUX_PAD(0x300, 0x108, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_HSYNC__GPIO_1_22		= IOMUX_PAD(0x300, 0x108, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_VSYNC__VSYNC			= IOMUX_PAD(0x304, 0x10c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSYNC__GPIO_1_23		= IOMUX_PAD(0x304, 0x10c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSYNC__VSYNC			= IOMUX_PAD(0x304, 0x10c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSYNC__GPIO_1_23		= IOMUX_PAD(0x304, 0x10c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LSCLK__LSCLK			= IOMUX_PAD(0x308, 0x110, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_LSCLK__GPIO_1_24		= IOMUX_PAD(0x308, 0x110, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LSCLK__LSCLK			= IOMUX_PAD(0x308, 0x110, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LSCLK__GPIO_1_24		= IOMUX_PAD(0x308, 0x110, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_OE_ACD__OE_ACD			= IOMUX_PAD(0x30c, 0x114, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_OE_ACD__GPIO_1_25		= IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE_ACD__OE_ACD			= IOMUX_PAD(0x30c, 0x114, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE_ACD__GPIO_1_25		= IOMUX_PAD(0x30c, 0x114, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CONTRAST__CONTRAST		= IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CONTRAST__PWM4_PWMO		= IOMUX_PAD(0x310, 0x118, 0x14, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CONTRAST__FEC_CRS		= IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL),
+	MX25_PAD_CONTRAST__CONTRAST		= IOMUX_PAD(0x310, 0x118, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CONTRAST__PWM4_PWMO		= IOMUX_PAD(0x310, 0x118, 4, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CONTRAST__FEC_CRS		= IOMUX_PAD(0x310, 0x118, 5, 0x508, 1, NO_PAD_CTRL),
 
-	MX25_PAD_PWM__PWM			= IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_PWM__GPIO_1_26			= IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_PWM__USBH2_OC			= IOMUX_PAD(0x314, 0x11c, 0x16, 0x580, 1, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_PWM__PWM			= IOMUX_PAD(0x314, 0x11c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_PWM__GPIO_1_26			= IOMUX_PAD(0x314, 0x11c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_PWM__USBH2_OC			= IOMUX_PAD(0x314, 0x11c, 6, 0x580, 1, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_CSI_D2__CSI_D2			= IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D2__UART5_RXD_MUX		= IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL),
-	MX25_PAD_CSI_D2__GPIO_1_27		= IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D2__CSPI3_MOSI		= IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__CSI_D2			= IOMUX_PAD(0x318, 0x120, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__UART5_RXD_MUX		= IOMUX_PAD(0x318, 0x120, 1, 0x578, 1, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__GPIO_1_27		= IOMUX_PAD(0x318, 0x120, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__CSPI3_MOSI		= IOMUX_PAD(0x318, 0x120, 7, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D3__CSI_D3			= IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D3__GPIO_1_28		= IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D3__CSPI3_MISO		= IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL),
+	MX25_PAD_CSI_D3__CSI_D3			= IOMUX_PAD(0x31c, 0x124, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D3__GPIO_1_28		= IOMUX_PAD(0x31c, 0x124, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D3__CSPI3_MISO		= IOMUX_PAD(0x31c, 0x124, 7, 0x4b4, 1, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D4__CSI_D4			= IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D4__UART5_RTS		= IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL),
-	MX25_PAD_CSI_D4__GPIO_1_29		= IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D4__CSPI3_SCLK		= IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__CSI_D4			= IOMUX_PAD(0x320, 0x128, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__UART5_RTS		= IOMUX_PAD(0x320, 0x128, 1, 0x574, 1, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__GPIO_1_29		= IOMUX_PAD(0x320, 0x128, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__CSPI3_SCLK		= IOMUX_PAD(0x320, 0x128, 7, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D5__CSI_D5			= IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D5__GPIO_1_30		= IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D5__CSPI3_RDY		= IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D5__CSI_D5			= IOMUX_PAD(0x324, 0x12c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D5__GPIO_1_30		= IOMUX_PAD(0x324, 0x12c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D5__CSPI3_RDY		= IOMUX_PAD(0x324, 0x12c, 7, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D6__CSI_D6			= IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D6__GPIO_1_31		= IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D6__CSI_D6			= IOMUX_PAD(0x328, 0x130, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D6__GPIO_1_31		= IOMUX_PAD(0x328, 0x130, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D7__CSI_D7			= IOMUX_PAD(0x32c, 0x134, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D7__GPIO_1_6		= IOMUX_PAD(0x32c, 0x134, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D7__CSI_D7			= IOMUX_PAD(0x32c, 0x134, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D7__GPIO_1_6		= IOMUX_PAD(0x32c, 0x134, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D8__CSI_D8			= IOMUX_PAD(0x330, 0x138, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D8__GPIO_1_7		= IOMUX_PAD(0x330, 0x138, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D8__CSI_D8			= IOMUX_PAD(0x330, 0x138, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D8__GPIO_1_7		= IOMUX_PAD(0x330, 0x138, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D9__CSI_D9			= IOMUX_PAD(0x334, 0x13c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D9__GPIO_4_21		= IOMUX_PAD(0x334, 0x13c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D9__CSI_D9			= IOMUX_PAD(0x334, 0x13c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D9__GPIO_4_21		= IOMUX_PAD(0x334, 0x13c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_MCLK__CSI_MCLK		= IOMUX_PAD(0x338, 0x140, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_MCLK__GPIO_1_8		= IOMUX_PAD(0x338, 0x140, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_MCLK__CSI_MCLK		= IOMUX_PAD(0x338, 0x140, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_MCLK__GPIO_1_8		= IOMUX_PAD(0x338, 0x140, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_VSYNC__CSI_VSYNC		= IOMUX_PAD(0x33c, 0x144, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_VSYNC__GPIO_1_9		= IOMUX_PAD(0x33c, 0x144, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_VSYNC__CSI_VSYNC		= IOMUX_PAD(0x33c, 0x144, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_VSYNC__GPIO_1_9		= IOMUX_PAD(0x33c, 0x144, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_HSYNC__CSI_HSYNC		= IOMUX_PAD(0x340, 0x148, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_HSYNC__GPIO_1_10		= IOMUX_PAD(0x340, 0x148, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_HSYNC__CSI_HSYNC		= IOMUX_PAD(0x340, 0x148, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_HSYNC__GPIO_1_10		= IOMUX_PAD(0x340, 0x148, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_PIXCLK__CSI_PIXCLK		= IOMUX_PAD(0x344, 0x14c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_PIXCLK__GPIO_1_11		= IOMUX_PAD(0x344, 0x14c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_PIXCLK__CSI_PIXCLK		= IOMUX_PAD(0x344, 0x14c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_PIXCLK__GPIO_1_11		= IOMUX_PAD(0x344, 0x14c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_I2C1_CLK__I2C1_CLK		= IOMUX_PAD(0x348, 0x150, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_I2C1_CLK__GPIO_1_12		= IOMUX_PAD(0x348, 0x150, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_CLK__I2C1_CLK		= IOMUX_PAD(0x348, 0x150, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_CLK__GPIO_1_12		= IOMUX_PAD(0x348, 0x150, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_I2C1_DAT__I2C1_DAT		= IOMUX_PAD(0x34c, 0x154, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_I2C1_DAT__GPIO_1_13		= IOMUX_PAD(0x34c, 0x154, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_DAT__I2C1_DAT		= IOMUX_PAD(0x34c, 0x154, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_DAT__GPIO_1_13		= IOMUX_PAD(0x34c, 0x154, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_MOSI__CSPI1_MOSI		= IOMUX_PAD(0x350, 0x158, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_MOSI__GPIO_1_14		= IOMUX_PAD(0x350, 0x158, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MOSI__CSPI1_MOSI		= IOMUX_PAD(0x350, 0x158, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MOSI__GPIO_1_14		= IOMUX_PAD(0x350, 0x158, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_MISO__CSPI1_MISO		= IOMUX_PAD(0x354, 0x15c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_MISO__GPIO_1_15		= IOMUX_PAD(0x354, 0x15c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MISO__CSPI1_MISO		= IOMUX_PAD(0x354, 0x15c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MISO__GPIO_1_15		= IOMUX_PAD(0x354, 0x15c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_SS0__CSPI1_SS0		= IOMUX_PAD(0x358, 0x160, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SS0__GPIO_1_16		= IOMUX_PAD(0x358, 0x160, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS0__CSPI1_SS0		= IOMUX_PAD(0x358, 0x160, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS0__GPIO_1_16		= IOMUX_PAD(0x358, 0x160, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_SS1__CSPI1_SS1		= IOMUX_PAD(0x35c, 0x164, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SS1__I2C3_DAT		= IOMUX_PAD(0x35c, 0x164, 0x11, 0x528, 1, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SS1__GPIO_1_17		= IOMUX_PAD(0x35c, 0x164, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS1__CSPI1_SS1		= IOMUX_PAD(0x35c, 0x164, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS1__I2C3_DAT		= IOMUX_PAD(0x35c, 0x164, 1, 0x528, 1, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS1__GPIO_1_17		= IOMUX_PAD(0x35c, 0x164, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_SCLK__CSPI1_SCLK		= IOMUX_PAD(0x360, 0x168, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SCLK__GPIO_1_18		= IOMUX_PAD(0x360, 0x168, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SCLK__CSPI1_SCLK		= IOMUX_PAD(0x360, 0x168, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SCLK__GPIO_1_18		= IOMUX_PAD(0x360, 0x168, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_RDY__CSPI1_RDY		= IOMUX_PAD(0x364, 0x16c, 0x10, 0, 0, PAD_CTL_PKE),
-	MX25_PAD_CSPI1_RDY__GPIO_2_22		= IOMUX_PAD(0x364, 0x16c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_RDY__CSPI1_RDY		= IOMUX_PAD(0x364, 0x16c, 0, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_CSPI1_RDY__GPIO_2_22		= IOMUX_PAD(0x364, 0x16c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_RXD__UART1_RXD		= IOMUX_PAD(0x368, 0x170, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_UART1_RXD__GPIO_4_22		= IOMUX_PAD(0x368, 0x170, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_RXD__UART1_RXD		= IOMUX_PAD(0x368, 0x170, 0, 0, 0, PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_UART1_RXD__GPIO_4_22		= IOMUX_PAD(0x368, 0x170, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_TXD__UART1_TXD		= IOMUX_PAD(0x36c, 0x174, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART1_TXD__GPIO_4_23		= IOMUX_PAD(0x36c, 0x174, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_TXD__UART1_TXD		= IOMUX_PAD(0x36c, 0x174, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_TXD__GPIO_4_23		= IOMUX_PAD(0x36c, 0x174, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_RTS__UART1_RTS		= IOMUX_PAD(0x370, 0x178, 0x10, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_UART1_RTS__CSI_D0		= IOMUX_PAD(0x370, 0x178, 0x11, 0x488, 1, NO_PAD_CTRL),
-	MX25_PAD_UART1_RTS__GPIO_4_24		= IOMUX_PAD(0x370, 0x178, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_RTS__UART1_RTS		= IOMUX_PAD(0x370, 0x178, 0, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_UART1_RTS__CSI_D0		= IOMUX_PAD(0x370, 0x178, 1, 0x488, 1, NO_PAD_CTRL),
+	MX25_PAD_UART1_RTS__GPIO_4_24		= IOMUX_PAD(0x370, 0x178, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_CTS__UART1_CTS		= IOMUX_PAD(0x374, 0x17c, 0x10, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_UART1_CTS__CSI_D1		= IOMUX_PAD(0x374, 0x17c, 0x11, 0x48c, 1, NO_PAD_CTRL),
-	MX25_PAD_UART1_CTS__GPIO_4_25		= IOMUX_PAD(0x374, 0x17c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_CTS__UART1_CTS		= IOMUX_PAD(0x374, 0x17c, 0, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_UART1_CTS__CSI_D1		= IOMUX_PAD(0x374, 0x17c, 1, 0x48c, 1, NO_PAD_CTRL),
+	MX25_PAD_UART1_CTS__GPIO_4_25		= IOMUX_PAD(0x374, 0x17c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_RXD__UART2_RXD		= IOMUX_PAD(0x378, 0x180, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_RXD__GPIO_4_26		= IOMUX_PAD(0x378, 0x180, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RXD__UART2_RXD		= IOMUX_PAD(0x378, 0x180, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RXD__GPIO_4_26		= IOMUX_PAD(0x378, 0x180, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_TXD__UART2_TXD		= IOMUX_PAD(0x37c, 0x184, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_TXD__GPIO_4_27		= IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_TXD__UART2_TXD		= IOMUX_PAD(0x37c, 0x184, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_TXD__GPIO_4_27		= IOMUX_PAD(0x37c, 0x184, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_RTS__UART2_RTS		= IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_RTS__FEC_COL		= IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL),
-	MX25_PAD_UART2_RTS__GPIO_4_28		= IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RTS__UART2_RTS		= IOMUX_PAD(0x380, 0x188, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RTS__FEC_COL		= IOMUX_PAD(0x380, 0x188, 2, 0x504, 2, NO_PAD_CTRL),
+	MX25_PAD_UART2_RTS__GPIO_4_28		= IOMUX_PAD(0x380, 0x188, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_CTS__FEC_RX_ER		= IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL),
-	MX25_PAD_UART2_CTS__UART2_CTS		= IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_CTS__GPIO_4_29		= IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_CTS__FEC_RX_ER		= IOMUX_PAD(0x384, 0x18c, 2, 0x518, 2, NO_PAD_CTRL),
+	MX25_PAD_UART2_CTS__UART2_CTS		= IOMUX_PAD(0x384, 0x18c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_CTS__GPIO_4_29		= IOMUX_PAD(0x384, 0x18c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_CMD__SD1_CMD		= IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_CMD__FEC_RDATA2		= IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_CMD__GPIO_2_23		= IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_CMD__SD1_CMD		= IOMUX_PAD(0x388, 0x190, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_CMD__FEC_RDATA2		= IOMUX_PAD(0x388, 0x190, 2, 0x50c, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_CMD__GPIO_2_23		= IOMUX_PAD(0x388, 0x190, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_CLK__SD1_CLK		= IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_CLK__FEC_RDATA3		= IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_CLK__GPIO_2_24		= IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_CLK__SD1_CLK		= IOMUX_PAD(0x38c, 0x194, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_CLK__FEC_RDATA3		= IOMUX_PAD(0x38c, 0x194, 2, 0x510, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_CLK__GPIO_2_24		= IOMUX_PAD(0x38c, 0x194, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA0__SD1_DATA0		= IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA0__GPIO_2_25		= IOMUX_PAD(0x390, 0x198, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA0__SD1_DATA0		= IOMUX_PAD(0x390, 0x198, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA0__GPIO_2_25		= IOMUX_PAD(0x390, 0x198, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA1__SD1_DATA1		= IOMUX_PAD(0x394, 0x19c, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA1__AUD7_RXD		= IOMUX_PAD(0x394, 0x19c, 0x13, 0x478, 0, NO_PAD_CTRL),
-	MX25_PAD_SD1_DATA1__GPIO_2_26		= IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA1__SD1_DATA1		= IOMUX_PAD(0x394, 0x19c, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA1__AUD7_RXD		= IOMUX_PAD(0x394, 0x19c, 3, 0x478, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA1__GPIO_2_26		= IOMUX_PAD(0x394, 0x19c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA2__SD1_DATA2		= IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA2__FEC_RX_CLK		= IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_DATA2__GPIO_2_27		= IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA2__SD1_DATA2		= IOMUX_PAD(0x398, 0x1a0, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA2__FEC_RX_CLK		= IOMUX_PAD(0x398, 0x1a0, 5, 0x514, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA2__GPIO_2_27		= IOMUX_PAD(0x398, 0x1a0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA3__SD1_DATA3		= IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA3__FEC_CRS		= IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_DATA3__GPIO_2_28		= IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA3__SD1_DATA3		= IOMUX_PAD(0x39c, 0x1a4, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA3__FEC_CRS		= IOMUX_PAD(0x39c, 0x1a4, 0, 0x508, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA3__GPIO_2_28		= IOMUX_PAD(0x39c, 0x1a4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW0__KPP_ROW0		= IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW0__GPIO_2_29		= IOMUX_PAD(0x3a0, 0x1a8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW0__KPP_ROW0		= IOMUX_PAD(0x3a0, 0x1a8, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW0__GPIO_2_29		= IOMUX_PAD(0x3a0, 0x1a8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW1__KPP_ROW1		= IOMUX_PAD(0x3a4, 0x1ac, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW1__GPIO_2_30		= IOMUX_PAD(0x3a4, 0x1ac, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW1__KPP_ROW1		= IOMUX_PAD(0x3a4, 0x1ac, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW1__GPIO_2_30		= IOMUX_PAD(0x3a4, 0x1ac, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW2__KPP_ROW2		= IOMUX_PAD(0x3a8, 0x1b0, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW2__CSI_D0		= IOMUX_PAD(0x3a8, 0x1b0, 0x13, 0x488, 2, NO_PAD_CTRL),
-	MX25_PAD_KPP_ROW2__GPIO_2_31		= IOMUX_PAD(0x3a8, 0x1b0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW2__KPP_ROW2		= IOMUX_PAD(0x3a8, 0x1b0, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW2__CSI_D0		= IOMUX_PAD(0x3a8, 0x1b0, 3, 0x488, 2, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW2__GPIO_2_31		= IOMUX_PAD(0x3a8, 0x1b0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW3__KPP_ROW3		= IOMUX_PAD(0x3ac, 0x1b4, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW3__CSI_LD1		= IOMUX_PAD(0x3ac, 0x1b4, 0x13, 0x48c, 2, NO_PAD_CTRL),
-	MX25_PAD_KPP_ROW3__GPIO_3_0		= IOMUX_PAD(0x3ac, 0x1b4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW3__KPP_ROW3		= IOMUX_PAD(0x3ac, 0x1b4, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW3__CSI_LD1		= IOMUX_PAD(0x3ac, 0x1b4, 3, 0x48c, 2, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW3__GPIO_3_0		= IOMUX_PAD(0x3ac, 0x1b4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL0__KPP_COL0		= IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL0__UART4_RXD_MUX	= IOMUX_PAD(0x3b0, 0x1b8, 0x11, 0x570, 1, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL0__AUD5_TXD		= IOMUX_PAD(0x3b0, 0x1b8, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL0__GPIO_3_1		= IOMUX_PAD(0x3b0, 0x1b8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL0__KPP_COL0		= IOMUX_PAD(0x3b0, 0x1b8, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL0__UART4_RXD_MUX	= IOMUX_PAD(0x3b0, 0x1b8, 1, 0x570, 1, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL0__AUD5_TXD		= IOMUX_PAD(0x3b0, 0x1b8, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL0__GPIO_3_1		= IOMUX_PAD(0x3b0, 0x1b8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL1__KPP_COL1		= IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL1__UART4_TXD_MUX	= IOMUX_PAD(0x3b4, 0x1bc, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL1__AUD5_RXD		= IOMUX_PAD(0x3b4, 0x1bc, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL1__GPIO_3_2		= IOMUX_PAD(0x3b4, 0x1bc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL1__KPP_COL1		= IOMUX_PAD(0x3b4, 0x1bc, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL1__UART4_TXD_MUX	= IOMUX_PAD(0x3b4, 0x1bc, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL1__AUD5_RXD		= IOMUX_PAD(0x3b4, 0x1bc, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL1__GPIO_3_2		= IOMUX_PAD(0x3b4, 0x1bc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL2__KPP_COL2		= IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL2__UART4_RTS		= IOMUX_PAD(0x3b8, 0x1c0, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL2__AUD5_TXC		= IOMUX_PAD(0x3b8, 0x1c0, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL2__GPIO_3_3		= IOMUX_PAD(0x3b8, 0x1c0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL2__KPP_COL2		= IOMUX_PAD(0x3b8, 0x1c0, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL2__UART4_RTS		= IOMUX_PAD(0x3b8, 0x1c0, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL2__AUD5_TXC		= IOMUX_PAD(0x3b8, 0x1c0, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL2__GPIO_3_3		= IOMUX_PAD(0x3b8, 0x1c0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL3__KPP_COL3		= IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL3__UART4_CTS		= IOMUX_PAD(0x3bc, 0x1c4, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL3__AUD5_TXFS		= IOMUX_PAD(0x3bc, 0x1c4, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL3__GPIO_3_4		= IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL3__KPP_COL3		= IOMUX_PAD(0x3bc, 0x1c4, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL3__UART4_CTS		= IOMUX_PAD(0x3bc, 0x1c4, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL3__AUD5_TXFS		= IOMUX_PAD(0x3bc, 0x1c4, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL3__GPIO_3_4		= IOMUX_PAD(0x3bc, 0x1c4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_MDC__FEC_MDC		= IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_MDC__AUD4_TXD		= IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL),
-	MX25_PAD_FEC_MDC__GPIO_3_5		= IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDC__FEC_MDC		= IOMUX_PAD(0x3c0, 0x1c8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDC__AUD4_TXD		= IOMUX_PAD(0x3c0, 0x1c8, 2, 0x464, 1, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDC__GPIO_3_5		= IOMUX_PAD(0x3c0, 0x1c8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_MDIO__FEC_MDIO		= IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP),
-	MX25_PAD_FEC_MDIO__AUD4_RXD		= IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL),
-	MX25_PAD_FEC_MDIO__GPIO_3_6		= IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDIO__FEC_MDIO		= IOMUX_PAD(0x3c4, 0x1cc, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP),
+	MX25_PAD_FEC_MDIO__AUD4_RXD		= IOMUX_PAD(0x3c4, 0x1cc, 2, 0x460, 1, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDIO__GPIO_3_6		= IOMUX_PAD(0x3c4, 0x1cc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TDATA0__FEC_TDATA0		= IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_TDATA0__GPIO_3_7		= IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0		= IOMUX_PAD(0x3c8, 0x1d0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA0__GPIO_3_7		= IOMUX_PAD(0x3c8, 0x1d0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TDATA1__FEC_TDATA1		= IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_TDATA1__AUD4_TXFS		= IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL),
-	MX25_PAD_FEC_TDATA1__GPIO_3_8		= IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1		= IOMUX_PAD(0x3cc, 0x1d4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA1__AUD4_TXFS		= IOMUX_PAD(0x3cc, 0x1d4, 2, 0x474, 1, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA1__GPIO_3_8		= IOMUX_PAD(0x3cc, 0x1d4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TX_EN__FEC_TX_EN		= IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_TX_EN__GPIO_3_9		= IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN		= IOMUX_PAD(0x3d0, 0x1d8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TX_EN__GPIO_3_9		= IOMUX_PAD(0x3d0, 0x1d8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_RDATA0__FEC_RDATA0		= IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_RDATA0__GPIO_3_10		= IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0		= IOMUX_PAD(0x3d4, 0x1dc, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_RDATA0__GPIO_3_10		= IOMUX_PAD(0x3d4, 0x1dc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_RDATA1__FEC_RDATA1		= IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_RDATA1__GPIO_3_11		= IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1		= IOMUX_PAD(0x3d8, 0x1e0, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_RDATA1__GPIO_3_11		= IOMUX_PAD(0x3d8, 0x1e0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_RX_DV__FEC_RX_DV		= IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_RX_DV__CAN2_RX		= IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP),
-	MX25_PAD_FEC_RX_DV__GPIO_3_12		= IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV		= IOMUX_PAD(0x3dc, 0x1e4, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_RX_DV__CAN2_RX		= IOMUX_PAD(0x3dc, 0x1e4, 4, 0x484, 0, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_FEC_RX_DV__GPIO_3_12		= IOMUX_PAD(0x3dc, 0x1e4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		= IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_TX_CLK__GPIO_3_13		= IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		= IOMUX_PAD(0x3e0, 0x1e8, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_TX_CLK__GPIO_3_13		= IOMUX_PAD(0x3e0, 0x1e8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_RTCK__RTCK			= IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_RTCK__OWIRE			= IOMUX_PAD(0x3e4, 0x1ec, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_RTCK__GPIO_3_14		= IOMUX_PAD(0x3e4, 0x1ec, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RTCK__RTCK			= IOMUX_PAD(0x3e4, 0x1ec, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RTCK__OWIRE			= IOMUX_PAD(0x3e4, 0x1ec, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RTCK__GPIO_3_14		= IOMUX_PAD(0x3e4, 0x1ec, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_DE_B__DE_B			= IOMUX_PAD(0x3ec, 0x1f0, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_DE_B__GPIO_2_20		= IOMUX_PAD(0x3ec, 0x1f0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_DE_B__DE_B			= IOMUX_PAD(0x3ec, 0x1f0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_DE_B__GPIO_2_20		= IOMUX_PAD(0x3ec, 0x1f0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_TDO__TDO			= IOMUX_PAD(0x3e8, 0x000, 0x00, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_TDO__TDO			= IOMUX_PAD(0x3e8, 0x000, 0, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_GPIO_A__GPIO_A			= IOMUX_PAD(0x3f0, 0x1f4, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_A__CAN1_TX		= IOMUX_PAD(0x3f0, 0x1f4, 0x16, 0, 0, PAD_CTL_PUS_22K_UP),
-	MX25_PAD_GPIO_A__USBOTG_PWR		= IOMUX_PAD(0x3f0, 0x1f4, 0x12, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_GPIO_A__GPIO_A			= IOMUX_PAD(0x3f0, 0x1f4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_A__CAN1_TX		= IOMUX_PAD(0x3f0, 0x1f4, 6, 0, 0, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_A__USBOTG_PWR		= IOMUX_PAD(0x3f0, 0x1f4, 2, 0, 0, PAD_CTL_PKE),
 
-	MX25_PAD_GPIO_B__GPIO_B			= IOMUX_PAD(0x3f4, 0x1f8, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_B__CAN1_RX		= IOMUX_PAD(0x3f4, 0x1f8, 0x16, 0x480, 1, PAD_CTL_PUS_22K_UP),
-	MX25_PAD_GPIO_B__USBOTG_OC		= IOMUX_PAD(0x3f4, 0x1f8, 0x12, 0x57c, 1, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_GPIO_B__GPIO_B			= IOMUX_PAD(0x3f4, 0x1f8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_B__CAN1_RX		= IOMUX_PAD(0x3f4, 0x1f8, 6, 0x480, 1, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_B__USBOTG_OC		= IOMUX_PAD(0x3f4, 0x1f8, 2, 0x57c, 1, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_GPIO_C__GPIO_C			= IOMUX_PAD(0x3f8, 0x1fc, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_C__CAN2_TX		= IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_C__GPIO_C			= IOMUX_PAD(0x3f8, 0x1fc, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_C__CAN2_TX		= IOMUX_PAD(0x3f8, 0x1fc, 6, 0, 0, PAD_CTL_PUS_22K_UP),
 
-	MX25_PAD_GPIO_D__GPIO_D			= IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_E__LD16			= IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_GPIO_D__CAN2_RX		= IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_D__GPIO_D			= IOMUX_PAD(0x3fc, 0x200, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_E__LD16			= IOMUX_PAD(0x400, 0x204, 2, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_GPIO_D__CAN2_RX		= IOMUX_PAD(0x3fc, 0x200, 6, 0x484, 1, PAD_CTL_PUS_22K_UP),
 
-	MX25_PAD_GPIO_E__GPIO_E			= IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_F__LD17			= IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_GPIO_E__I2C3_CLK		= IOMUX_PAD(0x400, 0x204, 0x11, 0x524, 2, NO_PAD_CTRL),
-	MX25_PAD_GPIO_E__AUD7_TXD		= IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_E__GPIO_E			= IOMUX_PAD(0x400, 0x204, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_F__LD17			= IOMUX_PAD(0x404, 0x208, 2, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_GPIO_E__I2C3_CLK		= IOMUX_PAD(0x400, 0x204, 1, 0x524, 2, NO_PAD_CTRL),
+	MX25_PAD_GPIO_E__AUD7_TXD		= IOMUX_PAD(0x400, 0x204, 4, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_GPIO_F__GPIO_F			= IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_F__AUD7_TXC		= IOMUX_PAD(0x404, 0x208, 0x14, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_F__GPIO_F			= IOMUX_PAD(0x404, 0x208, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_F__AUD7_TXC		= IOMUX_PAD(0x404, 0x208, 4, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_EXT_ARMCLK__EXT_ARMCLK		= IOMUX_PAD(0x000, 0x20c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_EXT_ARMCLK__GPIO_3_15		= IOMUX_PAD(0x000, 0x20c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EXT_ARMCLK__EXT_ARMCLK		= IOMUX_PAD(0x000, 0x20c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EXT_ARMCLK__GPIO_3_15		= IOMUX_PAD(0x000, 0x20c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK	= IOMUX_PAD(0x000, 0x210, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UPLL_BYPCLK__GPIO_3_16		= IOMUX_PAD(0x000, 0x210, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK	= IOMUX_PAD(0x000, 0x210, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UPLL_BYPCLK__GPIO_3_16		= IOMUX_PAD(0x000, 0x210, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_VSTBY_REQ__VSTBY_REQ		= IOMUX_PAD(0x408, 0x214, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_REQ__AUD7_TXFS		= IOMUX_PAD(0x408, 0x214, 0x14, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_REQ__GPIO_3_17		= IOMUX_PAD(0x408, 0x214, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_ACK__VSTBY_ACK		= IOMUX_PAD(0x40c, 0x218, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_ACK__GPIO_3_18		= IOMUX_PAD(0x40c, 0x218, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_REQ__VSTBY_REQ		= IOMUX_PAD(0x408, 0x214, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_REQ__AUD7_TXFS		= IOMUX_PAD(0x408, 0x214, 4, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_REQ__GPIO_3_17		= IOMUX_PAD(0x408, 0x214, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_ACK__VSTBY_ACK		= IOMUX_PAD(0x40c, 0x218, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_ACK__GPIO_3_18		= IOMUX_PAD(0x40c, 0x218, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_POWER_FAIL__POWER_FAIL		= IOMUX_PAD(0x410, 0x21c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_POWER_FAIL__AUD7_RXD		= IOMUX_PAD(0x410, 0x21c, 0x14, 0x478, 1, NO_PAD_CTRL),
-	MX25_PAD_POWER_FAIL__GPIO_3_19		= IOMUX_PAD(0x410, 0x21c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_POWER_FAIL__POWER_FAIL		= IOMUX_PAD(0x410, 0x21c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_POWER_FAIL__AUD7_RXD		= IOMUX_PAD(0x410, 0x21c, 4, 0x478, 1, NO_PAD_CTRL),
+	MX25_PAD_POWER_FAIL__GPIO_3_19		= IOMUX_PAD(0x410, 0x21c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CLKO__CLKO			= IOMUX_PAD(0x414, 0x220, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CLKO__GPIO_2_21		= IOMUX_PAD(0x414, 0x220, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CLKO__CLKO			= IOMUX_PAD(0x414, 0x220, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CLKO__GPIO_2_21		= IOMUX_PAD(0x414, 0x220, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_BOOT_MODE0__BOOT_MODE0		= IOMUX_PAD(0x000, 0x224, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BOOT_MODE0__GPIO_4_30		= IOMUX_PAD(0x000, 0x224, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BOOT_MODE1__BOOT_MODE1		= IOMUX_PAD(0x000, 0x228, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BOOT_MODE1__GPIO_4_31		= IOMUX_PAD(0x000, 0x228, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE0__BOOT_MODE0		= IOMUX_PAD(0x000, 0x224, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE0__GPIO_4_30		= IOMUX_PAD(0x000, 0x224, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE1__BOOT_MODE1		= IOMUX_PAD(0x000, 0x228, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE1__GPIO_4_31		= IOMUX_PAD(0x000, 0x228, 5, 0, 0, NO_PAD_CTRL),
 
 	MX25_PAD_CTL_GRP_DVS_MISC		= IOMUX_PAD(0x418, 0x000, 0, 0, 0, NO_PAD_CTRL),
 	MX25_PAD_CTL_GRP_DSE_FEC		= IOMUX_PAD(0x41c, 0x000, 0, 0, 0, NO_PAD_CTRL),

^ permalink raw reply related	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 14:56 ` Michael Trimarchi
  0 siblings, 0 replies; 35+ messages in thread
From: Michael Trimarchi @ 2018-01-24 14:56 UTC (permalink / raw)
  To: u-boot

SION bit should be used in the situation that we need
to read back the value of a pin and should be set by
default. This can generate any kind of random malfunction
as described in this thread.

According to this thread:
https://www.spinics.net/lists/linux-usb/msg162574.html

We consider this an early bug so all the boards running imx25
with a minimimal set of functionalities can be affected.

As reported by this application note:
https://www.nxp.com/docs/en/application-note/AN5078.pdf

The software input on (SION) bit is an option to force an input
path to be active regardless of the value driven by the
corresponding module. It is used when the nature direction
of a pin depending on selected alternative function is an output,
but it is needed to read the real logic value on a pin.

The SION bit can be used in:
• Loopback: the module of a selected alternative function drives
the pad and also receives the pad value as an input
• GPIO capture: the module of a selected alternative function
drives the pin and the value is captured by the GPIO

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Refer-to:
	MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
	DataTraveler SE9 64GB

---
 arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
 1 file changed, 340 insertions(+), 340 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
index 5b2863e..2fcaf60 100644
--- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
+++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
@@ -30,481 +30,481 @@
 
 /*							    PAD    MUX    ALT INPSE PATH PADCTRL */
 enum {
-	MX25_PAD_A10__A10			= IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A10__GPIO_4_0			= IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A10__A10			= IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A10__GPIO_4_0			= IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A13__A13			= IOMUX_PAD(0x22C, 0x00c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A13__GPIO_4_1			= IOMUX_PAD(0x22C, 0x00c, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A13__A13			= IOMUX_PAD(0x22C, 0x00c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A13__GPIO_4_1			= IOMUX_PAD(0x22C, 0x00c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A14__A14			= IOMUX_PAD(0x230, 0x010, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A14__GPIO_2_0			= IOMUX_PAD(0x230, 0x010, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A14__A14			= IOMUX_PAD(0x230, 0x010, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A14__GPIO_2_0			= IOMUX_PAD(0x230, 0x010, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A15__A15			= IOMUX_PAD(0x234, 0x014, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A15__GPIO_2_1			= IOMUX_PAD(0x234, 0x014, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A15__A15			= IOMUX_PAD(0x234, 0x014, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A15__GPIO_2_1			= IOMUX_PAD(0x234, 0x014, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A16__A16			= IOMUX_PAD(0x000, 0x018, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A16__GPIO_2_2			= IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A16__A16			= IOMUX_PAD(0x000, 0x018, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A16__GPIO_2_2			= IOMUX_PAD(0x000, 0x018, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A17__A17			= IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A17__GPIO_2_3			= IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A17__A17			= IOMUX_PAD(0x238, 0x01c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A17__GPIO_2_3			= IOMUX_PAD(0x238, 0x01c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A18__A18			= IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A18__GPIO_2_4			= IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A18__FEC_COL			= IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL),
+	MX25_PAD_A18__A18			= IOMUX_PAD(0x23c, 0x020, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A18__GPIO_2_4			= IOMUX_PAD(0x23c, 0x020, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A18__FEC_COL			= IOMUX_PAD(0x23c, 0x020, 7, 0x504, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A19__A19			= IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A19__FEC_RX_ER			= IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL),
-	MX25_PAD_A19__GPIO_2_5			= IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A19__A19			= IOMUX_PAD(0x240, 0x024, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A19__FEC_RX_ER			= IOMUX_PAD(0x240, 0x024, 7, 0x518, 0, NO_PAD_CTRL),
+	MX25_PAD_A19__GPIO_2_5			= IOMUX_PAD(0x240, 0x024, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A20__A20			= IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A20__GPIO_2_6			= IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A20__FEC_RDATA2		= IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL),
+	MX25_PAD_A20__A20			= IOMUX_PAD(0x244, 0x028, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A20__GPIO_2_6			= IOMUX_PAD(0x244, 0x028, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A20__FEC_RDATA2		= IOMUX_PAD(0x244, 0x028, 7, 0x50c, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A21__A21			= IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A21__GPIO_2_7			= IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A21__FEC_RDATA3		= IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL),
+	MX25_PAD_A21__A21			= IOMUX_PAD(0x248, 0x02c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A21__GPIO_2_7			= IOMUX_PAD(0x248, 0x02c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A21__FEC_RDATA3		= IOMUX_PAD(0x248, 0x02c, 7, 0x510, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A22__A22			= IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A22__GPIO_2_8			= IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A22__A22			= IOMUX_PAD(0x000, 0x030, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A22__GPIO_2_8			= IOMUX_PAD(0x000, 0x030, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A23__A23			= IOMUX_PAD(0x24c, 0x034, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A23__GPIO_2_9			= IOMUX_PAD(0x24c, 0x034, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A23__A23			= IOMUX_PAD(0x24c, 0x034, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A23__GPIO_2_9			= IOMUX_PAD(0x24c, 0x034, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A24__A24			= IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A24__GPIO_2_10			= IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A24__FEC_RX_CLK		= IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL),
+	MX25_PAD_A24__A24			= IOMUX_PAD(0x250, 0x038, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A24__GPIO_2_10			= IOMUX_PAD(0x250, 0x038, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A24__FEC_RX_CLK		= IOMUX_PAD(0x250, 0x038, 7, 0x514, 0, NO_PAD_CTRL),
 
-	MX25_PAD_A25__A25			= IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A25__GPIO_2_11			= IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_A25__FEC_CRS			= IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL),
+	MX25_PAD_A25__A25			= IOMUX_PAD(0x254, 0x03c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A25__GPIO_2_11			= IOMUX_PAD(0x254, 0x03c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_A25__FEC_CRS			= IOMUX_PAD(0x254, 0x03c, 7, 0x508, 0, NO_PAD_CTRL),
 
-	MX25_PAD_EB0__EB0			= IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_EB0__AUD4_TXD			= IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL),
-	MX25_PAD_EB0__GPIO_2_12			= IOMUX_PAD(0x258, 0x040, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB0__EB0			= IOMUX_PAD(0x258, 0x040, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB0__AUD4_TXD			= IOMUX_PAD(0x258, 0x040, 4, 0x464, 0, NO_PAD_CTRL),
+	MX25_PAD_EB0__GPIO_2_12			= IOMUX_PAD(0x258, 0x040, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_EB1__EB1			= IOMUX_PAD(0x25c, 0x044, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_EB1__AUD4_RXD			= IOMUX_PAD(0x25c, 0x044, 0x14, 0x460, 0, NO_PAD_CTRL),
-	MX25_PAD_EB1__GPIO_2_13			= IOMUX_PAD(0x25c, 0x044, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB1__EB1			= IOMUX_PAD(0x25c, 0x044, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EB1__AUD4_RXD			= IOMUX_PAD(0x25c, 0x044, 4, 0x460, 0, NO_PAD_CTRL),
+	MX25_PAD_EB1__GPIO_2_13			= IOMUX_PAD(0x25c, 0x044, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_OE__OE				= IOMUX_PAD(0x260, 0x048, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_OE__AUD4_TXC			= IOMUX_PAD(0x260, 0x048, 0x14, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_OE__GPIO_2_14			= IOMUX_PAD(0x260, 0x048, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE__OE				= IOMUX_PAD(0x260, 0x048, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE__AUD4_TXC			= IOMUX_PAD(0x260, 0x048, 4, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE__GPIO_2_14			= IOMUX_PAD(0x260, 0x048, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS0__CS0			= IOMUX_PAD(0x000, 0x04c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS0__GPIO_4_2			= IOMUX_PAD(0x000, 0x04c, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS0__CS0			= IOMUX_PAD(0x000, 0x04c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS0__GPIO_4_2			= IOMUX_PAD(0x000, 0x04c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS1__CS1			= IOMUX_PAD(0x000, 0x050, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS1__NF_CE3			= IOMUX_PAD(0x000, 0x050, 0x01, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS1__GPIO_4_3			= IOMUX_PAD(0x000, 0x050, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS1__CS1			= IOMUX_PAD(0x000, 0x050, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS1__NF_CE3			= IOMUX_PAD(0x000, 0x050, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS1__GPIO_4_3			= IOMUX_PAD(0x000, 0x050, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS4__CS4			= IOMUX_PAD(0x264, 0x054, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS4__NF_CE1			= IOMUX_PAD(0x264, 0x054, 0x01, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS4__UART5_CTS			= IOMUX_PAD(0x264, 0x054, 0x13, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS4__GPIO_3_20			= IOMUX_PAD(0x264, 0x054, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__CS4			= IOMUX_PAD(0x264, 0x054, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__NF_CE1			= IOMUX_PAD(0x264, 0x054, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__UART5_CTS			= IOMUX_PAD(0x264, 0x054, 3, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS4__GPIO_3_20			= IOMUX_PAD(0x264, 0x054, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CS5__CS5			= IOMUX_PAD(0x268, 0x058, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS5__NF_CE2			= IOMUX_PAD(0x268, 0x058, 0x01, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CS5__UART5_RTS			= IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL),
-	MX25_PAD_CS5__GPIO_3_21			= IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__CS5			= IOMUX_PAD(0x268, 0x058, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__NF_CE2			= IOMUX_PAD(0x268, 0x058, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__UART5_RTS			= IOMUX_PAD(0x268, 0x058, 3, 0x574, 0, NO_PAD_CTRL),
+	MX25_PAD_CS5__GPIO_3_21			= IOMUX_PAD(0x268, 0x058, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NF_CE0__NF_CE0			= IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NF_CE0__GPIO_3_22		= IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NF_CE0__NF_CE0			= IOMUX_PAD(0x26c, 0x05c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NF_CE0__GPIO_3_22		= IOMUX_PAD(0x26c, 0x05c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_ECB__ECB			= IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_ECB__UART5_TXD_MUX		= IOMUX_PAD(0x270, 0x060, 0x13, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_ECB__GPIO_3_23			= IOMUX_PAD(0x270, 0x060, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_ECB__ECB			= IOMUX_PAD(0x270, 0x060, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_ECB__UART5_TXD_MUX		= IOMUX_PAD(0x270, 0x060, 3, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_ECB__GPIO_3_23			= IOMUX_PAD(0x270, 0x060, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LBA__LBA			= IOMUX_PAD(0x274, 0x064, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_LBA__UART5_RXD_MUX		= IOMUX_PAD(0x274, 0x064, 0x13, 0x578, 0, NO_PAD_CTRL),
-	MX25_PAD_LBA__GPIO_3_24			= IOMUX_PAD(0x274, 0x064, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LBA__LBA			= IOMUX_PAD(0x274, 0x064, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LBA__UART5_RXD_MUX		= IOMUX_PAD(0x274, 0x064, 3, 0x578, 0, NO_PAD_CTRL),
+	MX25_PAD_LBA__GPIO_3_24			= IOMUX_PAD(0x274, 0x064, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_BCLK__BCLK			= IOMUX_PAD(0x000, 0x068, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BCLK__GPIO_4_4			= IOMUX_PAD(0x000, 0x068, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BCLK__BCLK			= IOMUX_PAD(0x000, 0x068, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BCLK__GPIO_4_4			= IOMUX_PAD(0x000, 0x068, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_RW__RW				= IOMUX_PAD(0x278, 0x06c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_RW__AUD4_TXFS			= IOMUX_PAD(0x278, 0x06c, 0x14, 0x474, 0, NO_PAD_CTRL),
-	MX25_PAD_RW__GPIO_3_25			= IOMUX_PAD(0x278, 0x06c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RW__RW				= IOMUX_PAD(0x278, 0x06c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RW__AUD4_TXFS			= IOMUX_PAD(0x278, 0x06c, 4, 0x474, 0, NO_PAD_CTRL),
+	MX25_PAD_RW__GPIO_3_25			= IOMUX_PAD(0x278, 0x06c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFWE_B__NFWE_B			= IOMUX_PAD(0x000, 0x070, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFWE_B__GPIO_3_26		= IOMUX_PAD(0x000, 0x070, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWE_B__NFWE_B			= IOMUX_PAD(0x000, 0x070, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWE_B__GPIO_3_26		= IOMUX_PAD(0x000, 0x070, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFRE_B__NFRE_B			= IOMUX_PAD(0x000, 0x074, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFRE_B__GPIO_3_27		= IOMUX_PAD(0x000, 0x074, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFRE_B__NFRE_B			= IOMUX_PAD(0x000, 0x074, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFRE_B__GPIO_3_27		= IOMUX_PAD(0x000, 0x074, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFALE__NFALE			= IOMUX_PAD(0x000, 0x078, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFALE__GPIO_3_28		= IOMUX_PAD(0x000, 0x078, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFALE__NFALE			= IOMUX_PAD(0x000, 0x078, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFALE__GPIO_3_28		= IOMUX_PAD(0x000, 0x078, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFCLE__NFCLE			= IOMUX_PAD(0x000, 0x07c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFCLE__GPIO_3_29		= IOMUX_PAD(0x000, 0x07c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFCLE__NFCLE			= IOMUX_PAD(0x000, 0x07c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFCLE__GPIO_3_29		= IOMUX_PAD(0x000, 0x07c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFWP_B__NFWP_B			= IOMUX_PAD(0x000, 0x080, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_NFWP_B__GPIO_3_30		= IOMUX_PAD(0x000, 0x080, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWP_B__NFWP_B			= IOMUX_PAD(0x000, 0x080, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFWP_B__GPIO_3_30		= IOMUX_PAD(0x000, 0x080, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_NFRB__NFRB			= IOMUX_PAD(0x27c, 0x084, 0x10, 0, 0, PAD_CTL_PKE),
-	MX25_PAD_NFRB__GPIO_3_31		= IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_NFRB__NFRB			= IOMUX_PAD(0x27c, 0x084, 0, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_NFRB__GPIO_3_31		= IOMUX_PAD(0x27c, 0x084, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D15__D15			= IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D15__LD16			= IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_D15__GPIO_4_5			= IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D15__D15			= IOMUX_PAD(0x280, 0x088, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D15__LD16			= IOMUX_PAD(0x280, 0x088, 1, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_D15__GPIO_4_5			= IOMUX_PAD(0x280, 0x088, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D14__D14			= IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D14__LD17			= IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_D14__GPIO_4_6			= IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D14__D14			= IOMUX_PAD(0x284, 0x08c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D14__LD17			= IOMUX_PAD(0x284, 0x08c, 1, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_D14__GPIO_4_6			= IOMUX_PAD(0x284, 0x08c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D13__D13			= IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D13__LD18			= IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_D13__GPIO_4_7			= IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D13__D13			= IOMUX_PAD(0x288, 0x090, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D13__LD18			= IOMUX_PAD(0x288, 0x090, 1, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_D13__GPIO_4_7			= IOMUX_PAD(0x288, 0x090, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D12__D12			= IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D12__GPIO_4_8			= IOMUX_PAD(0x28c, 0x094, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D12__D12			= IOMUX_PAD(0x28c, 0x094, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D12__GPIO_4_8			= IOMUX_PAD(0x28c, 0x094, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D11__D11			= IOMUX_PAD(0x290, 0x098, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D11__GPIO_4_9			= IOMUX_PAD(0x290, 0x098, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D11__D11			= IOMUX_PAD(0x290, 0x098, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D11__GPIO_4_9			= IOMUX_PAD(0x290, 0x098, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D10__D10			= IOMUX_PAD(0x294, 0x09c, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D10__GPIO_4_10			= IOMUX_PAD(0x294, 0x09c, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D10__USBOTG_OC			= IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_D10__D10			= IOMUX_PAD(0x294, 0x09c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D10__GPIO_4_10			= IOMUX_PAD(0x294, 0x09c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D10__USBOTG_OC			= IOMUX_PAD(0x294, 0x09c, 6, 0x57c, 0, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_D9__D9				= IOMUX_PAD(0x298, 0x0a0, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D9__GPIO_4_11			= IOMUX_PAD(0x298, 0x0a0, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D9__USBH2_PWR			= IOMUX_PAD(0x298, 0x0a0, 0x06, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_D9__D9				= IOMUX_PAD(0x298, 0x0a0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D9__GPIO_4_11			= IOMUX_PAD(0x298, 0x0a0, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D9__USBH2_PWR			= IOMUX_PAD(0x298, 0x0a0, 6, 0, 0, PAD_CTL_PKE),
 
-	MX25_PAD_D8__D8				= IOMUX_PAD(0x29c, 0x0a4, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D8__GPIO_4_12			= IOMUX_PAD(0x29c, 0x0a4, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D8__USBH2_OC			= IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_D8__D8				= IOMUX_PAD(0x29c, 0x0a4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D8__GPIO_4_12			= IOMUX_PAD(0x29c, 0x0a4, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D8__USBH2_OC			= IOMUX_PAD(0x29c, 0x0a4, 6, 0x580, 0, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_D7__D7				= IOMUX_PAD(0x2a0, 0x0a8, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D7__GPIO_4_13			= IOMUX_PAD(0x2a0, 0x0a8, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D7__D7				= IOMUX_PAD(0x2a0, 0x0a8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D7__GPIO_4_13			= IOMUX_PAD(0x2a0, 0x0a8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D6__D6				= IOMUX_PAD(0x2a4, 0x0ac, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D6__GPIO_4_14			= IOMUX_PAD(0x2a4, 0x0ac, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D6__D6				= IOMUX_PAD(0x2a4, 0x0ac, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D6__GPIO_4_14			= IOMUX_PAD(0x2a4, 0x0ac, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D5__D5				= IOMUX_PAD(0x2a8, 0x0b0, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D5__GPIO_4_15			= IOMUX_PAD(0x2a8, 0x0b0, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D5__D5				= IOMUX_PAD(0x2a8, 0x0b0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D5__GPIO_4_15			= IOMUX_PAD(0x2a8, 0x0b0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D4__D4				= IOMUX_PAD(0x2ac, 0x0b4, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D4__GPIO_4_16			= IOMUX_PAD(0x2ac, 0x0b4, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D4__D4				= IOMUX_PAD(0x2ac, 0x0b4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D4__GPIO_4_16			= IOMUX_PAD(0x2ac, 0x0b4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D3__D3				= IOMUX_PAD(0x2b0, 0x0b8, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D3__GPIO_4_17			= IOMUX_PAD(0x2b0, 0x0b8, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D3__D3				= IOMUX_PAD(0x2b0, 0x0b8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D3__GPIO_4_17			= IOMUX_PAD(0x2b0, 0x0b8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D2__D2				= IOMUX_PAD(0x2b4, 0x0bc, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D2__GPIO_4_18			= IOMUX_PAD(0x2b4, 0x0bc, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D2__D2				= IOMUX_PAD(0x2b4, 0x0bc, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D2__GPIO_4_18			= IOMUX_PAD(0x2b4, 0x0bc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D1__D1				= IOMUX_PAD(0x2b8, 0x0c0, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D1__GPIO_4_19			= IOMUX_PAD(0x2b8, 0x0c0, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D1__D1				= IOMUX_PAD(0x2b8, 0x0c0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D1__GPIO_4_19			= IOMUX_PAD(0x2b8, 0x0c0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_D0__D0				= IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_D0__GPIO_4_20			= IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D0__D0				= IOMUX_PAD(0x2bc, 0x0c4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_D0__GPIO_4_20			= IOMUX_PAD(0x2bc, 0x0c4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD0__LD0			= IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD0__CSI_D0			= IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL),
-	MX25_PAD_LD0__GPIO_2_15			= IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD0__LD0			= IOMUX_PAD(0x2c0, 0x0c8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD0__CSI_D0			= IOMUX_PAD(0x2c0, 0x0c8, 2, 0x488, 0, NO_PAD_CTRL),
+	MX25_PAD_LD0__GPIO_2_15			= IOMUX_PAD(0x2c0, 0x0c8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD1__LD1			= IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD1__CSI_D1			= IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL),
-	MX25_PAD_LD1__GPIO_2_16			= IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD1__LD1			= IOMUX_PAD(0x2c4, 0x0cc, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD1__CSI_D1			= IOMUX_PAD(0x2c4, 0x0cc, 2, 0x48c, 0, NO_PAD_CTRL),
+	MX25_PAD_LD1__GPIO_2_16			= IOMUX_PAD(0x2c4, 0x0cc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD2__LD2			= IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD2__GPIO_2_17			= IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD2__LD2			= IOMUX_PAD(0x2c8, 0x0d0, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD2__GPIO_2_17			= IOMUX_PAD(0x2c8, 0x0d0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD3__LD3			= IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD3__GPIO_2_18			= IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD3__LD3			= IOMUX_PAD(0x2cc, 0x0d4, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD3__GPIO_2_18			= IOMUX_PAD(0x2cc, 0x0d4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD4__LD4			= IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD4__GPIO_2_19			= IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD4__LD4			= IOMUX_PAD(0x2d0, 0x0d8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD4__GPIO_2_19			= IOMUX_PAD(0x2d0, 0x0d8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD5__LD5			= IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD5__GPIO_1_19			= IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD5__LD5			= IOMUX_PAD(0x2d4, 0x0dc, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD5__GPIO_1_19			= IOMUX_PAD(0x2d4, 0x0dc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD6__LD6			= IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD6__GPIO_1_20			= IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD6__LD6			= IOMUX_PAD(0x2d8, 0x0e0, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD6__GPIO_1_20			= IOMUX_PAD(0x2d8, 0x0e0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD7__LD7			= IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD7__GPIO_1_21			= IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD7__LD7			= IOMUX_PAD(0x2dc, 0x0e4, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD7__GPIO_1_21			= IOMUX_PAD(0x2dc, 0x0e4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD8__LD8			= IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD8__FEC_TX_ERR		= IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD8__LD8			= IOMUX_PAD(0x2e0, 0x0e8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD8__FEC_TX_ERR		= IOMUX_PAD(0x2e0, 0x0e8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD9__LD9			= IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD9__FEC_COL			= IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL),
+	MX25_PAD_LD9__LD9			= IOMUX_PAD(0x2e4, 0x0ec, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD9__FEC_COL			= IOMUX_PAD(0x2e4, 0x0ec, 5, 0x504, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD10__LD10			= IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD10__FEC_RX_ER		= IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL),
+	MX25_PAD_LD10__LD10			= IOMUX_PAD(0x2e8, 0x0f0, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD10__FEC_RX_ER		= IOMUX_PAD(0x2e8, 0x0f0, 5, 0x518, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD11__LD11			= IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD11__FEC_RDATA2		= IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL),
+	MX25_PAD_LD11__LD11			= IOMUX_PAD(0x2ec, 0x0f4, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD11__FEC_RDATA2		= IOMUX_PAD(0x2ec, 0x0f4, 5, 0x50c, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD12__LD12			= IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD12__FEC_RDATA3		= IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL),
+	MX25_PAD_LD12__LD12			= IOMUX_PAD(0x2f0, 0x0f8, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD12__FEC_RDATA3		= IOMUX_PAD(0x2f0, 0x0f8, 5, 0x510, 1, NO_PAD_CTRL),
 
-	MX25_PAD_LD13__LD13			= IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD13__FEC_TDATA2		= IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD13__LD13			= IOMUX_PAD(0x2f4, 0x0fc, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD13__FEC_TDATA2		= IOMUX_PAD(0x2f4, 0x0fc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD14__LD14			= IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD14__FEC_TDATA3		= IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LD14__LD14			= IOMUX_PAD(0x2f8, 0x100, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD14__FEC_TDATA3		= IOMUX_PAD(0x2f8, 0x100, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LD15__LD15			= IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_LD15__FEC_RX_CLK		= IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL),
+	MX25_PAD_LD15__LD15			= IOMUX_PAD(0x2fc, 0x104, 0, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_LD15__FEC_RX_CLK		= IOMUX_PAD(0x2fc, 0x104, 5, 0x514, 1, NO_PAD_CTRL),
 
-	MX25_PAD_HSYNC__HSYNC			= IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_HSYNC__GPIO_1_22		= IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_HSYNC__HSYNC			= IOMUX_PAD(0x300, 0x108, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_HSYNC__GPIO_1_22		= IOMUX_PAD(0x300, 0x108, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_VSYNC__VSYNC			= IOMUX_PAD(0x304, 0x10c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSYNC__GPIO_1_23		= IOMUX_PAD(0x304, 0x10c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSYNC__VSYNC			= IOMUX_PAD(0x304, 0x10c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSYNC__GPIO_1_23		= IOMUX_PAD(0x304, 0x10c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_LSCLK__LSCLK			= IOMUX_PAD(0x308, 0x110, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_LSCLK__GPIO_1_24		= IOMUX_PAD(0x308, 0x110, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LSCLK__LSCLK			= IOMUX_PAD(0x308, 0x110, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_LSCLK__GPIO_1_24		= IOMUX_PAD(0x308, 0x110, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_OE_ACD__OE_ACD			= IOMUX_PAD(0x30c, 0x114, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_OE_ACD__GPIO_1_25		= IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE_ACD__OE_ACD			= IOMUX_PAD(0x30c, 0x114, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_OE_ACD__GPIO_1_25		= IOMUX_PAD(0x30c, 0x114, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CONTRAST__CONTRAST		= IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CONTRAST__PWM4_PWMO		= IOMUX_PAD(0x310, 0x118, 0x14, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CONTRAST__FEC_CRS		= IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL),
+	MX25_PAD_CONTRAST__CONTRAST		= IOMUX_PAD(0x310, 0x118, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CONTRAST__PWM4_PWMO		= IOMUX_PAD(0x310, 0x118, 4, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CONTRAST__FEC_CRS		= IOMUX_PAD(0x310, 0x118, 5, 0x508, 1, NO_PAD_CTRL),
 
-	MX25_PAD_PWM__PWM			= IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_PWM__GPIO_1_26			= IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_PWM__USBH2_OC			= IOMUX_PAD(0x314, 0x11c, 0x16, 0x580, 1, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_PWM__PWM			= IOMUX_PAD(0x314, 0x11c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_PWM__GPIO_1_26			= IOMUX_PAD(0x314, 0x11c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_PWM__USBH2_OC			= IOMUX_PAD(0x314, 0x11c, 6, 0x580, 1, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_CSI_D2__CSI_D2			= IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D2__UART5_RXD_MUX		= IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL),
-	MX25_PAD_CSI_D2__GPIO_1_27		= IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D2__CSPI3_MOSI		= IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__CSI_D2			= IOMUX_PAD(0x318, 0x120, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__UART5_RXD_MUX		= IOMUX_PAD(0x318, 0x120, 1, 0x578, 1, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__GPIO_1_27		= IOMUX_PAD(0x318, 0x120, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D2__CSPI3_MOSI		= IOMUX_PAD(0x318, 0x120, 7, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D3__CSI_D3			= IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D3__GPIO_1_28		= IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D3__CSPI3_MISO		= IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL),
+	MX25_PAD_CSI_D3__CSI_D3			= IOMUX_PAD(0x31c, 0x124, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D3__GPIO_1_28		= IOMUX_PAD(0x31c, 0x124, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D3__CSPI3_MISO		= IOMUX_PAD(0x31c, 0x124, 7, 0x4b4, 1, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D4__CSI_D4			= IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D4__UART5_RTS		= IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL),
-	MX25_PAD_CSI_D4__GPIO_1_29		= IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D4__CSPI3_SCLK		= IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__CSI_D4			= IOMUX_PAD(0x320, 0x128, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__UART5_RTS		= IOMUX_PAD(0x320, 0x128, 1, 0x574, 1, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__GPIO_1_29		= IOMUX_PAD(0x320, 0x128, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D4__CSPI3_SCLK		= IOMUX_PAD(0x320, 0x128, 7, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D5__CSI_D5			= IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D5__GPIO_1_30		= IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D5__CSPI3_RDY		= IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D5__CSI_D5			= IOMUX_PAD(0x324, 0x12c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D5__GPIO_1_30		= IOMUX_PAD(0x324, 0x12c, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D5__CSPI3_RDY		= IOMUX_PAD(0x324, 0x12c, 7, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D6__CSI_D6			= IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D6__GPIO_1_31		= IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D6__CSI_D6			= IOMUX_PAD(0x328, 0x130, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D6__GPIO_1_31		= IOMUX_PAD(0x328, 0x130, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D7__CSI_D7			= IOMUX_PAD(0x32c, 0x134, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D7__GPIO_1_6		= IOMUX_PAD(0x32c, 0x134, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D7__CSI_D7			= IOMUX_PAD(0x32c, 0x134, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D7__GPIO_1_6		= IOMUX_PAD(0x32c, 0x134, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D8__CSI_D8			= IOMUX_PAD(0x330, 0x138, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D8__GPIO_1_7		= IOMUX_PAD(0x330, 0x138, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D8__CSI_D8			= IOMUX_PAD(0x330, 0x138, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D8__GPIO_1_7		= IOMUX_PAD(0x330, 0x138, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_D9__CSI_D9			= IOMUX_PAD(0x334, 0x13c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_D9__GPIO_4_21		= IOMUX_PAD(0x334, 0x13c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D9__CSI_D9			= IOMUX_PAD(0x334, 0x13c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_D9__GPIO_4_21		= IOMUX_PAD(0x334, 0x13c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_MCLK__CSI_MCLK		= IOMUX_PAD(0x338, 0x140, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_MCLK__GPIO_1_8		= IOMUX_PAD(0x338, 0x140, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_MCLK__CSI_MCLK		= IOMUX_PAD(0x338, 0x140, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_MCLK__GPIO_1_8		= IOMUX_PAD(0x338, 0x140, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_VSYNC__CSI_VSYNC		= IOMUX_PAD(0x33c, 0x144, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_VSYNC__GPIO_1_9		= IOMUX_PAD(0x33c, 0x144, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_VSYNC__CSI_VSYNC		= IOMUX_PAD(0x33c, 0x144, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_VSYNC__GPIO_1_9		= IOMUX_PAD(0x33c, 0x144, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_HSYNC__CSI_HSYNC		= IOMUX_PAD(0x340, 0x148, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_HSYNC__GPIO_1_10		= IOMUX_PAD(0x340, 0x148, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_HSYNC__CSI_HSYNC		= IOMUX_PAD(0x340, 0x148, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_HSYNC__GPIO_1_10		= IOMUX_PAD(0x340, 0x148, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSI_PIXCLK__CSI_PIXCLK		= IOMUX_PAD(0x344, 0x14c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSI_PIXCLK__GPIO_1_11		= IOMUX_PAD(0x344, 0x14c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_PIXCLK__CSI_PIXCLK		= IOMUX_PAD(0x344, 0x14c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSI_PIXCLK__GPIO_1_11		= IOMUX_PAD(0x344, 0x14c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_I2C1_CLK__I2C1_CLK		= IOMUX_PAD(0x348, 0x150, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_I2C1_CLK__GPIO_1_12		= IOMUX_PAD(0x348, 0x150, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_CLK__I2C1_CLK		= IOMUX_PAD(0x348, 0x150, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_CLK__GPIO_1_12		= IOMUX_PAD(0x348, 0x150, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_I2C1_DAT__I2C1_DAT		= IOMUX_PAD(0x34c, 0x154, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_I2C1_DAT__GPIO_1_13		= IOMUX_PAD(0x34c, 0x154, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_DAT__I2C1_DAT		= IOMUX_PAD(0x34c, 0x154, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_I2C1_DAT__GPIO_1_13		= IOMUX_PAD(0x34c, 0x154, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_MOSI__CSPI1_MOSI		= IOMUX_PAD(0x350, 0x158, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_MOSI__GPIO_1_14		= IOMUX_PAD(0x350, 0x158, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MOSI__CSPI1_MOSI		= IOMUX_PAD(0x350, 0x158, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MOSI__GPIO_1_14		= IOMUX_PAD(0x350, 0x158, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_MISO__CSPI1_MISO		= IOMUX_PAD(0x354, 0x15c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_MISO__GPIO_1_15		= IOMUX_PAD(0x354, 0x15c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MISO__CSPI1_MISO		= IOMUX_PAD(0x354, 0x15c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_MISO__GPIO_1_15		= IOMUX_PAD(0x354, 0x15c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_SS0__CSPI1_SS0		= IOMUX_PAD(0x358, 0x160, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SS0__GPIO_1_16		= IOMUX_PAD(0x358, 0x160, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS0__CSPI1_SS0		= IOMUX_PAD(0x358, 0x160, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS0__GPIO_1_16		= IOMUX_PAD(0x358, 0x160, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_SS1__CSPI1_SS1		= IOMUX_PAD(0x35c, 0x164, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SS1__I2C3_DAT		= IOMUX_PAD(0x35c, 0x164, 0x11, 0x528, 1, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SS1__GPIO_1_17		= IOMUX_PAD(0x35c, 0x164, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS1__CSPI1_SS1		= IOMUX_PAD(0x35c, 0x164, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS1__I2C3_DAT		= IOMUX_PAD(0x35c, 0x164, 1, 0x528, 1, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SS1__GPIO_1_17		= IOMUX_PAD(0x35c, 0x164, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_SCLK__CSPI1_SCLK		= IOMUX_PAD(0x360, 0x168, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CSPI1_SCLK__GPIO_1_18		= IOMUX_PAD(0x360, 0x168, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SCLK__CSPI1_SCLK		= IOMUX_PAD(0x360, 0x168, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_SCLK__GPIO_1_18		= IOMUX_PAD(0x360, 0x168, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CSPI1_RDY__CSPI1_RDY		= IOMUX_PAD(0x364, 0x16c, 0x10, 0, 0, PAD_CTL_PKE),
-	MX25_PAD_CSPI1_RDY__GPIO_2_22		= IOMUX_PAD(0x364, 0x16c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CSPI1_RDY__CSPI1_RDY		= IOMUX_PAD(0x364, 0x16c, 0, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_CSPI1_RDY__GPIO_2_22		= IOMUX_PAD(0x364, 0x16c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_RXD__UART1_RXD		= IOMUX_PAD(0x368, 0x170, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_UART1_RXD__GPIO_4_22		= IOMUX_PAD(0x368, 0x170, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_RXD__UART1_RXD		= IOMUX_PAD(0x368, 0x170, 0, 0, 0, PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_UART1_RXD__GPIO_4_22		= IOMUX_PAD(0x368, 0x170, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_TXD__UART1_TXD		= IOMUX_PAD(0x36c, 0x174, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART1_TXD__GPIO_4_23		= IOMUX_PAD(0x36c, 0x174, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_TXD__UART1_TXD		= IOMUX_PAD(0x36c, 0x174, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_TXD__GPIO_4_23		= IOMUX_PAD(0x36c, 0x174, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_RTS__UART1_RTS		= IOMUX_PAD(0x370, 0x178, 0x10, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_UART1_RTS__CSI_D0		= IOMUX_PAD(0x370, 0x178, 0x11, 0x488, 1, NO_PAD_CTRL),
-	MX25_PAD_UART1_RTS__GPIO_4_24		= IOMUX_PAD(0x370, 0x178, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_RTS__UART1_RTS		= IOMUX_PAD(0x370, 0x178, 0, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_UART1_RTS__CSI_D0		= IOMUX_PAD(0x370, 0x178, 1, 0x488, 1, NO_PAD_CTRL),
+	MX25_PAD_UART1_RTS__GPIO_4_24		= IOMUX_PAD(0x370, 0x178, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART1_CTS__UART1_CTS		= IOMUX_PAD(0x374, 0x17c, 0x10, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_UART1_CTS__CSI_D1		= IOMUX_PAD(0x374, 0x17c, 0x11, 0x48c, 1, NO_PAD_CTRL),
-	MX25_PAD_UART1_CTS__GPIO_4_25		= IOMUX_PAD(0x374, 0x17c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART1_CTS__UART1_CTS		= IOMUX_PAD(0x374, 0x17c, 0, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_UART1_CTS__CSI_D1		= IOMUX_PAD(0x374, 0x17c, 1, 0x48c, 1, NO_PAD_CTRL),
+	MX25_PAD_UART1_CTS__GPIO_4_25		= IOMUX_PAD(0x374, 0x17c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_RXD__UART2_RXD		= IOMUX_PAD(0x378, 0x180, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_RXD__GPIO_4_26		= IOMUX_PAD(0x378, 0x180, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RXD__UART2_RXD		= IOMUX_PAD(0x378, 0x180, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RXD__GPIO_4_26		= IOMUX_PAD(0x378, 0x180, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_TXD__UART2_TXD		= IOMUX_PAD(0x37c, 0x184, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_TXD__GPIO_4_27		= IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_TXD__UART2_TXD		= IOMUX_PAD(0x37c, 0x184, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_TXD__GPIO_4_27		= IOMUX_PAD(0x37c, 0x184, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_RTS__UART2_RTS		= IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_RTS__FEC_COL		= IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL),
-	MX25_PAD_UART2_RTS__GPIO_4_28		= IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RTS__UART2_RTS		= IOMUX_PAD(0x380, 0x188, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_RTS__FEC_COL		= IOMUX_PAD(0x380, 0x188, 2, 0x504, 2, NO_PAD_CTRL),
+	MX25_PAD_UART2_RTS__GPIO_4_28		= IOMUX_PAD(0x380, 0x188, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UART2_CTS__FEC_RX_ER		= IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL),
-	MX25_PAD_UART2_CTS__UART2_CTS		= IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UART2_CTS__GPIO_4_29		= IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_CTS__FEC_RX_ER		= IOMUX_PAD(0x384, 0x18c, 2, 0x518, 2, NO_PAD_CTRL),
+	MX25_PAD_UART2_CTS__UART2_CTS		= IOMUX_PAD(0x384, 0x18c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UART2_CTS__GPIO_4_29		= IOMUX_PAD(0x384, 0x18c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_CMD__SD1_CMD		= IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_CMD__FEC_RDATA2		= IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_CMD__GPIO_2_23		= IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_CMD__SD1_CMD		= IOMUX_PAD(0x388, 0x190, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_CMD__FEC_RDATA2		= IOMUX_PAD(0x388, 0x190, 2, 0x50c, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_CMD__GPIO_2_23		= IOMUX_PAD(0x388, 0x190, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_CLK__SD1_CLK		= IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_CLK__FEC_RDATA3		= IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_CLK__GPIO_2_24		= IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_CLK__SD1_CLK		= IOMUX_PAD(0x38c, 0x194, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_CLK__FEC_RDATA3		= IOMUX_PAD(0x38c, 0x194, 2, 0x510, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_CLK__GPIO_2_24		= IOMUX_PAD(0x38c, 0x194, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA0__SD1_DATA0		= IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA0__GPIO_2_25		= IOMUX_PAD(0x390, 0x198, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA0__SD1_DATA0		= IOMUX_PAD(0x390, 0x198, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA0__GPIO_2_25		= IOMUX_PAD(0x390, 0x198, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA1__SD1_DATA1		= IOMUX_PAD(0x394, 0x19c, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA1__AUD7_RXD		= IOMUX_PAD(0x394, 0x19c, 0x13, 0x478, 0, NO_PAD_CTRL),
-	MX25_PAD_SD1_DATA1__GPIO_2_26		= IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA1__SD1_DATA1		= IOMUX_PAD(0x394, 0x19c, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA1__AUD7_RXD		= IOMUX_PAD(0x394, 0x19c, 3, 0x478, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA1__GPIO_2_26		= IOMUX_PAD(0x394, 0x19c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA2__SD1_DATA2		= IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA2__FEC_RX_CLK		= IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_DATA2__GPIO_2_27		= IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA2__SD1_DATA2		= IOMUX_PAD(0x398, 0x1a0, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA2__FEC_RX_CLK		= IOMUX_PAD(0x398, 0x1a0, 5, 0x514, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA2__GPIO_2_27		= IOMUX_PAD(0x398, 0x1a0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_SD1_DATA3__SD1_DATA3		= IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP),
-	MX25_PAD_SD1_DATA3__FEC_CRS		= IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL),
-	MX25_PAD_SD1_DATA3__GPIO_2_28		= IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA3__SD1_DATA3		= IOMUX_PAD(0x39c, 0x1a4, 0, 0, 0, PAD_CTL_PUS_47K_UP),
+	MX25_PAD_SD1_DATA3__FEC_CRS		= IOMUX_PAD(0x39c, 0x1a4, 0, 0x508, 2, NO_PAD_CTRL),
+	MX25_PAD_SD1_DATA3__GPIO_2_28		= IOMUX_PAD(0x39c, 0x1a4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW0__KPP_ROW0		= IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW0__GPIO_2_29		= IOMUX_PAD(0x3a0, 0x1a8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW0__KPP_ROW0		= IOMUX_PAD(0x3a0, 0x1a8, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW0__GPIO_2_29		= IOMUX_PAD(0x3a0, 0x1a8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW1__KPP_ROW1		= IOMUX_PAD(0x3a4, 0x1ac, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW1__GPIO_2_30		= IOMUX_PAD(0x3a4, 0x1ac, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW1__KPP_ROW1		= IOMUX_PAD(0x3a4, 0x1ac, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW1__GPIO_2_30		= IOMUX_PAD(0x3a4, 0x1ac, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW2__KPP_ROW2		= IOMUX_PAD(0x3a8, 0x1b0, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW2__CSI_D0		= IOMUX_PAD(0x3a8, 0x1b0, 0x13, 0x488, 2, NO_PAD_CTRL),
-	MX25_PAD_KPP_ROW2__GPIO_2_31		= IOMUX_PAD(0x3a8, 0x1b0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW2__KPP_ROW2		= IOMUX_PAD(0x3a8, 0x1b0, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW2__CSI_D0		= IOMUX_PAD(0x3a8, 0x1b0, 3, 0x488, 2, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW2__GPIO_2_31		= IOMUX_PAD(0x3a8, 0x1b0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_ROW3__KPP_ROW3		= IOMUX_PAD(0x3ac, 0x1b4, 0x10, 0, 0, MX25_KPP_ROW_PAD_CTRL),
-	MX25_PAD_KPP_ROW3__CSI_LD1		= IOMUX_PAD(0x3ac, 0x1b4, 0x13, 0x48c, 2, NO_PAD_CTRL),
-	MX25_PAD_KPP_ROW3__GPIO_3_0		= IOMUX_PAD(0x3ac, 0x1b4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW3__KPP_ROW3		= IOMUX_PAD(0x3ac, 0x1b4, 0, 0, 0, MX25_KPP_ROW_PAD_CTRL),
+	MX25_PAD_KPP_ROW3__CSI_LD1		= IOMUX_PAD(0x3ac, 0x1b4, 3, 0x48c, 2, NO_PAD_CTRL),
+	MX25_PAD_KPP_ROW3__GPIO_3_0		= IOMUX_PAD(0x3ac, 0x1b4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL0__KPP_COL0		= IOMUX_PAD(0x3b0, 0x1b8, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL0__UART4_RXD_MUX	= IOMUX_PAD(0x3b0, 0x1b8, 0x11, 0x570, 1, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL0__AUD5_TXD		= IOMUX_PAD(0x3b0, 0x1b8, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL0__GPIO_3_1		= IOMUX_PAD(0x3b0, 0x1b8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL0__KPP_COL0		= IOMUX_PAD(0x3b0, 0x1b8, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL0__UART4_RXD_MUX	= IOMUX_PAD(0x3b0, 0x1b8, 1, 0x570, 1, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL0__AUD5_TXD		= IOMUX_PAD(0x3b0, 0x1b8, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL0__GPIO_3_1		= IOMUX_PAD(0x3b0, 0x1b8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL1__KPP_COL1		= IOMUX_PAD(0x3b4, 0x1bc, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL1__UART4_TXD_MUX	= IOMUX_PAD(0x3b4, 0x1bc, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL1__AUD5_RXD		= IOMUX_PAD(0x3b4, 0x1bc, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL1__GPIO_3_2		= IOMUX_PAD(0x3b4, 0x1bc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL1__KPP_COL1		= IOMUX_PAD(0x3b4, 0x1bc, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL1__UART4_TXD_MUX	= IOMUX_PAD(0x3b4, 0x1bc, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL1__AUD5_RXD		= IOMUX_PAD(0x3b4, 0x1bc, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL1__GPIO_3_2		= IOMUX_PAD(0x3b4, 0x1bc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL2__KPP_COL2		= IOMUX_PAD(0x3b8, 0x1c0, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL2__UART4_RTS		= IOMUX_PAD(0x3b8, 0x1c0, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL2__AUD5_TXC		= IOMUX_PAD(0x3b8, 0x1c0, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL2__GPIO_3_3		= IOMUX_PAD(0x3b8, 0x1c0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL2__KPP_COL2		= IOMUX_PAD(0x3b8, 0x1c0, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL2__UART4_RTS		= IOMUX_PAD(0x3b8, 0x1c0, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL2__AUD5_TXC		= IOMUX_PAD(0x3b8, 0x1c0, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL2__GPIO_3_3		= IOMUX_PAD(0x3b8, 0x1c0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_KPP_COL3__KPP_COL3		= IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, MX25_KPP_COL_PAD_CTRL),
-	MX25_PAD_KPP_COL3__UART4_CTS		= IOMUX_PAD(0x3bc, 0x1c4, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_KPP_COL3__AUD5_TXFS		= IOMUX_PAD(0x3bc, 0x1c4, 0x12, 0, 0, PAD_CTL_PUS_100K_UP),
-	MX25_PAD_KPP_COL3__GPIO_3_4		= IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL3__KPP_COL3		= IOMUX_PAD(0x3bc, 0x1c4, 0, 0, 0, MX25_KPP_COL_PAD_CTRL),
+	MX25_PAD_KPP_COL3__UART4_CTS		= IOMUX_PAD(0x3bc, 0x1c4, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_KPP_COL3__AUD5_TXFS		= IOMUX_PAD(0x3bc, 0x1c4, 2, 0, 0, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_KPP_COL3__GPIO_3_4		= IOMUX_PAD(0x3bc, 0x1c4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_MDC__FEC_MDC		= IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_MDC__AUD4_TXD		= IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL),
-	MX25_PAD_FEC_MDC__GPIO_3_5		= IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDC__FEC_MDC		= IOMUX_PAD(0x3c0, 0x1c8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDC__AUD4_TXD		= IOMUX_PAD(0x3c0, 0x1c8, 2, 0x464, 1, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDC__GPIO_3_5		= IOMUX_PAD(0x3c0, 0x1c8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_MDIO__FEC_MDIO		= IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP),
-	MX25_PAD_FEC_MDIO__AUD4_RXD		= IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL),
-	MX25_PAD_FEC_MDIO__GPIO_3_6		= IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDIO__FEC_MDIO		= IOMUX_PAD(0x3c4, 0x1cc, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP),
+	MX25_PAD_FEC_MDIO__AUD4_RXD		= IOMUX_PAD(0x3c4, 0x1cc, 2, 0x460, 1, NO_PAD_CTRL),
+	MX25_PAD_FEC_MDIO__GPIO_3_6		= IOMUX_PAD(0x3c4, 0x1cc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TDATA0__FEC_TDATA0		= IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_TDATA0__GPIO_3_7		= IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0		= IOMUX_PAD(0x3c8, 0x1d0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA0__GPIO_3_7		= IOMUX_PAD(0x3c8, 0x1d0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TDATA1__FEC_TDATA1		= IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_TDATA1__AUD4_TXFS		= IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL),
-	MX25_PAD_FEC_TDATA1__GPIO_3_8		= IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1		= IOMUX_PAD(0x3cc, 0x1d4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA1__AUD4_TXFS		= IOMUX_PAD(0x3cc, 0x1d4, 2, 0x474, 1, NO_PAD_CTRL),
+	MX25_PAD_FEC_TDATA1__GPIO_3_8		= IOMUX_PAD(0x3cc, 0x1d4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TX_EN__FEC_TX_EN		= IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_FEC_TX_EN__GPIO_3_9		= IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN		= IOMUX_PAD(0x3d0, 0x1d8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TX_EN__GPIO_3_9		= IOMUX_PAD(0x3d0, 0x1d8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_RDATA0__FEC_RDATA0		= IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_RDATA0__GPIO_3_10		= IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0		= IOMUX_PAD(0x3d4, 0x1dc, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_RDATA0__GPIO_3_10		= IOMUX_PAD(0x3d4, 0x1dc, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_RDATA1__FEC_RDATA1		= IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_RDATA1__GPIO_3_11		= IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1		= IOMUX_PAD(0x3d8, 0x1e0, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_RDATA1__GPIO_3_11		= IOMUX_PAD(0x3d8, 0x1e0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_RX_DV__FEC_RX_DV		= IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_RX_DV__CAN2_RX		= IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP),
-	MX25_PAD_FEC_RX_DV__GPIO_3_12		= IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV		= IOMUX_PAD(0x3dc, 0x1e4, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_RX_DV__CAN2_RX		= IOMUX_PAD(0x3dc, 0x1e4, 4, 0x484, 0, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_FEC_RX_DV__GPIO_3_12		= IOMUX_PAD(0x3dc, 0x1e4, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		= IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
-	MX25_PAD_FEC_TX_CLK__GPIO_3_13		= IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		= IOMUX_PAD(0x3e0, 0x1e8, 0, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
+	MX25_PAD_FEC_TX_CLK__GPIO_3_13		= IOMUX_PAD(0x3e0, 0x1e8, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_RTCK__RTCK			= IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_RTCK__OWIRE			= IOMUX_PAD(0x3e4, 0x1ec, 0x11, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_RTCK__GPIO_3_14		= IOMUX_PAD(0x3e4, 0x1ec, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RTCK__RTCK			= IOMUX_PAD(0x3e4, 0x1ec, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RTCK__OWIRE			= IOMUX_PAD(0x3e4, 0x1ec, 1, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_RTCK__GPIO_3_14		= IOMUX_PAD(0x3e4, 0x1ec, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_DE_B__DE_B			= IOMUX_PAD(0x3ec, 0x1f0, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_DE_B__GPIO_2_20		= IOMUX_PAD(0x3ec, 0x1f0, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_DE_B__DE_B			= IOMUX_PAD(0x3ec, 0x1f0, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_DE_B__GPIO_2_20		= IOMUX_PAD(0x3ec, 0x1f0, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_TDO__TDO			= IOMUX_PAD(0x3e8, 0x000, 0x00, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_TDO__TDO			= IOMUX_PAD(0x3e8, 0x000, 0, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_GPIO_A__GPIO_A			= IOMUX_PAD(0x3f0, 0x1f4, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_A__CAN1_TX		= IOMUX_PAD(0x3f0, 0x1f4, 0x16, 0, 0, PAD_CTL_PUS_22K_UP),
-	MX25_PAD_GPIO_A__USBOTG_PWR		= IOMUX_PAD(0x3f0, 0x1f4, 0x12, 0, 0, PAD_CTL_PKE),
+	MX25_PAD_GPIO_A__GPIO_A			= IOMUX_PAD(0x3f0, 0x1f4, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_A__CAN1_TX		= IOMUX_PAD(0x3f0, 0x1f4, 6, 0, 0, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_A__USBOTG_PWR		= IOMUX_PAD(0x3f0, 0x1f4, 2, 0, 0, PAD_CTL_PKE),
 
-	MX25_PAD_GPIO_B__GPIO_B			= IOMUX_PAD(0x3f4, 0x1f8, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_B__CAN1_RX		= IOMUX_PAD(0x3f4, 0x1f8, 0x16, 0x480, 1, PAD_CTL_PUS_22K_UP),
-	MX25_PAD_GPIO_B__USBOTG_OC		= IOMUX_PAD(0x3f4, 0x1f8, 0x12, 0x57c, 1, PAD_CTL_PUS_100K_UP),
+	MX25_PAD_GPIO_B__GPIO_B			= IOMUX_PAD(0x3f4, 0x1f8, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_B__CAN1_RX		= IOMUX_PAD(0x3f4, 0x1f8, 6, 0x480, 1, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_B__USBOTG_OC		= IOMUX_PAD(0x3f4, 0x1f8, 2, 0x57c, 1, PAD_CTL_PUS_100K_UP),
 
-	MX25_PAD_GPIO_C__GPIO_C			= IOMUX_PAD(0x3f8, 0x1fc, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_C__CAN2_TX		= IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_C__GPIO_C			= IOMUX_PAD(0x3f8, 0x1fc, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_C__CAN2_TX		= IOMUX_PAD(0x3f8, 0x1fc, 6, 0, 0, PAD_CTL_PUS_22K_UP),
 
-	MX25_PAD_GPIO_D__GPIO_D			= IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_E__LD16			= IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_GPIO_D__CAN2_RX		= IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP),
+	MX25_PAD_GPIO_D__GPIO_D			= IOMUX_PAD(0x3fc, 0x200, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_E__LD16			= IOMUX_PAD(0x400, 0x204, 2, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_GPIO_D__CAN2_RX		= IOMUX_PAD(0x3fc, 0x200, 6, 0x484, 1, PAD_CTL_PUS_22K_UP),
 
-	MX25_PAD_GPIO_E__GPIO_E			= IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_F__LD17			= IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, PAD_CTL_SRE_FAST),
-	MX25_PAD_GPIO_E__I2C3_CLK		= IOMUX_PAD(0x400, 0x204, 0x11, 0x524, 2, NO_PAD_CTRL),
-	MX25_PAD_GPIO_E__AUD7_TXD		= IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_E__GPIO_E			= IOMUX_PAD(0x400, 0x204, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_F__LD17			= IOMUX_PAD(0x404, 0x208, 2, 0, 0, PAD_CTL_SRE_FAST),
+	MX25_PAD_GPIO_E__I2C3_CLK		= IOMUX_PAD(0x400, 0x204, 1, 0x524, 2, NO_PAD_CTRL),
+	MX25_PAD_GPIO_E__AUD7_TXD		= IOMUX_PAD(0x400, 0x204, 4, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_GPIO_F__GPIO_F			= IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_GPIO_F__AUD7_TXC		= IOMUX_PAD(0x404, 0x208, 0x14, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_F__GPIO_F			= IOMUX_PAD(0x404, 0x208, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_GPIO_F__AUD7_TXC		= IOMUX_PAD(0x404, 0x208, 4, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_EXT_ARMCLK__EXT_ARMCLK		= IOMUX_PAD(0x000, 0x20c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_EXT_ARMCLK__GPIO_3_15		= IOMUX_PAD(0x000, 0x20c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EXT_ARMCLK__EXT_ARMCLK		= IOMUX_PAD(0x000, 0x20c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_EXT_ARMCLK__GPIO_3_15		= IOMUX_PAD(0x000, 0x20c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK	= IOMUX_PAD(0x000, 0x210, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_UPLL_BYPCLK__GPIO_3_16		= IOMUX_PAD(0x000, 0x210, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK	= IOMUX_PAD(0x000, 0x210, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_UPLL_BYPCLK__GPIO_3_16		= IOMUX_PAD(0x000, 0x210, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_VSTBY_REQ__VSTBY_REQ		= IOMUX_PAD(0x408, 0x214, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_REQ__AUD7_TXFS		= IOMUX_PAD(0x408, 0x214, 0x14, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_REQ__GPIO_3_17		= IOMUX_PAD(0x408, 0x214, 0x15, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_ACK__VSTBY_ACK		= IOMUX_PAD(0x40c, 0x218, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_VSTBY_ACK__GPIO_3_18		= IOMUX_PAD(0x40c, 0x218, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_REQ__VSTBY_REQ		= IOMUX_PAD(0x408, 0x214, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_REQ__AUD7_TXFS		= IOMUX_PAD(0x408, 0x214, 4, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_REQ__GPIO_3_17		= IOMUX_PAD(0x408, 0x214, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_ACK__VSTBY_ACK		= IOMUX_PAD(0x40c, 0x218, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_VSTBY_ACK__GPIO_3_18		= IOMUX_PAD(0x40c, 0x218, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_POWER_FAIL__POWER_FAIL		= IOMUX_PAD(0x410, 0x21c, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_POWER_FAIL__AUD7_RXD		= IOMUX_PAD(0x410, 0x21c, 0x14, 0x478, 1, NO_PAD_CTRL),
-	MX25_PAD_POWER_FAIL__GPIO_3_19		= IOMUX_PAD(0x410, 0x21c, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_POWER_FAIL__POWER_FAIL		= IOMUX_PAD(0x410, 0x21c, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_POWER_FAIL__AUD7_RXD		= IOMUX_PAD(0x410, 0x21c, 4, 0x478, 1, NO_PAD_CTRL),
+	MX25_PAD_POWER_FAIL__GPIO_3_19		= IOMUX_PAD(0x410, 0x21c, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_CLKO__CLKO			= IOMUX_PAD(0x414, 0x220, 0x10, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_CLKO__GPIO_2_21		= IOMUX_PAD(0x414, 0x220, 0x15, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CLKO__CLKO			= IOMUX_PAD(0x414, 0x220, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_CLKO__GPIO_2_21		= IOMUX_PAD(0x414, 0x220, 5, 0, 0, NO_PAD_CTRL),
 
-	MX25_PAD_BOOT_MODE0__BOOT_MODE0		= IOMUX_PAD(0x000, 0x224, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BOOT_MODE0__GPIO_4_30		= IOMUX_PAD(0x000, 0x224, 0x05, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BOOT_MODE1__BOOT_MODE1		= IOMUX_PAD(0x000, 0x228, 0x00, 0, 0, NO_PAD_CTRL),
-	MX25_PAD_BOOT_MODE1__GPIO_4_31		= IOMUX_PAD(0x000, 0x228, 0x05, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE0__BOOT_MODE0		= IOMUX_PAD(0x000, 0x224, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE0__GPIO_4_30		= IOMUX_PAD(0x000, 0x224, 5, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE1__BOOT_MODE1		= IOMUX_PAD(0x000, 0x228, 0, 0, 0, NO_PAD_CTRL),
+	MX25_PAD_BOOT_MODE1__GPIO_4_31		= IOMUX_PAD(0x000, 0x228, 5, 0, 0, NO_PAD_CTRL),
 
 	MX25_PAD_CTL_GRP_DVS_MISC		= IOMUX_PAD(0x418, 0x000, 0, 0, 0, NO_PAD_CTRL),
 	MX25_PAD_CTL_GRP_DSE_FEC		= IOMUX_PAD(0x41c, 0x000, 0, 0, 0, NO_PAD_CTRL),
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 14:56 ` [U-Boot] [PATCH] " Michael Trimarchi
@ 2018-01-24 15:14   ` Fabio Estevam
  -1 siblings, 0 replies; 35+ messages in thread
From: Fabio Estevam @ 2018-01-24 15:14 UTC (permalink / raw)
  To: Michael Trimarchi
  Cc: Fabio Estevam, Peter Chen, U-Boot-Denx, USB list,
	Benoît Thébaudeau

Hi Michael,

On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> SION bit should be used in the situation that we need
> to read back the value of a pin and should be set by
> default. This can generate any kind of random malfunction
> as described in this thread.
>
> According to this thread:
> https://www.spinics.net/lists/linux-usb/msg162574.html
>
> We consider this an early bug so all the boards running imx25
> with a minimimal set of functionalities can be affected.
>
> As reported by this application note:
> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>
> The software input on (SION) bit is an option to force an input
> path to be active regardless of the value driven by the
> corresponding module. It is used when the nature direction
> of a pin depending on selected alternative function is an output,
> but it is needed to read the real logic value on a pin.
>
> The SION bit can be used in:
> • Loopback: the module of a selected alternative function drives
> the pad and also receives the pad value as an input
> • GPIO capture: the module of a selected alternative function
> drives the pin and the value is captured by the GPIO
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Refer-to:
>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>         DataTraveler SE9 64GB

Glad you found a fix for the issue!


> ---
>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>  1 file changed, 340 insertions(+), 340 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
> index 5b2863e..2fcaf60 100644
> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
> @@ -30,481 +30,481 @@
>
>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>  enum {
> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),

In many places in this patch you are only changing things like 0x00
--> 0 or 0x05--> 5, which just makes it harder to review.

Please send a new version that only removes the SION bit.
---
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo@vger.kernel.org
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 15:14   ` Fabio Estevam
  0 siblings, 0 replies; 35+ messages in thread
From: Fabio Estevam @ 2018-01-24 15:14 UTC (permalink / raw)
  To: u-boot

Hi Michael,

On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> SION bit should be used in the situation that we need
> to read back the value of a pin and should be set by
> default. This can generate any kind of random malfunction
> as described in this thread.
>
> According to this thread:
> https://www.spinics.net/lists/linux-usb/msg162574.html
>
> We consider this an early bug so all the boards running imx25
> with a minimimal set of functionalities can be affected.
>
> As reported by this application note:
> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>
> The software input on (SION) bit is an option to force an input
> path to be active regardless of the value driven by the
> corresponding module. It is used when the nature direction
> of a pin depending on selected alternative function is an output,
> but it is needed to read the real logic value on a pin.
>
> The SION bit can be used in:
> • Loopback: the module of a selected alternative function drives
> the pad and also receives the pad value as an input
> • GPIO capture: the module of a selected alternative function
> drives the pin and the value is captured by the GPIO
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Refer-to:
>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>         DataTraveler SE9 64GB

Glad you found a fix for the issue!


> ---
>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>  1 file changed, 340 insertions(+), 340 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
> index 5b2863e..2fcaf60 100644
> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
> @@ -30,481 +30,481 @@
>
>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>  enum {
> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),

In many places in this patch you are only changing things like 0x00
--> 0 or 0x05--> 5, which just makes it harder to review.

Please send a new version that only removes the SION bit.

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 15:14   ` [U-Boot] [PATCH] " Fabio Estevam
@ 2018-01-24 15:26     ` Michael Nazzareno Trimarchi
  -1 siblings, 0 replies; 35+ messages in thread
From: Michael Trimarchi @ 2018-01-24 15:26 UTC (permalink / raw)
  To: Fabio Estevam
  Cc: Fabio Estevam, Peter Chen, U-Boot-Denx, USB list,
	Benoît Thébaudeau

Hi Fabio

On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Michael,
>
> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
>> SION bit should be used in the situation that we need
>> to read back the value of a pin and should be set by
>> default. This can generate any kind of random malfunction
>> as described in this thread.
>>
>> According to this thread:
>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>
>> We consider this an early bug so all the boards running imx25
>> with a minimimal set of functionalities can be affected.
>>
>> As reported by this application note:
>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>
>> The software input on (SION) bit is an option to force an input
>> path to be active regardless of the value driven by the
>> corresponding module. It is used when the nature direction
>> of a pin depending on selected alternative function is an output,
>> but it is needed to read the real logic value on a pin.
>>
>> The SION bit can be used in:
>> • Loopback: the module of a selected alternative function drives
>> the pad and also receives the pad value as an input
>> • GPIO capture: the module of a selected alternative function
>> drives the pin and the value is captured by the GPIO
>>
>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> ---
>> Refer-to:
>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>         DataTraveler SE9 64GB
>
> Glad you found a fix for the issue!
>

The idea was to align to the other freescale architecture. I can
create two patches on it

Michael

>
>> ---
>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>> index 5b2863e..2fcaf60 100644
>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>> @@ -30,481 +30,481 @@
>>
>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>  enum {
>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>
> In many places in this patch you are only changing things like 0x00
> --> 0 or 0x05--> 5, which just makes it harder to review.
>
> Please send a new version that only removes the SION bit.

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 15:26     ` Michael Nazzareno Trimarchi
  0 siblings, 0 replies; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 15:26 UTC (permalink / raw)
  To: u-boot

Hi Fabio

On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Michael,
>
> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
>> SION bit should be used in the situation that we need
>> to read back the value of a pin and should be set by
>> default. This can generate any kind of random malfunction
>> as described in this thread.
>>
>> According to this thread:
>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>
>> We consider this an early bug so all the boards running imx25
>> with a minimimal set of functionalities can be affected.
>>
>> As reported by this application note:
>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>
>> The software input on (SION) bit is an option to force an input
>> path to be active regardless of the value driven by the
>> corresponding module. It is used when the nature direction
>> of a pin depending on selected alternative function is an output,
>> but it is needed to read the real logic value on a pin.
>>
>> The SION bit can be used in:
>> • Loopback: the module of a selected alternative function drives
>> the pad and also receives the pad value as an input
>> • GPIO capture: the module of a selected alternative function
>> drives the pin and the value is captured by the GPIO
>>
>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> ---
>> Refer-to:
>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>         DataTraveler SE9 64GB
>
> Glad you found a fix for the issue!
>

The idea was to align to the other freescale architecture. I can
create two patches on it

Michael

>
>> ---
>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>> index 5b2863e..2fcaf60 100644
>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>> @@ -30,481 +30,481 @@
>>
>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>  enum {
>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>
> In many places in this patch you are only changing things like 0x00
> --> 0 or 0x05--> 5, which just makes it harder to review.
>
> Please send a new version that only removes the SION bit.



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 15:26     ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
@ 2018-01-24 15:34 ` Benoît Thébaudeau
  -1 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 15:34 UTC (permalink / raw)
  To: Michael Nazzareno Trimarchi, Fabio Estevam
  Cc: Fabio Estevam, Peter Chen, U-Boot-Denx, USB list

Hi Michael,

On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>> SION bit should be used in the situation that we need
>>> to read back the value of a pin and should be set by
>>> default.

You remove this bit because it should be set by default? This sentence is
confusing.

>>> This can generate any kind of random malfunction
>>> as described in this thread.
>>>
>>> According to this thread:
>>> https://www.spinics.net/lists/linux-usb/msg162574.html

I can't find details about SION on a specific pin in this thread. Please
elaborate.

>>> We consider this an early bug so all the boards running imx25
>>> with a minimimal set of functionalities can be affected.
>>>
>>> As reported by this application note:
>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>
>>> The software input on (SION) bit is an option to force an input
>>> path to be active regardless of the value driven by the
>>> corresponding module. It is used when the nature direction
>>> of a pin depending on selected alternative function is an output,
>>> but it is needed to read the real logic value on a pin.
>>>
>>> The SION bit can be used in:
>>> • Loopback: the module of a selected alternative function drives
>>> the pad and also receives the pad value as an input
>>> • GPIO capture: the module of a selected alternative function
>>> drives the pin and the value is captured by the GPIO
>>>
>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>> ---
>>> Refer-to:
>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>         DataTraveler SE9 64GB
>>
>> Glad you found a fix for the issue!
>>
> 
> The idea was to align to the other freescale architecture. I can
> create two patches on it
> 
> Michael
> 
>>
>>> ---
>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> index 5b2863e..2fcaf60 100644
>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> @@ -30,481 +30,481 @@
>>>
>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>  enum {
>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>
>> In many places in this patch you are only changing things like 0x00
>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>
>> Please send a new version that only removes the SION bit.

Please make sure that these changes are not breaking anything for any board
(NEW_PAD_CTRL() can be used for these boards to restore SION if it really has to
be removed by default). SION is required in some cases, and it's unlikely to be
harmful, its main side effect being an increased power consumption.

Best regards,
Benoît
---
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 15:34 ` Benoît Thébaudeau
  0 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 15:34 UTC (permalink / raw)
  To: u-boot

Hi Michael,

On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>> SION bit should be used in the situation that we need
>>> to read back the value of a pin and should be set by
>>> default.

You remove this bit because it should be set by default? This sentence is
confusing.

>>> This can generate any kind of random malfunction
>>> as described in this thread.
>>>
>>> According to this thread:
>>> https://www.spinics.net/lists/linux-usb/msg162574.html

I can't find details about SION on a specific pin in this thread. Please
elaborate.

>>> We consider this an early bug so all the boards running imx25
>>> with a minimimal set of functionalities can be affected.
>>>
>>> As reported by this application note:
>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>
>>> The software input on (SION) bit is an option to force an input
>>> path to be active regardless of the value driven by the
>>> corresponding module. It is used when the nature direction
>>> of a pin depending on selected alternative function is an output,
>>> but it is needed to read the real logic value on a pin.
>>>
>>> The SION bit can be used in:
>>> • Loopback: the module of a selected alternative function drives
>>> the pad and also receives the pad value as an input
>>> • GPIO capture: the module of a selected alternative function
>>> drives the pin and the value is captured by the GPIO
>>>
>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>> ---
>>> Refer-to:
>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>         DataTraveler SE9 64GB
>>
>> Glad you found a fix for the issue!
>>
> 
> The idea was to align to the other freescale architecture. I can
> create two patches on it
> 
> Michael
> 
>>
>>> ---
>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> index 5b2863e..2fcaf60 100644
>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> @@ -30,481 +30,481 @@
>>>
>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>  enum {
>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>
>> In many places in this patch you are only changing things like 0x00
>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>
>> Please send a new version that only removes the SION bit.

Please make sure that these changes are not breaking anything for any board
(NEW_PAD_CTRL() can be used for these boards to restore SION if it really has to
be removed by default). SION is required in some cases, and it's unlikely to be
harmful, its main side effect being an increased power consumption.

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 15:34 ` [U-Boot] [PATCH] " Benoît Thébaudeau
@ 2018-01-24 15:39 ` Benoît Thébaudeau
  -1 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 15:39 UTC (permalink / raw)
  To: Michael Nazzareno Trimarchi, Fabio Estevam
  Cc: Fabio Estevam, Peter Chen, U-Boot-Denx, USB list

On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>> <michael@amarulasolutions.com> wrote:
>>>> SION bit should be used in the situation that we need
>>>> to read back the value of a pin and should be set by
>>>> default.
> 
> You remove this bit because it should be set by default? This sentence is
> confusing.
> 
>>>> This can generate any kind of random malfunction
>>>> as described in this thread.
>>>>
>>>> According to this thread:
>>>> https://www.spinics.net/lists/linux-usb/msg162574.html
> 
> I can't find details about SION on a specific pin in this thread. Please
> elaborate.
> 
>>>> We consider this an early bug so all the boards running imx25
>>>> with a minimimal set of functionalities can be affected.
>>>>
>>>> As reported by this application note:
>>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>>
>>>> The software input on (SION) bit is an option to force an input
>>>> path to be active regardless of the value driven by the
>>>> corresponding module. It is used when the nature direction
>>>> of a pin depending on selected alternative function is an output,
>>>> but it is needed to read the real logic value on a pin.
>>>>
>>>> The SION bit can be used in:
>>>> • Loopback: the module of a selected alternative function drives
>>>> the pad and also receives the pad value as an input
>>>> • GPIO capture: the module of a selected alternative function
>>>> drives the pin and the value is captured by the GPIO
>>>>
>>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>>> ---
>>>> Refer-to:
>>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>>         DataTraveler SE9 64GB
>>>
>>> Glad you found a fix for the issue!
>>>
>>
>> The idea was to align to the other freescale architecture. I can
>> create two patches on it
>>
>> Michael
>>
>>>
>>>> ---
>>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>> index 5b2863e..2fcaf60 100644
>>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>> @@ -30,481 +30,481 @@
>>>>
>>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>>  enum {
>>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>>
>>> In many places in this patch you are only changing things like 0x00
>>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>>
>>> Please send a new version that only removes the SION bit.
> 
> Please make sure that these changes are not breaking anything for any board
> (NEW_PAD_CTRL() can be used for these boards to restore SION if it really has to
> be removed by default). SION is required in some cases, and it's unlikely to be
> harmful, its main side effect being an increased power consumption.

Actually, NEW_PAD_CTRL() cannot act upon SION, so removing it by default is all
the more risky.

Benoît
---
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 15:39 ` Benoît Thébaudeau
  0 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 15:39 UTC (permalink / raw)
  To: u-boot

On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>> <michael@amarulasolutions.com> wrote:
>>>> SION bit should be used in the situation that we need
>>>> to read back the value of a pin and should be set by
>>>> default.
> 
> You remove this bit because it should be set by default? This sentence is
> confusing.
> 
>>>> This can generate any kind of random malfunction
>>>> as described in this thread.
>>>>
>>>> According to this thread:
>>>> https://www.spinics.net/lists/linux-usb/msg162574.html
> 
> I can't find details about SION on a specific pin in this thread. Please
> elaborate.
> 
>>>> We consider this an early bug so all the boards running imx25
>>>> with a minimimal set of functionalities can be affected.
>>>>
>>>> As reported by this application note:
>>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>>
>>>> The software input on (SION) bit is an option to force an input
>>>> path to be active regardless of the value driven by the
>>>> corresponding module. It is used when the nature direction
>>>> of a pin depending on selected alternative function is an output,
>>>> but it is needed to read the real logic value on a pin.
>>>>
>>>> The SION bit can be used in:
>>>> • Loopback: the module of a selected alternative function drives
>>>> the pad and also receives the pad value as an input
>>>> • GPIO capture: the module of a selected alternative function
>>>> drives the pin and the value is captured by the GPIO
>>>>
>>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>>> ---
>>>> Refer-to:
>>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>>         DataTraveler SE9 64GB
>>>
>>> Glad you found a fix for the issue!
>>>
>>
>> The idea was to align to the other freescale architecture. I can
>> create two patches on it
>>
>> Michael
>>
>>>
>>>> ---
>>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>> index 5b2863e..2fcaf60 100644
>>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>> @@ -30,481 +30,481 @@
>>>>
>>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>>  enum {
>>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>>
>>> In many places in this patch you are only changing things like 0x00
>>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>>
>>> Please send a new version that only removes the SION bit.
> 
> Please make sure that these changes are not breaking anything for any board
> (NEW_PAD_CTRL() can be used for these boards to restore SION if it really has to
> be removed by default). SION is required in some cases, and it's unlikely to be
> harmful, its main side effect being an increased power consumption.

Actually, NEW_PAD_CTRL() cannot act upon SION, so removing it by default is all
the more risky.

Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 15:39 ` [U-Boot] [PATCH] " Benoît Thébaudeau
@ 2018-01-24 15:43 ` Michael Nazzareno Trimarchi
  -1 siblings, 0 replies; 35+ messages in thread
From: Michael Trimarchi @ 2018-01-24 15:43 UTC (permalink / raw)
  To: Benoît Thébaudeau
  Cc: Fabio Estevam, Fabio Estevam, Peter Chen, U-Boot-Denx, USB list

Hi

On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>> <michael@amarulasolutions.com> wrote:
>>>>> SION bit should be used in the situation that we need
>>>>> to read back the value of a pin and should be set by
>>>>> default.
>>
>> You remove this bit because it should be set by default? This sentence is
>> confusing.

English is wrong ;)

SION bit as a specific purpose to read back value that is set in
output. You don't need
and it's not set in any freescale board. If you need to set you need
to add to your peripheral.
The only case you need maybe is the data[0] of sdcard.

Tihs is the reason that in this thread we have NXP people. We have 2
board with mx25 right now
so this will not an high risk break.

Michael

>>
>>>>> This can generate any kind of random malfunction
>>>>> as described in this thread.
>>>>>
>>>>> According to this thread:
>>>>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>
>> I can't find details about SION on a specific pin in this thread. Please
>> elaborate.
>>
>>>>> We consider this an early bug so all the boards running imx25
>>>>> with a minimimal set of functionalities can be affected.
>>>>>
>>>>> As reported by this application note:
>>>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>>>
>>>>> The software input on (SION) bit is an option to force an input
>>>>> path to be active regardless of the value driven by the
>>>>> corresponding module. It is used when the nature direction
>>>>> of a pin depending on selected alternative function is an output,
>>>>> but it is needed to read the real logic value on a pin.
>>>>>
>>>>> The SION bit can be used in:
>>>>> • Loopback: the module of a selected alternative function drives
>>>>> the pad and also receives the pad value as an input
>>>>> • GPIO capture: the module of a selected alternative function
>>>>> drives the pin and the value is captured by the GPIO
>>>>>
>>>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>>>> ---
>>>>> Refer-to:
>>>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>>>         DataTraveler SE9 64GB
>>>>
>>>> Glad you found a fix for the issue!
>>>>
>>>
>>> The idea was to align to the other freescale architecture. I can
>>> create two patches on it
>>>
>>> Michael
>>>
>>>>
>>>>> ---
>>>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>>> index 5b2863e..2fcaf60 100644
>>>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>>> @@ -30,481 +30,481 @@
>>>>>
>>>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>>>  enum {
>>>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>>>
>>>> In many places in this patch you are only changing things like 0x00
>>>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>>>
>>>> Please send a new version that only removes the SION bit.
>>
>> Please make sure that these changes are not breaking anything for any board
>> (NEW_PAD_CTRL() can be used for these boards to restore SION if it really has to
>> be removed by default). SION is required in some cases, and it's unlikely to be
>> harmful, its main side effect being an increased power consumption.
>
> Actually, NEW_PAD_CTRL() cannot act upon SION, so removing it by default is all
> the more risky.
>
> Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 15:43 ` Michael Nazzareno Trimarchi
  0 siblings, 0 replies; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 15:43 UTC (permalink / raw)
  To: u-boot

Hi

On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>> <michael@amarulasolutions.com> wrote:
>>>>> SION bit should be used in the situation that we need
>>>>> to read back the value of a pin and should be set by
>>>>> default.
>>
>> You remove this bit because it should be set by default? This sentence is
>> confusing.

English is wrong ;)

SION bit as a specific purpose to read back value that is set in
output. You don't need
and it's not set in any freescale board. If you need to set you need
to add to your peripheral.
The only case you need maybe is the data[0] of sdcard.

Tihs is the reason that in this thread we have NXP people. We have 2
board with mx25 right now
so this will not an high risk break.

Michael

>>
>>>>> This can generate any kind of random malfunction
>>>>> as described in this thread.
>>>>>
>>>>> According to this thread:
>>>>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>
>> I can't find details about SION on a specific pin in this thread. Please
>> elaborate.
>>
>>>>> We consider this an early bug so all the boards running imx25
>>>>> with a minimimal set of functionalities can be affected.
>>>>>
>>>>> As reported by this application note:
>>>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>>>
>>>>> The software input on (SION) bit is an option to force an input
>>>>> path to be active regardless of the value driven by the
>>>>> corresponding module. It is used when the nature direction
>>>>> of a pin depending on selected alternative function is an output,
>>>>> but it is needed to read the real logic value on a pin.
>>>>>
>>>>> The SION bit can be used in:
>>>>> • Loopback: the module of a selected alternative function drives
>>>>> the pad and also receives the pad value as an input
>>>>> • GPIO capture: the module of a selected alternative function
>>>>> drives the pin and the value is captured by the GPIO
>>>>>
>>>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>>>> ---
>>>>> Refer-to:
>>>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>>>         DataTraveler SE9 64GB
>>>>
>>>> Glad you found a fix for the issue!
>>>>
>>>
>>> The idea was to align to the other freescale architecture. I can
>>> create two patches on it
>>>
>>> Michael
>>>
>>>>
>>>>> ---
>>>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>>> index 5b2863e..2fcaf60 100644
>>>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>>>> @@ -30,481 +30,481 @@
>>>>>
>>>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>>>  enum {
>>>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>>>
>>>> In many places in this patch you are only changing things like 0x00
>>>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>>>
>>>> Please send a new version that only removes the SION bit.
>>
>> Please make sure that these changes are not breaking anything for any board
>> (NEW_PAD_CTRL() can be used for these boards to restore SION if it really has to
>> be removed by default). SION is required in some cases, and it's unlikely to be
>> harmful, its main side effect being an increased power consumption.
>
> Actually, NEW_PAD_CTRL() cannot act upon SION, so removing it by default is all
> the more risky.
>
> Benoît



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 15:43 ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
@ 2018-01-24 16:03 ` Benoît Thébaudeau
  -1 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 16:03 UTC (permalink / raw)
  To: Michael Nazzareno Trimarchi
  Cc: Fabio Estevam, Fabio Estevam, Peter Chen, U-Boot-Denx, USB list

On 24/01/2018 at 16:43, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>>> <michael@amarulasolutions.com> wrote:
>>>>>> SION bit should be used in the situation that we need
>>>>>> to read back the value of a pin and should be set by
>>>>>> default.
>>>
>>> You remove this bit because it should be set by default? This sentence is
>>> confusing.
> 
> English is wrong ;)
> 
> SION bit as a specific purpose to read back value that is set in
> output. You don't need
> and it's not set in any freescale board. If you need to set you need
> to add to your peripheral.

Unless there is a NEW_PAD_CTRL()-like mechanism for SION, all these definitions
should be kept in iomux-mx25.h in order not to redefine the register offsets
everywhere. AFAIK, all the Freescale boards use the definitions from
iomux-mx25.h too.

> The only case you need maybe is the data[0] of sdcard.

And eSDHC CMD, and I²C probably too. Yet, you are also removing SION in these
cases. I have 3 i.M25-based boards working fine with SION. ;) Can you explain
the precise issue that you are trying to fix (which pin)?

Best regards,
Benoît
---
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 16:03 ` Benoît Thébaudeau
  0 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 16:03 UTC (permalink / raw)
  To: u-boot

On 24/01/2018 at 16:43, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>>> <michael@amarulasolutions.com> wrote:
>>>>>> SION bit should be used in the situation that we need
>>>>>> to read back the value of a pin and should be set by
>>>>>> default.
>>>
>>> You remove this bit because it should be set by default? This sentence is
>>> confusing.
> 
> English is wrong ;)
> 
> SION bit as a specific purpose to read back value that is set in
> output. You don't need
> and it's not set in any freescale board. If you need to set you need
> to add to your peripheral.

Unless there is a NEW_PAD_CTRL()-like mechanism for SION, all these definitions
should be kept in iomux-mx25.h in order not to redefine the register offsets
everywhere. AFAIK, all the Freescale boards use the definitions from
iomux-mx25.h too.

> The only case you need maybe is the data[0] of sdcard.

And eSDHC CMD, and I²C probably too. Yet, you are also removing SION in these
cases. I have 3 i.M25-based boards working fine with SION. ;) Can you explain
the precise issue that you are trying to fix (which pin)?

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 16:03 ` [U-Boot] [PATCH] " Benoît Thébaudeau
@ 2018-01-24 16:17 ` Michael Nazzareno Trimarchi
  -1 siblings, 0 replies; 35+ messages in thread
From: Michael Trimarchi @ 2018-01-24 16:17 UTC (permalink / raw)
  To: Benoît Thébaudeau
  Cc: Fabio Estevam, Fabio Estevam, Peter Chen, U-Boot-Denx, USB list

Hi

On Wed, Jan 24, 2018 at 5:03 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> On 24/01/2018 at 16:43, Michael Nazzareno Trimarchi wrote:
>> On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>>> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>>>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>>>> <michael@amarulasolutions.com> wrote:
>>>>>>> SION bit should be used in the situation that we need
>>>>>>> to read back the value of a pin and should be set by
>>>>>>> default.
>>>>
>>>> You remove this bit because it should be set by default? This sentence is
>>>> confusing.
>>
>> English is wrong ;)
>>
>> SION bit as a specific purpose to read back value that is set in
>> output. You don't need
>> and it's not set in any freescale board. If you need to set you need
>> to add to your peripheral.
>
> Unless there is a NEW_PAD_CTRL()-like mechanism for SION, all these definitions
> should be kept in iomux-mx25.h in order not to redefine the register offsets
> everywhere. AFAIK, all the Freescale boards use the definitions from
> iomux-mx25.h too.
>
>> The only case you need maybe is the data[0] of sdcard.
>
> And eSDHC CMD, and I²C probably too. Yet, you are also removing SION in these
> cases. I have 3 i.M25-based boards working fine with SION. ;) Can you explain
> the precise issue that you are trying to fix (which pin)?
>

Let me summarize for you:
- was having a board with linux 2.6.x and uboot from 2009 working fine
on a usb pen driver (look on thread in linux-usb)
- was having the same board with any version of linux from 3.18 to
4.15 and fail with this pen drive
- check back all the changes from linux 2.6.x  to linux 4.15.x and
compare every single register and all the usb code and was just
confirm a better implementation of new kernel.
  but with a result of a usb stuck on the host port
- swap the boot-loader and having a working board
- go in deep in boot-loader and compare everything
- Understand the difference was the SION bit that was enable on all the mux

In general when a board start from reset it has default pin muxing.
Each peripheral need to setup the pin muxing according to the real
usage.
SION by default is not the right way to do it. What is the concept of
working board in your side? Just pass your testcase? Ok even this
board
was passing all test cases apart this usb pen drive. We was having in
the field some customer with usb issue time to time and only this
proof that somenthing was not real ok.

Michael



> Best regards,
> Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 16:17 ` Michael Nazzareno Trimarchi
  0 siblings, 0 replies; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 16:17 UTC (permalink / raw)
  To: u-boot

Hi

On Wed, Jan 24, 2018 at 5:03 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> On 24/01/2018 at 16:43, Michael Nazzareno Trimarchi wrote:
>> On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>>> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>>>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>>>> <michael@amarulasolutions.com> wrote:
>>>>>>> SION bit should be used in the situation that we need
>>>>>>> to read back the value of a pin and should be set by
>>>>>>> default.
>>>>
>>>> You remove this bit because it should be set by default? This sentence is
>>>> confusing.
>>
>> English is wrong ;)
>>
>> SION bit as a specific purpose to read back value that is set in
>> output. You don't need
>> and it's not set in any freescale board. If you need to set you need
>> to add to your peripheral.
>
> Unless there is a NEW_PAD_CTRL()-like mechanism for SION, all these definitions
> should be kept in iomux-mx25.h in order not to redefine the register offsets
> everywhere. AFAIK, all the Freescale boards use the definitions from
> iomux-mx25.h too.
>
>> The only case you need maybe is the data[0] of sdcard.
>
> And eSDHC CMD, and I²C probably too. Yet, you are also removing SION in these
> cases. I have 3 i.M25-based boards working fine with SION. ;) Can you explain
> the precise issue that you are trying to fix (which pin)?
>

Let me summarize for you:
- was having a board with linux 2.6.x and uboot from 2009 working fine
on a usb pen driver (look on thread in linux-usb)
- was having the same board with any version of linux from 3.18 to
4.15 and fail with this pen drive
- check back all the changes from linux 2.6.x  to linux 4.15.x and
compare every single register and all the usb code and was just
confirm a better implementation of new kernel.
  but with a result of a usb stuck on the host port
- swap the boot-loader and having a working board
- go in deep in boot-loader and compare everything
- Understand the difference was the SION bit that was enable on all the mux

In general when a board start from reset it has default pin muxing.
Each peripheral need to setup the pin muxing according to the real
usage.
SION by default is not the right way to do it. What is the concept of
working board in your side? Just pass your testcase? Ok even this
board
was passing all test cases apart this usb pen drive. We was having in
the field some customer with usb issue time to time and only this
proof that somenthing was not real ok.

Michael



> Best regards,
> Benoît



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 15:26     ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
@ 2018-01-24 16:31       ` Michael Nazzareno Trimarchi
  -1 siblings, 0 replies; 35+ messages in thread
From: Michael Trimarchi @ 2018-01-24 16:31 UTC (permalink / raw)
  To: Fabio Estevam
  Cc: Fabio Estevam, Peter Chen, U-Boot-Denx, USB list,
	Benoît Thébaudeau

Hi Fabio

On Wed, Jan 24, 2018 at 4:26 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
> Hi Fabio
>
> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> Hi Michael,
>>

Can you check where SION bit is mandatory for mx25? I have on IMX51
some PINMUX where sion is enabled.
I can clean up a bit the patch to just minimize the change. We have for example:

arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD1_CMD__SD1_CMD
= IOMUX_PAD(0x79c, 0x394, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD1_CLK__SD1_CLK
= IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL |
PAD_CTL_HYS),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x7a8, 0x3a0, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x7ac, 0x3a4, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD2_CMD__SD2_CMD
= IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD2_CLK__SD2_CLK
= IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL |
PAD_CTL_HYS),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA0__SD2_DATA0 = IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA1__SD2_DATA1 = IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA2__SD2_DATA2 = IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA3__SD2_DATA3 = IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),

In this way we can be sure that we have done in proper way

Michael

>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>> SION bit should be used in the situation that we need
>>> to read back the value of a pin and should be set by
>>> default. This can generate any kind of random malfunction
>>> as described in this thread.
>>>
>>> According to this thread:
>>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>>
>>> We consider this an early bug so all the boards running imx25
>>> with a minimimal set of functionalities can be affected.
>>>
>>> As reported by this application note:
>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>
>>> The software input on (SION) bit is an option to force an input
>>> path to be active regardless of the value driven by the
>>> corresponding module. It is used when the nature direction
>>> of a pin depending on selected alternative function is an output,
>>> but it is needed to read the real logic value on a pin.
>>>
>>> The SION bit can be used in:
>>> • Loopback: the module of a selected alternative function drives
>>> the pad and also receives the pad value as an input
>>> • GPIO capture: the module of a selected alternative function
>>> drives the pin and the value is captured by the GPIO
>>>
>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>> ---
>>> Refer-to:
>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>         DataTraveler SE9 64GB
>>
>> Glad you found a fix for the issue!
>>
>
> The idea was to align to the other freescale architecture. I can
> create two patches on it
>
> Michael
>
>>
>>> ---
>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> index 5b2863e..2fcaf60 100644
>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> @@ -30,481 +30,481 @@
>>>
>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>  enum {
>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>
>> In many places in this patch you are only changing things like 0x00
>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>
>> Please send a new version that only removes the SION bit.
>
>
>
> --
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 16:31       ` Michael Nazzareno Trimarchi
  0 siblings, 0 replies; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 16:31 UTC (permalink / raw)
  To: u-boot

Hi Fabio

On Wed, Jan 24, 2018 at 4:26 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
> Hi Fabio
>
> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> Hi Michael,
>>

Can you check where SION bit is mandatory for mx25? I have on IMX51
some PINMUX where sion is enabled.
I can clean up a bit the patch to just minimize the change. We have for example:

arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD1_CMD__SD1_CMD
= IOMUX_PAD(0x79c, 0x394, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD1_CLK__SD1_CLK
= IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL |
PAD_CTL_HYS),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x7a8, 0x3a0, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x7ac, 0x3a4, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD2_CMD__SD2_CMD
= IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD2_CLK__SD2_CLK
= IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL |
PAD_CTL_HYS),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA0__SD2_DATA0 = IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA1__SD2_DATA1 = IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA2__SD2_DATA2 = IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA3__SD2_DATA3 = IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),

In this way we can be sure that we have done in proper way

Michael

>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>> SION bit should be used in the situation that we need
>>> to read back the value of a pin and should be set by
>>> default. This can generate any kind of random malfunction
>>> as described in this thread.
>>>
>>> According to this thread:
>>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>>
>>> We consider this an early bug so all the boards running imx25
>>> with a minimimal set of functionalities can be affected.
>>>
>>> As reported by this application note:
>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>
>>> The software input on (SION) bit is an option to force an input
>>> path to be active regardless of the value driven by the
>>> corresponding module. It is used when the nature direction
>>> of a pin depending on selected alternative function is an output,
>>> but it is needed to read the real logic value on a pin.
>>>
>>> The SION bit can be used in:
>>> • Loopback: the module of a selected alternative function drives
>>> the pad and also receives the pad value as an input
>>> • GPIO capture: the module of a selected alternative function
>>> drives the pin and the value is captured by the GPIO
>>>
>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>> ---
>>> Refer-to:
>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>         DataTraveler SE9 64GB
>>
>> Glad you found a fix for the issue!
>>
>
> The idea was to align to the other freescale architecture. I can
> create two patches on it
>
> Michael
>
>>
>>> ---
>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> index 5b2863e..2fcaf60 100644
>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> @@ -30,481 +30,481 @@
>>>
>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>  enum {
>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>
>> In many places in this patch you are only changing things like 0x00
>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>
>> Please send a new version that only removes the SION bit.
>
>
>
> --
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 16:17 ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
@ 2018-01-24 16:37 ` Benoît Thébaudeau
  -1 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 16:37 UTC (permalink / raw)
  To: Michael Nazzareno Trimarchi
  Cc: Fabio Estevam, Fabio Estevam, Peter Chen, U-Boot-Denx, USB list

Hi,

On 24/01/2018 at 17:17, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 5:03 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>> On 24/01/2018 at 16:43, Michael Nazzareno Trimarchi wrote:
>>> On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>>>> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>>>>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>>>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>>>>> <michael@amarulasolutions.com> wrote:
>>>>>>>> SION bit should be used in the situation that we need
>>>>>>>> to read back the value of a pin and should be set by
>>>>>>>> default.
>>>>>
>>>>> You remove this bit because it should be set by default? This sentence is
>>>>> confusing.
>>>
>>> English is wrong ;)
>>>
>>> SION bit as a specific purpose to read back value that is set in
>>> output. You don't need
>>> and it's not set in any freescale board. If you need to set you need
>>> to add to your peripheral.
>>
>> Unless there is a NEW_PAD_CTRL()-like mechanism for SION, all these definitions
>> should be kept in iomux-mx25.h in order not to redefine the register offsets
>> everywhere. AFAIK, all the Freescale boards use the definitions from
>> iomux-mx25.h too.
>>
>>> The only case you need maybe is the data[0] of sdcard.
>>
>> And eSDHC CMD, and I²C probably too. Yet, you are also removing SION in these
>> cases. I have 3 i.M25-based boards working fine with SION. ;) Can you explain
>> the precise issue that you are trying to fix (which pin)?
>>
> 
> Let me summarize for you:
> - was having a board with linux 2.6.x and uboot from 2009 working fine
> on a usb pen driver (look on thread in linux-usb)
> - was having the same board with any version of linux from 3.18 to
> 4.15 and fail with this pen drive
> - check back all the changes from linux 2.6.x  to linux 4.15.x and
> compare every single register and all the usb code and was just
> confirm a better implementation of new kernel.
>   but with a result of a usb stuck on the host port
> - swap the boot-loader and having a working board
> - go in deep in boot-loader and compare everything
> - Understand the difference was the SION bit that was enable on all the mux
> 
> In general when a board start from reset it has default pin muxing.
> Each peripheral need to setup the pin muxing according to the real
> usage.
> SION by default is not the right way to do it. What is the concept of
> working board in your side? Just pass your testcase? Ok even this
> board
> was passing all test cases apart this usb pen drive. We was having in
> the field some customer with usb issue time to time and only this
> proof that somenthing was not real ok.

Thanks for these details. All the test cases should of course work. I'm just
trying to figure out the root cause of your issue, and maybe it's not SION
itself but a power issue triggered by SION, or maybe it's SION only for some
specific pads and not for all the pads, or something else. So what I'm saying is
that this change might be too large, and care should be taken.

Some Freescale boards actually do use SION. E.g., see
MX25_PAD_FEC_MDIO__FEC_MDIO in
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx25-pdk.dts?h=v4.15-rc9 . SION is required to read back the actual state of a GPIO
in output mode. It is also required for some bidirectional alternate functions
(such as I²C SDA/SCL, SD CMD/DATn, etc.) on some i.MXs (not all i.MXs behave in
the same way for the same peripheral), but which ones are affected is not always
documented, so please double check and test all these cases.

Best regards,
Benoît
---
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^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
@ 2018-01-24 16:37 ` Benoît Thébaudeau
  0 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 16:37 UTC (permalink / raw)
  To: u-boot

Hi,

On 24/01/2018 at 17:17, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 5:03 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>> On 24/01/2018 at 16:43, Michael Nazzareno Trimarchi wrote:
>>> On Wed, Jan 24, 2018 at 4:39 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>>>> On 24/01/2018 at 16:34, Benoît Thébaudeau wrote:
>>>>> On 24/01/2018 at 16:26, Michael Nazzareno Trimarchi wrote:
>>>>>> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>>>>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>>>>>>> <michael@amarulasolutions.com> wrote:
>>>>>>>> SION bit should be used in the situation that we need
>>>>>>>> to read back the value of a pin and should be set by
>>>>>>>> default.
>>>>>
>>>>> You remove this bit because it should be set by default? This sentence is
>>>>> confusing.
>>>
>>> English is wrong ;)
>>>
>>> SION bit as a specific purpose to read back value that is set in
>>> output. You don't need
>>> and it's not set in any freescale board. If you need to set you need
>>> to add to your peripheral.
>>
>> Unless there is a NEW_PAD_CTRL()-like mechanism for SION, all these definitions
>> should be kept in iomux-mx25.h in order not to redefine the register offsets
>> everywhere. AFAIK, all the Freescale boards use the definitions from
>> iomux-mx25.h too.
>>
>>> The only case you need maybe is the data[0] of sdcard.
>>
>> And eSDHC CMD, and I²C probably too. Yet, you are also removing SION in these
>> cases. I have 3 i.M25-based boards working fine with SION. ;) Can you explain
>> the precise issue that you are trying to fix (which pin)?
>>
> 
> Let me summarize for you:
> - was having a board with linux 2.6.x and uboot from 2009 working fine
> on a usb pen driver (look on thread in linux-usb)
> - was having the same board with any version of linux from 3.18 to
> 4.15 and fail with this pen drive
> - check back all the changes from linux 2.6.x  to linux 4.15.x and
> compare every single register and all the usb code and was just
> confirm a better implementation of new kernel.
>   but with a result of a usb stuck on the host port
> - swap the boot-loader and having a working board
> - go in deep in boot-loader and compare everything
> - Understand the difference was the SION bit that was enable on all the mux
> 
> In general when a board start from reset it has default pin muxing.
> Each peripheral need to setup the pin muxing according to the real
> usage.
> SION by default is not the right way to do it. What is the concept of
> working board in your side? Just pass your testcase? Ok even this
> board
> was passing all test cases apart this usb pen drive. We was having in
> the field some customer with usb issue time to time and only this
> proof that somenthing was not real ok.

Thanks for these details. All the test cases should of course work. I'm just
trying to figure out the root cause of your issue, and maybe it's not SION
itself but a power issue triggered by SION, or maybe it's SION only for some
specific pads and not for all the pads, or something else. So what I'm saying is
that this change might be too large, and care should be taken.

Some Freescale boards actually do use SION. E.g., see
MX25_PAD_FEC_MDIO__FEC_MDIO in
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx25-pdk.dts?h=v4.15-rc9 . SION is required to read back the actual state of a GPIO
in output mode. It is also required for some bidirectional alternate functions
(such as I²C SDA/SCL, SD CMD/DATn, etc.) on some i.MXs (not all i.MXs behave in
the same way for the same peripheral), but which ones are affected is not always
documented, so please double check and test all these cases.

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 16:31       ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
  (?)
@ 2018-01-24 16:38       ` Fabio Estevam
  2018-01-24 16:46         ` Michael Nazzareno Trimarchi
  -1 siblings, 1 reply; 35+ messages in thread
From: Fabio Estevam @ 2018-01-24 16:38 UTC (permalink / raw)
  To: u-boot

Hi Michael,

[Removed usb list as this is off-topic for them]

On Wed, Jan 24, 2018 at 2:31 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:

> Can you check where SION bit is mandatory for mx25? I have on IMX51
> some PINMUX where sion is enabled.
> I can clean up a bit the patch to just minimize the change. We have for example:

I think it depends on the pin function per board design, no?

Benoît brings a good point: what is the exact pin that causes the USB
failure on your case?

Let's try to understand the exact pin that is causing the problem on your board.

Thanks

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 16:38       ` Fabio Estevam
@ 2018-01-24 16:46         ` Michael Nazzareno Trimarchi
  2018-01-24 17:05           ` Benoît Thébaudeau
  0 siblings, 1 reply; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 16:46 UTC (permalink / raw)
  To: u-boot

Hi Fabio

On Wed, Jan 24, 2018 at 5:38 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Michael,
>
> [Removed usb list as this is off-topic for them]
>
> On Wed, Jan 24, 2018 at 2:31 PM, Michael Nazzareno Trimarchi
> <michael@amarulasolutions.com> wrote:
>
>> Can you check where SION bit is mandatory for mx25? I have on IMX51
>> some PINMUX where sion is enabled.
>> I can clean up a bit the patch to just minimize the change. We have for example:
>
> I think it depends on the pin function per board design, no?
>

I don't have a pdk and it's difficult to find them so I need to check. Anyway
some revision of the firmware on this pendrive are working but the latest one
is not working. I have a lot of pen drives and all of them are fully working.

> Benoît brings a good point: what is the exact pin that causes the USB
> failure on your case?

I have tested only with uart and already it does not let it work
properly. So I can try
to limit in my boot case but I don't think that having SION bit
pre-defined it's valid
at all. We have a limited number of pin mux with SION enable on any nxp
architecture right now for every architecture.

* Benoit * can you test them? I will provide a better changeset let
sdcard and some ethernet pin
in the right configuation (even ethernet was working without SION enable)

>
> Let's try to understand the exact pin that is causing the problem on your board.
>

I will check it out. This was an initial patch proposal

> Thanks



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 16:46         ` Michael Nazzareno Trimarchi
@ 2018-01-24 17:05           ` Benoît Thébaudeau
  2018-01-24 17:12             ` Michael Nazzareno Trimarchi
  0 siblings, 1 reply; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 17:05 UTC (permalink / raw)
  To: u-boot

Hi Michael,

On 24/01/2018 at 17:46, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 5:38 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> Hi Michael,
>>
>> [Removed usb list as this is off-topic for them]
>>
>> On Wed, Jan 24, 2018 at 2:31 PM, Michael Nazzareno Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>
>>> Can you check where SION bit is mandatory for mx25? I have on IMX51
>>> some PINMUX where sion is enabled.
>>> I can clean up a bit the patch to just minimize the change. We have for example:
>>
>> I think it depends on the pin function per board design, no?
>>
> 
> I don't have a pdk and it's difficult to find them so I need to check. Anyway
> some revision of the firmware on this pendrive are working but the latest one
> is not working. I have a lot of pen drives and all of them are fully working.
> 
>> Benoît brings a good point: what is the exact pin that causes the USB
>> failure on your case?
> 
> I have tested only with uart and already it does not let it work
> properly. So I can try
> to limit in my boot case but I don't think that having SION bit
> pre-defined it's valid
> at all. We have a limited number of pin mux with SION enable on any nxp
> architecture right now for every architecture.
> 
> * Benoit * can you test them? I will provide a better changeset let
> sdcard and some ethernet pin
> in the right configuation (even ethernet was working without SION enable)

Not sure I can find time for that. Perhaps in a few days.

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:05           ` Benoît Thébaudeau
@ 2018-01-24 17:12             ` Michael Nazzareno Trimarchi
  2018-01-24 17:19               ` Benoît Thébaudeau
  2018-01-24 17:21               ` Fabio Estevam
  0 siblings, 2 replies; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 17:12 UTC (permalink / raw)
  To: u-boot

Hi

On Wed, Jan 24, 2018 at 6:05 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> Hi Michael,
>
> On 24/01/2018 at 17:46, Michael Nazzareno Trimarchi wrote:
>> On Wed, Jan 24, 2018 at 5:38 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>> Hi Michael,
>>>
>>> [Removed usb list as this is off-topic for them]
>>>
>>> On Wed, Jan 24, 2018 at 2:31 PM, Michael Nazzareno Trimarchi
>>> <michael@amarulasolutions.com> wrote:
>>>
>>>> Can you check where SION bit is mandatory for mx25? I have on IMX51
>>>> some PINMUX where sion is enabled.
>>>> I can clean up a bit the patch to just minimize the change. We have for example:
>>>
>>> I think it depends on the pin function per board design, no?
>>>
>>
>> I don't have a pdk and it's difficult to find them so I need to check. Anyway
>> some revision of the firmware on this pendrive are working but the latest one
>> is not working. I have a lot of pen drives and all of them are fully working.
>>
>>> Benoît brings a good point: what is the exact pin that causes the USB
>>> failure on your case?
>>
>> I have tested only with uart and already it does not let it work
>> properly. So I can try
>> to limit in my boot case but I don't think that having SION bit
>> pre-defined it's valid
>> at all. We have a limited number of pin mux with SION enable on any nxp
>> architecture right now for every architecture.
>>
>> * Benoit * can you test them? I will provide a better changeset let
>> sdcard and some ethernet pin
>> in the right configuation (even ethernet was working without SION enable)
>
> Not sure I can find time for that. Perhaps in a few days.
>

From the datasheet I have:

Software Input On Field. Force the selected mux mode Input path no
matter of MUX_MODE functionality.
1: Force input path of pad A14.
0: Input Path is determined by functionality of the selected mux mode
(regular).

So i think that in case of some peripheral this is not relevant but I
need confirmation

Michael

> Best regards,
> Benoît



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:12             ` Michael Nazzareno Trimarchi
@ 2018-01-24 17:19               ` Benoît Thébaudeau
  2018-01-24 17:21               ` Fabio Estevam
  1 sibling, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 17:19 UTC (permalink / raw)
  To: u-boot

On 24/01/2018 at 18:12, Michael Nazzareno Trimarchi wrote:
> On Wed, Jan 24, 2018 at 6:05 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>> Hi Michael,
>>
>> On 24/01/2018 at 17:46, Michael Nazzareno Trimarchi wrote:
>>> On Wed, Jan 24, 2018 at 5:38 PM, Fabio Estevam <festevam@gmail.com> wrote:
>>>> Hi Michael,
>>>>
>>>> [Removed usb list as this is off-topic for them]
>>>>
>>>> On Wed, Jan 24, 2018 at 2:31 PM, Michael Nazzareno Trimarchi
>>>> <michael@amarulasolutions.com> wrote:
>>>>
>>>>> Can you check where SION bit is mandatory for mx25? I have on IMX51
>>>>> some PINMUX where sion is enabled.
>>>>> I can clean up a bit the patch to just minimize the change. We have for example:
>>>>
>>>> I think it depends on the pin function per board design, no?
>>>>
>>>
>>> I don't have a pdk and it's difficult to find them so I need to check. Anyway
>>> some revision of the firmware on this pendrive are working but the latest one
>>> is not working. I have a lot of pen drives and all of them are fully working.
>>>
>>>> Benoît brings a good point: what is the exact pin that causes the USB
>>>> failure on your case?
>>>
>>> I have tested only with uart and already it does not let it work
>>> properly. So I can try
>>> to limit in my boot case but I don't think that having SION bit
>>> pre-defined it's valid
>>> at all. We have a limited number of pin mux with SION enable on any nxp
>>> architecture right now for every architecture.
>>>
>>> * Benoit * can you test them? I will provide a better changeset let
>>> sdcard and some ethernet pin
>>> in the right configuation (even ethernet was working without SION enable)
>>
>> Not sure I can find time for that. Perhaps in a few days.
>>
> 
>>From the datasheet I have:
> 
> Software Input On Field. Force the selected mux mode Input path no
> matter of MUX_MODE functionality.
> 1: Force input path of pad A14.
> 0: Input Path is determined by functionality of the selected mux mode
> (regular).
> 
> So i think that in case of some peripheral this is not relevant but I
> need confirmation

I think I remember people on the U-Boot mailing list having had issues after
having dropped SION for some bidirectional alternate functions on some i.MXs
(maybe I²C SDA/SCL on i.MX51, which is very close to i.MX25). It is not possible
to assume that all peripherals drive the input circuitry properly without SION
for bidirectional signals.

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:12             ` Michael Nazzareno Trimarchi
  2018-01-24 17:19               ` Benoît Thébaudeau
@ 2018-01-24 17:21               ` Fabio Estevam
  2018-01-24 17:29                 ` Benoît Thébaudeau
  1 sibling, 1 reply; 35+ messages in thread
From: Fabio Estevam @ 2018-01-24 17:21 UTC (permalink / raw)
  To: u-boot

Hi Michael,

On Wed, Jan 24, 2018 at 3:12 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:

> From the datasheet I have:
>
> Software Input On Field. Force the selected mux mode Input path no
> matter of MUX_MODE functionality.
> 1: Force input path of pad A14.
> 0: Input Path is determined by functionality of the selected mux mode
> (regular).
>
> So i think that in case of some peripheral this is not relevant but I
> need confirmation

Looking at arch/arm/boot/dts/imx25-pinfunc.h I see that there is only
one pin that sets the SION bit in the common pin definition:

/*
 * Removing the SION bit from MX25_PAD_SD1_CMD__SD1_CMD breaks detecting an SD
 * card. According to the i.MX25 reference manual (e.g. Figure 23-2 in IMX25RM
 * Rev. 2 from 01/2011) this pin is bidirectional. So it seems to be a silicon
 * bug that configuring the SD1_CMD function doesn't enable the input path for
 * this pin.
 * This might have side effects for other hardware units that are connected to
 * that pin and use the respective function as input.
 */
#define MX25_PAD_SD1_CMD__SD1_CMD        0x190 0x388 0x000 0x10 0x000

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:21               ` Fabio Estevam
@ 2018-01-24 17:29                 ` Benoît Thébaudeau
  2018-01-24 17:33                   ` Michael Nazzareno Trimarchi
  2018-01-24 17:36                   ` Fabio Estevam
  0 siblings, 2 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-24 17:29 UTC (permalink / raw)
  To: u-boot

Hi Fabio,

On 24/01/2018 at 18:21, Fabio Estevam wrote:
> On Wed, Jan 24, 2018 at 3:12 PM, Michael Nazzareno Trimarchi
> <michael@amarulasolutions.com> wrote:
> 
>> From the datasheet I have:
>>
>> Software Input On Field. Force the selected mux mode Input path no
>> matter of MUX_MODE functionality.
>> 1: Force input path of pad A14.
>> 0: Input Path is determined by functionality of the selected mux mode
>> (regular).
>>
>> So i think that in case of some peripheral this is not relevant but I
>> need confirmation
> 
> Looking at arch/arm/boot/dts/imx25-pinfunc.h I see that there is only
> one pin that sets the SION bit in the common pin definition:
> 
> /*
>  * Removing the SION bit from MX25_PAD_SD1_CMD__SD1_CMD breaks detecting an SD
>  * card. According to the i.MX25 reference manual (e.g. Figure 23-2 in IMX25RM
>  * Rev. 2 from 01/2011) this pin is bidirectional. So it seems to be a silicon
>  * bug that configuring the SD1_CMD function doesn't enable the input path for
>  * this pin.
>  * This might have side effects for other hardware units that are connected to
>  * that pin and use the respective function as input.
>  */
> #define MX25_PAD_SD1_CMD__SD1_CMD        0x190 0x388 0x000 0x10 0x000

In mainline Linux, SION is also set by some DTS files (MX25_PAD_* 0x40000000
flag) for FEC MDIO and SD CMD/CLK/DATAn.

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:29                 ` Benoît Thébaudeau
@ 2018-01-24 17:33                   ` Michael Nazzareno Trimarchi
  2018-01-24 17:36                   ` Fabio Estevam
  1 sibling, 0 replies; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 17:33 UTC (permalink / raw)
  To: u-boot

Hi

On Wed, Jan 24, 2018 at 6:29 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> Hi Fabio,
>
> On 24/01/2018 at 18:21, Fabio Estevam wrote:
>> On Wed, Jan 24, 2018 at 3:12 PM, Michael Nazzareno Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>
>>> From the datasheet I have:
>>>
>>> Software Input On Field. Force the selected mux mode Input path no
>>> matter of MUX_MODE functionality.
>>> 1: Force input path of pad A14.
>>> 0: Input Path is determined by functionality of the selected mux mode
>>> (regular).
>>>
>>> So i think that in case of some peripheral this is not relevant but I
>>> need confirmation
>>
>> Looking at arch/arm/boot/dts/imx25-pinfunc.h I see that there is only
>> one pin that sets the SION bit in the common pin definition:
>>
>> /*
>>  * Removing the SION bit from MX25_PAD_SD1_CMD__SD1_CMD breaks detecting an SD
>>  * card. According to the i.MX25 reference manual (e.g. Figure 23-2 in IMX25RM
>>  * Rev. 2 from 01/2011) this pin is bidirectional. So it seems to be a silicon
>>  * bug that configuring the SD1_CMD function doesn't enable the input path for
>>  * this pin.
>>  * This might have side effects for other hardware units that are connected to
>>  * that pin and use the respective function as input.
>>  */
>> #define MX25_PAD_SD1_CMD__SD1_CMD        0x190 0x388 0x000 0x10 0x000
>
> In mainline Linux, SION is also set by some DTS files (MX25_PAD_* 0x40000000
> flag) for FEC MDIO and SD CMD/CLK/DATAn.

Think that is not needed . I will check

Michael

>
> Best regards,
> Benoît



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:29                 ` Benoît Thébaudeau
  2018-01-24 17:33                   ` Michael Nazzareno Trimarchi
@ 2018-01-24 17:36                   ` Fabio Estevam
  2018-01-24 17:46                     ` Michael Nazzareno Trimarchi
  1 sibling, 1 reply; 35+ messages in thread
From: Fabio Estevam @ 2018-01-24 17:36 UTC (permalink / raw)
  To: u-boot

Hi Benoît,

On Wed, Jan 24, 2018 at 3:29 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:

> In mainline Linux, SION is also set by some DTS files (MX25_PAD_* 0x40000000
> flag) for FEC MDIO and SD CMD/CLK/DATAn.

Which I think it is fine as it is set on a per board basis.

Maybe we could do the same in U-Boot.

Thanks

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:36                   ` Fabio Estevam
@ 2018-01-24 17:46                     ` Michael Nazzareno Trimarchi
  2018-01-24 23:07                       ` Fabio Estevam
  0 siblings, 1 reply; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-24 17:46 UTC (permalink / raw)
  To: u-boot

Hi

On Wed, Jan 24, 2018 at 6:36 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Benoît,
>
> On Wed, Jan 24, 2018 at 3:29 PM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>
>> In mainline Linux, SION is also set by some DTS files (MX25_PAD_* 0x40000000
>> flag) for FEC MDIO and SD CMD/CLK/DATAn.
>
> Which I think it is fine as it is set on a per board basis.
>
> Maybe we could do the same in U-Boot.
>

This is exactly my initial propose. Can we give a try and manage on board level?

Michael

> Thanks



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 17:46                     ` Michael Nazzareno Trimarchi
@ 2018-01-24 23:07                       ` Fabio Estevam
  2018-01-25  5:47                         ` Michael Nazzareno Trimarchi
  0 siblings, 1 reply; 35+ messages in thread
From: Fabio Estevam @ 2018-01-24 23:07 UTC (permalink / raw)
  To: u-boot

Hi Michael,

On Wed, Jan 24, 2018 at 3:46 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:

> This is exactly my initial propose. Can we give a try and manage on board level?

The kernel should not rely on the IOMUX setting done by the bootloader.

Do you use 0x80000000 in your dts IOMUX configuration by any chance?

0x80000000 means that the kernel will not do IOMUX configuration and
will use the IOMUX value that comes from the bootloader.

It seems you can fix your USB problem by not using the IOMUX value
from the bootloader and just use the good IOMUX (without SION)
explicitly in your dts.

Does it fix the problem?

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-24 23:07                       ` Fabio Estevam
@ 2018-01-25  5:47                         ` Michael Nazzareno Trimarchi
  2018-01-25 10:02                           ` Benoît Thébaudeau
  0 siblings, 1 reply; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-25  5:47 UTC (permalink / raw)
  To: u-boot

Hi

On 25 Jan. 2018 12:07 am, "Fabio Estevam" <festevam@gmail.com> wrote:

Hi Michael,

On Wed, Jan 24, 2018 at 3:46 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:

> This is exactly my initial propose. Can we give a try and manage on board
level?

The kernel should not rely on the IOMUX setting done by the bootloader.

Do you use 0x80000000 in your dts IOMUX configuration by any chance?

0x80000000 means that the kernel will not do IOMUX configuration and
will use the IOMUX value that comes from the bootloader.


Yes but those should not be even wrong. We can not be sure if the state
machine of any logic as already corrupted. Remember that we have already
this problem with the clock in general that most of the time are already
enabled and so logic can be up.


It seems you can fix your USB problem by not using the IOMUX value
from the bootloader and just use the good IOMUX (without SION)
explicitly in your dts.

Does it fix the problem?


I think that the way to fix in a specific case could be more then one. I
will do the best on my side but I will include to not touch iomux without
any reason. I already point out that just with few pins configured like
console I get the problem . I can check two extra gpio too.

To be clear, my board was "working". We are talking about a product in the
field since years with one minimal USB mulfuction . Other boards can have
the same problem but just not rise in the field. If the host port is direct
connected to the pen drive without an hub the USB reset can most of the
time recover the connection.

Michael

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-25  5:47                         ` Michael Nazzareno Trimarchi
@ 2018-01-25 10:02                           ` Benoît Thébaudeau
  2018-01-25 10:17                             ` Michael Nazzareno Trimarchi
  0 siblings, 1 reply; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-25 10:02 UTC (permalink / raw)
  To: u-boot

Hi Michael,

On 25/01/2018 at 06:47, Michael Nazzareno Trimarchi wrote:
> On 25 Jan. 2018 12:07 am, "Fabio Estevam" <festevam at gmail.com <mailto:festevam@gmail.com>> wrote:
> 
>     Hi Michael,
> 
>     On Wed, Jan 24, 2018 at 3:46 PM, Michael Nazzareno Trimarchi
>     <michael at amarulasolutions.com <mailto:michael@amarulasolutions.com>> wrote:
> 
>     > This is exactly my initial propose. Can we give a try and manage on board level?
> 
>     The kernel should not rely on the IOMUX setting done by the bootloader.
> 
>     Do you use 0x80000000 in your dts IOMUX configuration by any chance?
> 
>     0x80000000 means that the kernel will not do IOMUX configuration and
>     will use the IOMUX value that comes from the bootloader.
> 
> 
> Yes but those should not be even wrong. We can not be sure if the state machine of any logic as already corrupted. Remember that we have already this problem with the clock in general that most of the time are already enabled and so logic can be up.
> 
> 
>     It seems you can fix your USB problem by not using the IOMUX value
>     from the bootloader and just use the good IOMUX (without SION)
>     explicitly in your dts.
> 
>     Does it fix the problem?
> 
> 
> I think that the way to fix in a specific case could be more then one. I will do the best on my side but I will include to not touch iomux without any reason. I already point out that just with few pins configured like console I get the problem . I can check two extra gpio too. 
> 
> To be clear, my board was "working". We are talking about a product in the field since years with one minimal USB mulfuction . Other boards can have the same problem but just not rise in the field. If the host port is direct connected to the pen drive without an hub the USB reset can most of the time recover the connection.

I agree with Fabio: Linux should not rely on the pad configurations performed by
U-Boot. But as you say, U-Boot should work fine itself too. Have you tested the
problematic USB pen drive with U-Boot?

Besides your USB issue, in order to optimize power consumption, iomux-mx25.h
should not set SION by default, except for the pad functions that can in no way
work without it (still to be identified/tested). For the other use cases, the
board files can set SION themselves, thanks to a NEW_PAD_CTRL()-like mechanism
(apparently yet to be introduced into U-Boot). The changes introduced here
should not break anything for the current in-tree boards.

You said that setting SION only for a UART is enough to trigger your USB issue.
Of course, there is no reason to set SION by default for a UART, but I was
thinking about a possible link between UART and USB, as this behavior is very
strange. Which USB host port are use using with the problematic pen drive, and
with which PHY (SoC-internal/external, bus)? Have you checked that this port is
properly configured for this PHY and PWR/OC (on/off + polarity) in both U-Boot
and Linux? For instance, if this port is configured to use OC but no OC signal
is actually wired, this can probably do weird things.

Best regards,
Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-25 10:02                           ` Benoît Thébaudeau
@ 2018-01-25 10:17                             ` Michael Nazzareno Trimarchi
  2018-01-25 10:36                               ` Benoît Thébaudeau
  0 siblings, 1 reply; 35+ messages in thread
From: Michael Nazzareno Trimarchi @ 2018-01-25 10:17 UTC (permalink / raw)
  To: u-boot

Hi

On Thu, Jan 25, 2018 at 11:02 AM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
> Hi Michael,
>
> On 25/01/2018 at 06:47, Michael Nazzareno Trimarchi wrote:
>> On 25 Jan. 2018 12:07 am, "Fabio Estevam" <festevam at gmail.com <mailto:festevam@gmail.com>> wrote:
>>
>>     Hi Michael,
>>
>>     On Wed, Jan 24, 2018 at 3:46 PM, Michael Nazzareno Trimarchi
>>     <michael at amarulasolutions.com <mailto:michael@amarulasolutions.com>> wrote:
>>
>>     > This is exactly my initial propose. Can we give a try and manage on board level?
>>
>>     The kernel should not rely on the IOMUX setting done by the bootloader.
>>
>>     Do you use 0x80000000 in your dts IOMUX configuration by any chance?
>>
>>     0x80000000 means that the kernel will not do IOMUX configuration and
>>     will use the IOMUX value that comes from the bootloader.
>>
>>
>> Yes but those should not be even wrong. We can not be sure if the state machine of any logic as already corrupted. Remember that we have already this problem with the clock in general that most of the time are already enabled and so logic can be up.
>>
>>
>>     It seems you can fix your USB problem by not using the IOMUX value
>>     from the bootloader and just use the good IOMUX (without SION)
>>     explicitly in your dts.
>>
>>     Does it fix the problem?
>>
>>
>> I think that the way to fix in a specific case could be more then one. I will do the best on my side but I will include to not touch iomux without any reason. I already point out that just with few pins configured like console I get the problem . I can check two extra gpio too.
>>
>> To be clear, my board was "working". We are talking about a product in the field since years with one minimal USB mulfuction . Other boards can have the same problem but just not rise in the field. If the host port is direct connected to the pen drive without an hub the USB reset can most of the time recover the connection.
>
> I agree with Fabio: Linux should not rely on the pad configurations performed by

This is not the linux mailing list

> U-Boot. But as you say, U-Boot should work fine itself too. Have you tested the
> problematic USB pen drive with U-Boot?
>

ehci phy of imx25 is not supported in uboot I think and it's not in
the scope of this change


> Besides your USB issue, in order to optimize power consumption, iomux-mx25.h
> should not set SION by default, except for the pad functions that can in no way
> work without it (still to be identified/tested). For the other use cases, the
> board files can set SION themselves, thanks to a NEW_PAD_CTRL()-like mechanism
> (apparently yet to be introduced into U-Boot). The changes introduced here
> should not break anything for the current in-tree boards.

yes I know.

>
> You said that setting SION only for a UART is enough to trigger your USB issue.
> Of course, there is no reason to set SION by default for a UART, but I was
> thinking about a possible link between UART and USB, as this behavior is very
> strange. Which USB host port are use using with the problematic pen drive, and
> with which PHY (SoC-internal/external, bus)? Have you checked that this port is
> properly configured for this PHY and PWR/OC (on/off + polarity) in both U-Boot
> and Linux? For instance, if this port is configured to use OC but no OC signal

Nothing of above is connected. Pen drive is in the linux thread
described in the commit
message. All the usb stack is fully functional with a lot of pen
drive. OC, PWR are not
managed on USB/serial ehci port so they are not involved and I can
check. I have posted
some patches on linux mailing list to fix minor stuff. Let's say any
permutation bit on phy
configuration does not solve the problem. It's not a problem of usb
suspend etc. I think that
approch should be:

- align the pin mux mx25 file to the other architecture. So drop all
the sion bit expect for the one
where we know that silicon is buggy
- apply SION when is needed in the board that are already in uboot
- send patches on pin mux for board that are in mainline and we can test

On my side. I will restrict the change on my board to full isolate the
configuration. Force the reset of SION
bit anyway in linux if this solve.

Agree?

Michael

> is actually wired, this can probably do weird things.
>
> Best regards,
> Benoît



-- 
| Michael Nazzareno Trimarchi                     Amarula Solutions BV |
| COO  -  Founder                                      Cruquiuskade 47 |
| +31(0)851119172                                 Amsterdam 1018 AM NL |
|                  [`as] http://www.amarulasolutions.com               |

^ permalink raw reply	[flat|nested] 35+ messages in thread

* [U-Boot] [PATCH] imx: mx25: Remove SION bit in all pin-mux
  2018-01-25 10:17                             ` Michael Nazzareno Trimarchi
@ 2018-01-25 10:36                               ` Benoît Thébaudeau
  0 siblings, 0 replies; 35+ messages in thread
From: Benoît Thébaudeau @ 2018-01-25 10:36 UTC (permalink / raw)
  To: u-boot

On 25/01/2018 at 11:17, Michael Nazzareno Trimarchi wrote:
> On Thu, Jan 25, 2018 at 11:02 AM, Benoît Thébaudeau <benoit@wsystem.com> wrote:
>> You said that setting SION only for a UART is enough to trigger your USB issue.
>> Of course, there is no reason to set SION by default for a UART, but I was
>> thinking about a possible link between UART and USB, as this behavior is very
>> strange. Which USB host port are use using with the problematic pen drive, and
>> with which PHY (SoC-internal/external, bus)? Have you checked that this port is
>> properly configured for this PHY and PWR/OC (on/off + polarity) in both U-Boot
>> and Linux? For instance, if this port is configured to use OC but no OC signal
> 
> Nothing of above is connected. Pen drive is in the linux thread
> described in the commit
> message. All the usb stack is fully functional with a lot of pen
> drive. OC, PWR are not
> managed on USB/serial ehci port so they are not involved and I can
> check. I have posted
> some patches on linux mailing list to fix minor stuff. Let's say any
> permutation bit on phy
> configuration does not solve the problem. It's not a problem of usb
> suspend etc. I think that
> approch should be:
> 
> - align the pin mux mx25 file to the other architecture. So drop all
> the sion bit expect for the one
> where we know that silicon is buggy
> - apply SION when is needed in the board that are already in uboot
> - send patches on pin mux for board that are in mainline and we can test
> 
> On my side. I will restrict the change on my board to full isolate the
> configuration. Force the reset of SION
> bit anyway in linux if this solve.
> 
> Agree?

Looks good to me.

Benoît

^ permalink raw reply	[flat|nested] 35+ messages in thread

end of thread, other threads:[~2018-01-25 10:36 UTC | newest]

Thread overview: 35+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-01-24 14:56 imx: mx25: Remove SION bit in all pin-mux Michael Trimarchi
2018-01-24 14:56 ` [U-Boot] [PATCH] " Michael Trimarchi
2018-01-24 15:14 ` Fabio Estevam
2018-01-24 15:14   ` [U-Boot] [PATCH] " Fabio Estevam
2018-01-24 15:26   ` Michael Trimarchi
2018-01-24 15:26     ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
2018-01-24 16:31     ` Michael Trimarchi
2018-01-24 16:31       ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
2018-01-24 16:38       ` Fabio Estevam
2018-01-24 16:46         ` Michael Nazzareno Trimarchi
2018-01-24 17:05           ` Benoît Thébaudeau
2018-01-24 17:12             ` Michael Nazzareno Trimarchi
2018-01-24 17:19               ` Benoît Thébaudeau
2018-01-24 17:21               ` Fabio Estevam
2018-01-24 17:29                 ` Benoît Thébaudeau
2018-01-24 17:33                   ` Michael Nazzareno Trimarchi
2018-01-24 17:36                   ` Fabio Estevam
2018-01-24 17:46                     ` Michael Nazzareno Trimarchi
2018-01-24 23:07                       ` Fabio Estevam
2018-01-25  5:47                         ` Michael Nazzareno Trimarchi
2018-01-25 10:02                           ` Benoît Thébaudeau
2018-01-25 10:17                             ` Michael Nazzareno Trimarchi
2018-01-25 10:36                               ` Benoît Thébaudeau
2018-01-24 15:34 Benoît Thébaudeau
2018-01-24 15:34 ` [U-Boot] [PATCH] " Benoît Thébaudeau
2018-01-24 15:39 Benoît Thébaudeau
2018-01-24 15:39 ` [U-Boot] [PATCH] " Benoît Thébaudeau
2018-01-24 15:43 Michael Trimarchi
2018-01-24 15:43 ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
2018-01-24 16:03 Benoît Thébaudeau
2018-01-24 16:03 ` [U-Boot] [PATCH] " Benoît Thébaudeau
2018-01-24 16:17 Michael Trimarchi
2018-01-24 16:17 ` [U-Boot] [PATCH] " Michael Nazzareno Trimarchi
2018-01-24 16:37 Benoît Thébaudeau
2018-01-24 16:37 ` [U-Boot] [PATCH] " Benoît Thébaudeau

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