From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751538AbeFBOMP (ORCPT ); Sat, 2 Jun 2018 10:12:15 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:42263 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750740AbeFBOMN (ORCPT ); Sat, 2 Jun 2018 10:12:13 -0400 X-Google-Smtp-Source: ADUXVKKgeklaVruZ0NlPinqx/DFtVqB1D4oRP2/oN11Nnr3gZHcbBIcLmctZRDk3tnncIjYZM2FNtk0fUqf5yDpTwsg= MIME-Version: 1.0 In-Reply-To: References: <1526959560-6014-1-git-send-email-Anson.Huang@nxp.com> <1439344955.9677.1526991935718@email.1und1.de> From: Michael Nazzareno Trimarchi Date: Sat, 2 Jun 2018 16:12:11 +0200 Message-ID: Subject: Re: [PATCH 1/2] clk: imx6ul: add GPIO clock gates To: Fabio Estevam Cc: Stefan Wahren , Rob Herring , Fabio Estevam , Mark Rutland , Anson Huang , Matteo Lisi , Shawn Guo , Sascha Hauer , Michael Turquette , Stephen Boyd , linux-clk , NXP Linux Team , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-kernel , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Fabio On Sat, Jun 2, 2018 at 4:07 PM, Fabio Estevam wrote: > Hi Michael, > > On Sat, Jun 2, 2018 at 11:04 AM, Michael Nazzareno Trimarchi > wrote: > >> ull is a preatty new platform so one board was listed. Are you sure >> that we need? > > There are several imx6ul based dts in mainline and it is better if we > can avoid dtb breakage when possible. > > In this case we can avoid the dtb breakage by adding the new clock > definitions at the end of the file, just like we do for all the other > imx devices. Yes, when I add new ul clock I move down ull (that is new), but agree that this is not possible in general. Michael From mboxrd@z Thu Jan 1 00:00:00 1970 From: michael@amarulasolutions.com (Michael Nazzareno Trimarchi) Date: Sat, 2 Jun 2018 16:12:11 +0200 Subject: [PATCH 1/2] clk: imx6ul: add GPIO clock gates In-Reply-To: References: <1526959560-6014-1-git-send-email-Anson.Huang@nxp.com> <1439344955.9677.1526991935718@email.1und1.de> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Fabio On Sat, Jun 2, 2018 at 4:07 PM, Fabio Estevam wrote: > Hi Michael, > > On Sat, Jun 2, 2018 at 11:04 AM, Michael Nazzareno Trimarchi > wrote: > >> ull is a preatty new platform so one board was listed. Are you sure >> that we need? > > There are several imx6ul based dts in mainline and it is better if we > can avoid dtb breakage when possible. > > In this case we can avoid the dtb breakage by adding the new clock > definitions at the end of the file, just like we do for all the other > imx devices. Yes, when I add new ul clock I move down ull (that is new), but agree that this is not possible in general. Michael