From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33422) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YFsZk-0002AY-5T for qemu-devel@nongnu.org; Mon, 26 Jan 2015 17:56:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YFsZg-0001jM-1e for qemu-devel@nongnu.org; Mon, 26 Jan 2015 17:56:08 -0500 Received: from mail-qa0-f44.google.com ([209.85.216.44]:47104) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YFsZf-0001jG-Hr for qemu-devel@nongnu.org; Mon, 26 Jan 2015 17:56:03 -0500 Received: by mail-qa0-f44.google.com with SMTP id w8so9089244qac.3 for ; Mon, 26 Jan 2015 14:56:03 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1422037228-5363-12-git-send-email-peter.maydell@linaro.org> References: <1422037228-5363-1-git-send-email-peter.maydell@linaro.org> <1422037228-5363-12-git-send-email-peter.maydell@linaro.org> Date: Mon, 26 Jan 2015 16:56:03 -0600 Message-ID: From: Greg Bellows Content-Type: multipart/alternative; boundary=001a11c13370ecec28050d960a5c Subject: Re: [Qemu-devel] [PATCH 11/11] target-arm: Fix brace style in reindented code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "Edgar E. Iglesias" , Andrew Jones , =?UTF-8?B?QWxleCBCZW5uw6ll?= , QEMU Developers , Patch Tracking --001a11c13370ecec28050d960a5c Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell wrote: > This patch fixes the brace style in the code reindented in the > previous commit. > > Signed-off-by: Peter Maydell > --- > target-arm/helper.c | 36 +++++++++++++++++++++++------------- > 1 file changed, 23 insertions(+), 13 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 3a23af8..cc80829 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -4643,18 +4643,20 @@ static inline int check_ap(CPUARMState *env, > ARMMMUIdx mmu_idx, > return PAGE_READ | PAGE_WRITE; > } > > - if (access_type =3D=3D 1) > + if (access_type =3D=3D 1) { > prot_ro =3D 0; > - else > + } else { > prot_ro =3D PAGE_READ; > + } > > switch (ap) { > case 0: > if (arm_feature(env, ARM_FEATURE_V7)) { > return 0; > } > - if (access_type =3D=3D 1) > + if (access_type =3D=3D 1) { > return 0; > + } > switch (regime_sctlr(env, mmu_idx) & (SCTLR_S | SCTLR_R)) { > case SCTLR_S: > return is_user ? 0 : PAGE_READ; > @@ -4666,10 +4668,11 @@ static inline int check_ap(CPUARMState *env, > ARMMMUIdx mmu_idx, > case 1: > return is_user ? 0 : PAGE_READ | PAGE_WRITE; > case 2: > - if (is_user) > + if (is_user) { > return prot_ro; > - else > + } else { > return PAGE_READ | PAGE_WRITE; > + } > case 3: > return PAGE_READ | PAGE_WRITE; > case 4: /* Reserved. */ > @@ -4679,8 +4682,9 @@ static inline int check_ap(CPUARMState *env, > ARMMMUIdx mmu_idx, > case 6: > return prot_ro; > case 7: > - if (!arm_feature (env, ARM_FEATURE_V6K)) > + if (!arm_feature(env, ARM_FEATURE_V6K)) { > return 0; > + } > return prot_ro; > default: > abort(); > @@ -5191,17 +5195,20 @@ static int get_phys_addr_mpu(CPUARMState *env, > uint32_t address, > *phys_ptr =3D address; > for (n =3D 7; n >=3D 0; n--) { > base =3D env->cp15.c6_region[n]; > - if ((base & 1) =3D=3D 0) > + if ((base & 1) =3D=3D 0) { > continue; > + } > mask =3D 1 << ((base >> 1) & 0x1f); > /* Keep this shift separate from the above to avoid an > (undefined) << 32. */ > mask =3D (mask << 1) - 1; > - if (((base ^ address) & ~mask) =3D=3D 0) > + if (((base ^ address) & ~mask) =3D=3D 0) { > break; > + } > } > - if (n < 0) > + if (n < 0) { > return 2; > + } > > if (access_type =3D=3D 2) { > mask =3D env->cp15.pmsav5_insn_ap; > @@ -5213,21 +5220,24 @@ static int get_phys_addr_mpu(CPUARMState *env, > uint32_t address, > case 0: > return 1; > case 1: > - if (is_user) > - return 1; > + if (is_user) { > + return 1; > + } > *prot =3D PAGE_READ | PAGE_WRITE; > break; > case 2: > *prot =3D PAGE_READ; > - if (!is_user) > + if (!is_user) { > *prot |=3D PAGE_WRITE; > + } > break; > case 3: > *prot =3D PAGE_READ | PAGE_WRITE; > break; > case 5: > - if (is_user) > + if (is_user) { > return 1; > + } > *prot =3D PAGE_READ; > break; > case 6: > -- > 1.9.1 > > =E2=80=8BReviewed-by: Greg Bellows =E2=80=8B --001a11c13370ecec28050d960a5c Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable


On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell <peter= .maydell@linaro.org> wrote:
This patch fixes the brace style in the code reindented in the
previous commit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
=C2=A0target-arm/helper.c | 36 +++++++++++++++++++++++-------------
=C2=A01 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3a23af8..cc80829 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4643,18 +4643,20 @@ static inline int check_ap(CPUARMState *env, ARMMMU= Idx mmu_idx,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return PAGE_READ | PAGE_WRITE;
=C2=A0 =C2=A0 =C2=A0}

-=C2=A0 =C2=A0 if (access_type =3D=3D 1)
+=C2=A0 =C2=A0 if (access_type =3D=3D 1) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0prot_ro =3D 0;
-=C2=A0 =C2=A0 else
+=C2=A0 =C2=A0 } else {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0prot_ro =3D PAGE_READ;
+=C2=A0 =C2=A0 }

=C2=A0 =C2=A0 =C2=A0switch (ap) {
=C2=A0 =C2=A0 =C2=A0case 0:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (arm_feature(env, ARM_FEATURE_V7)) { =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (access_type =3D=3D 1)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (access_type =3D=3D 1) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0switch (regime_sctlr(env, mmu_idx) & = (SCTLR_S | SCTLR_R)) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0case SCTLR_S:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return is_user ? 0 : PAGE_R= EAD;
@@ -4666,10 +4668,11 @@ static inline int check_ap(CPUARMState *env, ARMMMU= Idx mmu_idx,
=C2=A0 =C2=A0 =C2=A0case 1:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return is_user ? 0 : PAGE_READ | PAGE_WRI= TE;
=C2=A0 =C2=A0 =C2=A0case 2:
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (is_user)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (is_user) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return prot_ro;
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 else
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 } else {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return PAGE_READ | PAGE_WRI= TE;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0case 3:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return PAGE_READ | PAGE_WRITE;
=C2=A0 =C2=A0 =C2=A0case 4: /* Reserved.=C2=A0 */
@@ -4679,8 +4682,9 @@ static inline int check_ap(CPUARMState *env, ARMMMUId= x mmu_idx,
=C2=A0 =C2=A0 =C2=A0case 6:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return prot_ro;
=C2=A0 =C2=A0 =C2=A0case 7:
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!arm_feature (env, ARM_FEATURE_V6K))
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!arm_feature(env, ARM_FEATURE_V6K)) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return prot_ro;
=C2=A0 =C2=A0 =C2=A0default:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0abort();
@@ -5191,17 +5195,20 @@ static int get_phys_addr_mpu(CPUARMState *env, uint= 32_t address,
=C2=A0 =C2=A0 =C2=A0*phys_ptr =3D address;
=C2=A0 =C2=A0 =C2=A0for (n =3D 7; n >=3D 0; n--) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0base =3D env->cp15.c6_region[n];
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((base & 1) =3D=3D 0)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((base & 1) =3D=3D 0) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0continue;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0mask =3D 1 << ((base >> 1) &a= mp; 0x1f);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* Keep this shift separate from the abov= e to avoid an
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (undefined) << 32.=C2=A0 */=
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0mask =3D (mask << 1) - 1;
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (((base ^ address) & ~mask) =3D=3D 0) +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (((base ^ address) & ~mask) =3D=3D 0) {=
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0}
-=C2=A0 =C2=A0 if (n < 0)
+=C2=A0 =C2=A0 if (n < 0) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 2;
+=C2=A0 =C2=A0 }

=C2=A0 =C2=A0 =C2=A0if (access_type =3D=3D 2) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0mask =3D env->cp15.pmsav5_insn_ap;
@@ -5213,21 +5220,24 @@ static int get_phys_addr_mpu(CPUARMState *env, uint= 32_t address,
=C2=A0 =C2=A0 =C2=A0case 0:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 1;
=C2=A0 =C2=A0 =C2=A0case 1:
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (is_user)
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 1;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (is_user) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 1;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*prot =3D PAGE_READ | PAGE_WRITE;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
=C2=A0 =C2=A0 =C2=A0case 2:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*prot =3D PAGE_READ;
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!is_user)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!is_user) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*prot |=3D PAGE_WRITE;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
=C2=A0 =C2=A0 =C2=A0case 3:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*prot =3D PAGE_READ | PAGE_WRITE;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
=C2=A0 =C2=A0 =C2=A0case 5:
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (is_user)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (is_user) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 1;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*prot =3D PAGE_READ;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
=C2=A0 =C2=A0 =C2=A0case 6:
--
1.9.1


= =E2=80=8BReviewed-by: Greg Bellows <greg.bellows@linaro.org>=E2=80=8B

--001a11c13370ecec28050d960a5c--