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Date: Mon, 26 Jan 2015 14:16:23 -0600
Message-ID: <CAOgzsHX8Wa4TTX2v4MzvBO2c0Ups9ginEjwUC5rcyi++gG2tKw@mail.gmail.com>
From: Greg Bellows <greg.bellows@linaro.org>
Content-Type: multipart/alternative; boundary=001a113a9764eb553a050d93cf14
Subject: Re: [Qemu-devel] [PATCH 06/11] target-arm: Don't define any
	MMU_MODE*_SUFFIXes
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Andrew Jones <drjones@redhat.com>, =?UTF-8?B?QWxleCBCZW5uw6ll?= <alex.bennee@linaro.org>, QEMU Developers <qemu-devel@nongnu.org>, Patch Tracking <patches@linaro.org>

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On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell <peter.maydell@linaro.org>
wrote:

> target-arm doesn't use any of the MMU-mode specific cpu ldst
> accessor functions. Suppress their generation by not defining
> any of the MMU_MODE*_SUFFIX macros. ("user" and "kernel" are
> too simplistic as descriptions of indexes 0 and 1 anyway.)
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/cpu.h | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index cf7b9ab..d18df8f 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -1638,8 +1638,6 @@ typedef enum ARMMMUIdx {
>      ARMMMUIdx_S1NSE1 =3D 8,
>  } ARMMMUIdx;
>
> -#define MMU_MODE0_SUFFIX _user
> -#define MMU_MODE1_SUFFIX _kernel
>  #define MMU_USER_IDX 0
>
>  /* Return the exception level we're running at if this is our mmu_idx */
> --
> 1.9.1
>
>
=E2=80=8BReviewed-by: Greg Bellows <greg.bellows@linaro.org>=E2=80=8B

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<div dir=3D"ltr"><div class=3D"gmail_default" style=3D"font-family:arial,he=
lvetica,sans-serif"><br></div><div class=3D"gmail_extra"><br><div class=3D"=
gmail_quote">On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell <span dir=3D"l=
tr">&lt;<a href=3D"mailto:peter.maydell@linaro.org" target=3D"_blank">peter=
.maydell@linaro.org</a>&gt;</span> wrote:<br><blockquote class=3D"gmail_quo=
te" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"=
>target-arm doesn&#39;t use any of the MMU-mode specific cpu ldst<br>
accessor functions. Suppress their generation by not defining<br>
any of the MMU_MODE*_SUFFIX macros. (&quot;user&quot; and &quot;kernel&quot=
; are<br>
too simplistic as descriptions of indexes 0 and 1 anyway.)<br>
<br>
Signed-off-by: Peter Maydell &lt;<a href=3D"mailto:peter.maydell@linaro.org=
">peter.maydell@linaro.org</a>&gt;<br>
---<br>
=C2=A0target-arm/cpu.h | 2 --<br>
=C2=A01 file changed, 2 deletions(-)<br>
<br>
diff --git a/target-arm/cpu.h b/target-arm/cpu.h<br>
index cf7b9ab..d18df8f 100644<br>
--- a/target-arm/cpu.h<br>
+++ b/target-arm/cpu.h<br>
@@ -1638,8 +1638,6 @@ typedef enum ARMMMUIdx {<br>
=C2=A0 =C2=A0 =C2=A0ARMMMUIdx_S1NSE1 =3D 8,<br>
=C2=A0} ARMMMUIdx;<br>
<br>
-#define MMU_MODE0_SUFFIX _user<br>
-#define MMU_MODE1_SUFFIX _kernel<br>
=C2=A0#define MMU_USER_IDX 0<br>
<br>
=C2=A0/* Return the exception level we&#39;re running at if this is our mmu=
_idx */<br>
<span class=3D"HOEnZb"><font color=3D"#888888">--<br>
1.9.1<br>
<br>
</font></span></blockquote></div><br></div><div class=3D"gmail_extra"><div =
class=3D"gmail_default" style=3D"font-family:arial,helvetica,sans-serif">=
=E2=80=8BReviewed-by: Greg Bellows &lt;<a href=3D"mailto:greg.bellows@linar=
o.org">greg.bellows@linaro.org</a>&gt;=E2=80=8B</div><br></div></div>

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