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Thu, 28 May 2020 16:09:37 -0700 (PDT) MIME-Version: 1.0 References: <20200521133301.816665-1-anup.patel@wdc.com> <20200521133301.816665-3-anup.patel@wdc.com> In-Reply-To: <20200521133301.816665-3-anup.patel@wdc.com> From: Atish Patra Date: Thu, 28 May 2020 16:09:26 -0700 Message-ID: Subject: Re: [PATCH v5 2/6] RISC-V: Rename and move plic_find_hart_id() to arch directory To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Thomas Gleixner , Jason Cooper , Marc Zyngier , Anup Patel , "linux-kernel@vger.kernel.org List" , Atish Patra , Alistair Francis , linux-riscv Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 21, 2020 at 6:34 AM Anup Patel wrote: > > The plic_find_hart_id() can be useful to other interrupt controller > drivers (such as RISC-V local interrupt driver) so we rename this > function to riscv_of_parent_hartid() and place it in arch directory > along with riscv_of_processor_hartid(). > > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/processor.h | 1 + > arch/riscv/kernel/cpu.c | 16 ++++++++++++++++ > drivers/irqchip/irq-sifive-plic.c | 16 +--------------- > 3 files changed, 18 insertions(+), 15 deletions(-) > > diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h > index 3ddb798264f1..b1efd840003c 100644 > --- a/arch/riscv/include/asm/processor.h > +++ b/arch/riscv/include/asm/processor.h > @@ -75,6 +75,7 @@ static inline void wait_for_interrupt(void) > > struct device_node; > int riscv_of_processor_hartid(struct device_node *node); > +int riscv_of_parent_hartid(struct device_node *node); > > extern void riscv_fill_hwcap(void); > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 40a3c442ac5f..6d59e6906fdd 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -44,6 +44,22 @@ int riscv_of_processor_hartid(struct device_node *node) > return hart; > } > > +/* > + * Find hart ID of the CPU DT node under which given DT node falls. > + * > + * To achieve this, we walk up the DT tree until we find an active > + * RISC-V core (HART) node and extract the cpuid from it. > + */ > +int riscv_of_parent_hartid(struct device_node *node) > +{ > + for (; node; node = node->parent) { > + if (of_device_is_compatible(node, "riscv")) > + return riscv_of_processor_hartid(node); > + } > + > + return -1; > +} > + > #ifdef CONFIG_PROC_FS > > static void print_isa(struct seq_file *f, const char *isa) > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c > index d9c53f85a68e..16d31d114c30 100644 > --- a/drivers/irqchip/irq-sifive-plic.c > +++ b/drivers/irqchip/irq-sifive-plic.c > @@ -240,20 +240,6 @@ static void plic_handle_irq(struct pt_regs *regs) > csr_set(CSR_IE, IE_EIE); > } > > -/* > - * Walk up the DT tree until we find an active RISC-V core (HART) node and > - * extract the cpuid from it. > - */ > -static int plic_find_hart_id(struct device_node *node) > -{ > - for (; node; node = node->parent) { > - if (of_device_is_compatible(node, "riscv")) > - return riscv_of_processor_hartid(node); > - } > - > - return -1; > -} > - > static void plic_set_threshold(struct plic_handler *handler, u32 threshold) > { > /* priority must be > threshold to trigger an interrupt */ > @@ -330,7 +316,7 @@ static int __init plic_init(struct device_node *node, > if (parent.args[0] != RV_IRQ_EXT) > continue; > > - hartid = plic_find_hart_id(parent.np); > + hartid = riscv_of_parent_hartid(parent.np); > if (hartid < 0) { > pr_warn("failed to parse hart ID for context %d.\n", i); > continue; > -- > 2.25.1 > > Reviewed-by: Atish Patra -- Regards, Atish From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50563C433E0 for ; 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Thu, 28 May 2020 16:09:37 -0700 (PDT) MIME-Version: 1.0 References: <20200521133301.816665-1-anup.patel@wdc.com> <20200521133301.816665-3-anup.patel@wdc.com> In-Reply-To: <20200521133301.816665-3-anup.patel@wdc.com> From: Atish Patra Date: Thu, 28 May 2020 16:09:26 -0700 Message-ID: Subject: Re: [PATCH v5 2/6] RISC-V: Rename and move plic_find_hart_id() to arch directory To: Anup Patel Content-Type: text/plain; charset="UTF-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200528_160939_179554_957CCFD0 X-CRM114-Status: GOOD ( 17.95 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Jason Cooper , Marc Zyngier , Anup Patel , Daniel Lezcano , "linux-kernel@vger.kernel.org List" , Atish Patra , Palmer Dabbelt , Paul Walmsley , Alistair Francis , Thomas Gleixner , linux-riscv Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, May 21, 2020 at 6:34 AM Anup Patel wrote: > > The plic_find_hart_id() can be useful to other interrupt controller > drivers (such as RISC-V local interrupt driver) so we rename this > function to riscv_of_parent_hartid() and place it in arch directory > along with riscv_of_processor_hartid(). > > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/processor.h | 1 + > arch/riscv/kernel/cpu.c | 16 ++++++++++++++++ > drivers/irqchip/irq-sifive-plic.c | 16 +--------------- > 3 files changed, 18 insertions(+), 15 deletions(-) > > diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h > index 3ddb798264f1..b1efd840003c 100644 > --- a/arch/riscv/include/asm/processor.h > +++ b/arch/riscv/include/asm/processor.h > @@ -75,6 +75,7 @@ static inline void wait_for_interrupt(void) > > struct device_node; > int riscv_of_processor_hartid(struct device_node *node); > +int riscv_of_parent_hartid(struct device_node *node); > > extern void riscv_fill_hwcap(void); > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 40a3c442ac5f..6d59e6906fdd 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -44,6 +44,22 @@ int riscv_of_processor_hartid(struct device_node *node) > return hart; > } > > +/* > + * Find hart ID of the CPU DT node under which given DT node falls. > + * > + * To achieve this, we walk up the DT tree until we find an active > + * RISC-V core (HART) node and extract the cpuid from it. > + */ > +int riscv_of_parent_hartid(struct device_node *node) > +{ > + for (; node; node = node->parent) { > + if (of_device_is_compatible(node, "riscv")) > + return riscv_of_processor_hartid(node); > + } > + > + return -1; > +} > + > #ifdef CONFIG_PROC_FS > > static void print_isa(struct seq_file *f, const char *isa) > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c > index d9c53f85a68e..16d31d114c30 100644 > --- a/drivers/irqchip/irq-sifive-plic.c > +++ b/drivers/irqchip/irq-sifive-plic.c > @@ -240,20 +240,6 @@ static void plic_handle_irq(struct pt_regs *regs) > csr_set(CSR_IE, IE_EIE); > } > > -/* > - * Walk up the DT tree until we find an active RISC-V core (HART) node and > - * extract the cpuid from it. > - */ > -static int plic_find_hart_id(struct device_node *node) > -{ > - for (; node; node = node->parent) { > - if (of_device_is_compatible(node, "riscv")) > - return riscv_of_processor_hartid(node); > - } > - > - return -1; > -} > - > static void plic_set_threshold(struct plic_handler *handler, u32 threshold) > { > /* priority must be > threshold to trigger an interrupt */ > @@ -330,7 +316,7 @@ static int __init plic_init(struct device_node *node, > if (parent.args[0] != RV_IRQ_EXT) > continue; > > - hartid = plic_find_hart_id(parent.np); > + hartid = riscv_of_parent_hartid(parent.np); > if (hartid < 0) { > pr_warn("failed to parse hart ID for context %d.\n", i); > continue; > -- > 2.25.1 > > Reviewed-by: Atish Patra -- Regards, Atish