From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3872C1B0E3 for ; Mon, 14 Dec 2020 01:03:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7CC1F238A1 for ; Mon, 14 Dec 2020 01:03:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437383AbgLNBDN (ORCPT ); Sun, 13 Dec 2020 20:03:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725785AbgLNBDM (ORCPT ); Sun, 13 Dec 2020 20:03:12 -0500 Received: from mail-il1-x142.google.com (mail-il1-x142.google.com [IPv6:2607:f8b0:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81729C0613CF for ; Sun, 13 Dec 2020 17:02:31 -0800 (PST) Received: by mail-il1-x142.google.com with SMTP id k8so14343674ilr.4 for ; Sun, 13 Dec 2020 17:02:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=pwoZAstNyItowRl75/JkfYhPz9GxjpG8UKmIVeiIkU4=; b=jg1VAG8Y9spbeNPm0HqZQYyzZbUThDGajQczBhxopY/eZ0ZfZOy1rtNtMpfTcUJN2e hcTDkndVSeCSv8XfUkk1ct333kRwrfVXn1wJ8rT8VTHfhE4vDaikBJeJ50nbAEiSjdAH Tc+fFmMLY5KDmELT+OGUNcqBKacXiC7mJb8ZQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=pwoZAstNyItowRl75/JkfYhPz9GxjpG8UKmIVeiIkU4=; b=SSALFu69TlT8xvTv9+MeP6GKh6zdwCC/BPHMCJhJVAC7nXK2qrb+0Fc9PQxCAnXak4 Ap97YTroEXYE39I8UTiSFnsZlkOXgfDm1x3EWITa5rMfHcb5ILd5Xhwdlve+3NYEx4fa t23Ww4CIt5IY1zwpG/mQeIFK8QBNKoEfWDirxqe+PKBWASYM9dVwXokiqhcL7wUMMLkz in1vgm4sLtX661VajDPQSLEnGXB3vT3r9QmNxKMoWG1fmhRLCdXwHW8apMhYOa7HwUB4 r0imsGRa6y4oQcdxH0QlpMyAAit3CTRaKUkL7mPtp8kvi7ALYW6ZAf7sZW3W3HSrAoMC UaHQ== X-Gm-Message-State: AOAM530WgwNBT8cFRQejfnU2brGtwXKpqCqM3NVaV+AFzak7XkceQL5r gSs6s+Po9ROFX+LRPx7bus8zDHj2YdE/AgVwP5QS X-Google-Smtp-Source: ABdhPJxwGY4W0ZwhqdX57uqaRtOvyYqqWikXmuAUulNParGeFaU61YIkG4qfuzXaAXRgstDfVpPKylEyEQP/pDhhDt0= X-Received: by 2002:a92:6410:: with SMTP id y16mr31116431ilb.126.1607907750716; Sun, 13 Dec 2020 17:02:30 -0800 (PST) MIME-Version: 1.0 References: <20201119003829.1282810-1-atish.patra@wdc.com> In-Reply-To: <20201119003829.1282810-1-atish.patra@wdc.com> From: Atish Patra Date: Sun, 13 Dec 2020 17:02:19 -0800 Message-ID: Subject: Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V To: Palmer Dabbelt , Palmer Dabbelt Cc: "linux-kernel@vger.kernel.org List" , "Rafael J. Wysocki" , Catalin Marinas , Jonathan Cameron , Atish Patra , linux-riscv , Will Deacon , Ard Biesheuvel , linux-arch@vger.kernel.org, Zhengyuan Liu , Baoquan He , Anup Patel , Daniel Lezcano , Steven Price , Greentime Hu , Albert Ou , Arnd Bergmann , Anshuman Khandual , Paul Walmsley , "linux-arm-kernel@lists.infradead.org" , Greg Kroah-Hartman , Andrew Morton , Mike Rapoport Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 18, 2020 at 4:39 PM Atish Patra wrote: > > This series attempts to move the ARM64 numa implementation to common > code so that RISC-V can leverage that as well instead of reimplementing > it again. > > RISC-V specific bits are based on initial work done by Greentime Hu [1] but > modified to reuse the common implementation to avoid duplication. > > [1] https://lkml.org/lkml/2020/1/10/233 > > This series has been tested on qemu with numa enabled for both RISC-V & ARM64. > It would be great if somebody can test it on numa capable ARM64 hardware platforms. > This patch series doesn't modify the maintainers list for the common code (arch_numa) > as I am not sure if somebody from ARM64 community or Greg should take up the > maintainership. Ganapatrao was the original author of the arm64 version. > I would be happy to update that in the next revision once it is decided. > > # numactl --hardware > available: 2 nodes (0-1) > node 0 cpus: 0 1 2 3 > node 0 size: 486 MB > node 0 free: 470 MB > node 1 cpus: 4 5 6 7 > node 1 size: 424 MB > node 1 free: 408 MB > node distances: > node 0 1 > 0: 10 20 > 1: 20 10 > # numactl -show > policy: default > preferred node: current > physcpubind: 0 1 2 3 4 5 6 7 > cpubind: 0 1 > nodebind: 0 1 > membind: 0 1 > > The patches are also available at > https://github.com/atishp04/linux/tree/5.11_numa_unified_v5 > > For RISC-V, the following qemu series is a pre-requisite(already available in upstream) > https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 > > Testing: > RISC-V: > Tested in Qemu and 2 socket OmniXtend FPGA. > > ARM64: > 2 socket kunpeng920 (4 nodes around 250G a node) > Tested-by: Jonathan Cameron > > Changes from v4->v5: > 1. Added by Acked-by & Reviewed-by tags. > 2. Swapped patch 1 & 2 in v4 version. > > Changes from v3->v4: > 1. Removed redundant duplicate header. > 2. Added Reviewed-by tags. > > Changes from v2->v3: > 1. Added Acked-by/Reviewed-by tags. > 2. Replaced asm/acpi.h with linux/acpi.h > 3. Defined arch_acpi_numa_init as static. > > Changes from v1->v2: > 1. Replaced ARM64 specific compile time protection with ACPI specific ones. > 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. > 3. Fixed few typos. > > Atish Patra (4): > arm64, numa: Change the numa init functions name to be generic > numa: Move numa implementation to common code > riscv: Separate memory init from paging init > riscv: Add numa support for riscv64 platform > > Greentime Hu (1): > riscv: Add support pte_protnone and pmd_protnone if > CONFIG_NUMA_BALANCING > > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/numa.h | 48 +---------------- > arch/arm64/kernel/acpi_numa.c | 12 ----- > arch/arm64/mm/Makefile | 1 - > arch/arm64/mm/init.c | 4 +- > arch/riscv/Kconfig | 31 ++++++++++- > arch/riscv/include/asm/mmzone.h | 13 +++++ > arch/riscv/include/asm/numa.h | 8 +++ > arch/riscv/include/asm/pci.h | 14 +++++ > arch/riscv/include/asm/pgtable.h | 21 ++++++++ > arch/riscv/kernel/setup.c | 11 +++- > arch/riscv/kernel/smpboot.c | 12 ++++- > arch/riscv/mm/init.c | 10 +++- > drivers/base/Kconfig | 6 +++ > drivers/base/Makefile | 1 + > .../mm/numa.c => drivers/base/arch_numa.c | 27 ++++++++-- > include/asm-generic/numa.h | 52 +++++++++++++++++++ > 17 files changed, 200 insertions(+), 72 deletions(-) > create mode 100644 arch/riscv/include/asm/mmzone.h > create mode 100644 arch/riscv/include/asm/numa.h > rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%) > create mode 100644 include/asm-generic/numa.h > > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Hey Palmer, I did not see this series in for-next. Let me know if you need anything else to be done for this series. -- Regards, Atish From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59B87C4361B for ; Mon, 14 Dec 2020 01:02:51 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D00F82388A for ; Mon, 14 Dec 2020 01:02:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D00F82388A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atishpatra.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:In-Reply-To: References:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Bh7ugd6sK1318ZX9aNQiBklm+7xJOqVN7ZHIFUs5AKw=; b=c2a9KaPyIaJGyhS061gh+4oES v440TY74Usal0LUpiaRRhgZJYTu05T+a7plKQRmGj6hYBSXTMFApbdoWWKLMe2DpfO4kwVOQvDeS1 nnpk4ZHfSfx9mHU+MNT9SqgQW1r9EHK2/QoOhcQJMuFY1Je6OmOSzhSQxuqhtLvKAmtDuCK3P/rwF uOkNqa9B4Kai5H+gJK5bMl23ons+c9DgY3GwHpgNZk3GTgqhkCMIPIYn0qnRm8DbyW6jplThd7oa2 5b7pbCoL73IfvJ3TWPCnvnkT2W+lZf2unFl50dnXT3enhm2S40Ex0apIHtGV/FYQzEkNoPW3SE5Ez fiUk3qrdQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kocG6-0007FB-4o; Mon, 14 Dec 2020 01:02:38 +0000 Received: from mail-il1-x143.google.com ([2607:f8b0:4864:20::143]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kocG2-0007EW-MO for linux-riscv@lists.infradead.org; Mon, 14 Dec 2020 01:02:36 +0000 Received: by mail-il1-x143.google.com with SMTP id c18so14304767iln.10 for ; Sun, 13 Dec 2020 17:02:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=pwoZAstNyItowRl75/JkfYhPz9GxjpG8UKmIVeiIkU4=; b=jg1VAG8Y9spbeNPm0HqZQYyzZbUThDGajQczBhxopY/eZ0ZfZOy1rtNtMpfTcUJN2e hcTDkndVSeCSv8XfUkk1ct333kRwrfVXn1wJ8rT8VTHfhE4vDaikBJeJ50nbAEiSjdAH Tc+fFmMLY5KDmELT+OGUNcqBKacXiC7mJb8ZQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=pwoZAstNyItowRl75/JkfYhPz9GxjpG8UKmIVeiIkU4=; b=TjkeQpM0vxaUTmO9ZnrP10FAfuRiqNYsBEFX0NvxtbU8ChWJbZ33ckT8z6Pwrn5dgv mvFlZZj4qVsDIgd0pc1nBVW7qPTcmffQjzd4lyJWptRhNccJjvFp8tBB+89m8ogwxHwO pGYMibxhfSYHWPNiJTsof9OvGucx8xyPqbE+23LbbE6Mr2Nkx/0/1e28r0VDTpthr6CI +7ysCN6NPgPUnHMXqZbfd1Hs8DkoSaKwFGgwQXdGBdwXd4Gtx5cw0BnejQlCHhB7jATY u4vQL54kR4ZdGIImhugdgu7i+GVnQSqml0XTEG83HLuE2XQjDieg2Bru2rf6HRr/quwn K/DA== X-Gm-Message-State: AOAM533lwHkdp3ixPMEQfb3aRz2lsxqYm3HgEFOxnMEMrbk27CYvRqDS CqUup4Rs/oj6TOH/i9PJt+cR4rWd9YIIMco7KWTu X-Google-Smtp-Source: ABdhPJxwGY4W0ZwhqdX57uqaRtOvyYqqWikXmuAUulNParGeFaU61YIkG4qfuzXaAXRgstDfVpPKylEyEQP/pDhhDt0= X-Received: by 2002:a92:6410:: with SMTP id y16mr31116431ilb.126.1607907750716; Sun, 13 Dec 2020 17:02:30 -0800 (PST) MIME-Version: 1.0 References: <20201119003829.1282810-1-atish.patra@wdc.com> In-Reply-To: <20201119003829.1282810-1-atish.patra@wdc.com> From: Atish Patra Date: Sun, 13 Dec 2020 17:02:19 -0800 Message-ID: Subject: Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V To: Palmer Dabbelt , Palmer Dabbelt X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201213_200234_883082_CFC8B9E5 X-CRM114-Status: GOOD ( 28.46 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Rafael J. Wysocki" , Catalin Marinas , Jonathan Cameron , Atish Patra , linux-riscv , Will Deacon , Ard Biesheuvel , linux-arch@vger.kernel.org, Zhengyuan Liu , Baoquan He , Anup Patel , Daniel Lezcano , Steven Price , Greentime Hu , Albert Ou , Arnd Bergmann , Anshuman Khandual , Paul Walmsley , "linux-arm-kernel@lists.infradead.org" , Greg Kroah-Hartman , "linux-kernel@vger.kernel.org List" , Andrew Morton , Mike Rapoport Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Nov 18, 2020 at 4:39 PM Atish Patra wrote: > > This series attempts to move the ARM64 numa implementation to common > code so that RISC-V can leverage that as well instead of reimplementing > it again. > > RISC-V specific bits are based on initial work done by Greentime Hu [1] but > modified to reuse the common implementation to avoid duplication. > > [1] https://lkml.org/lkml/2020/1/10/233 > > This series has been tested on qemu with numa enabled for both RISC-V & ARM64. > It would be great if somebody can test it on numa capable ARM64 hardware platforms. > This patch series doesn't modify the maintainers list for the common code (arch_numa) > as I am not sure if somebody from ARM64 community or Greg should take up the > maintainership. Ganapatrao was the original author of the arm64 version. > I would be happy to update that in the next revision once it is decided. > > # numactl --hardware > available: 2 nodes (0-1) > node 0 cpus: 0 1 2 3 > node 0 size: 486 MB > node 0 free: 470 MB > node 1 cpus: 4 5 6 7 > node 1 size: 424 MB > node 1 free: 408 MB > node distances: > node 0 1 > 0: 10 20 > 1: 20 10 > # numactl -show > policy: default > preferred node: current > physcpubind: 0 1 2 3 4 5 6 7 > cpubind: 0 1 > nodebind: 0 1 > membind: 0 1 > > The patches are also available at > https://github.com/atishp04/linux/tree/5.11_numa_unified_v5 > > For RISC-V, the following qemu series is a pre-requisite(already available in upstream) > https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 > > Testing: > RISC-V: > Tested in Qemu and 2 socket OmniXtend FPGA. > > ARM64: > 2 socket kunpeng920 (4 nodes around 250G a node) > Tested-by: Jonathan Cameron > > Changes from v4->v5: > 1. Added by Acked-by & Reviewed-by tags. > 2. Swapped patch 1 & 2 in v4 version. > > Changes from v3->v4: > 1. Removed redundant duplicate header. > 2. Added Reviewed-by tags. > > Changes from v2->v3: > 1. Added Acked-by/Reviewed-by tags. > 2. Replaced asm/acpi.h with linux/acpi.h > 3. Defined arch_acpi_numa_init as static. > > Changes from v1->v2: > 1. Replaced ARM64 specific compile time protection with ACPI specific ones. > 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. > 3. Fixed few typos. > > Atish Patra (4): > arm64, numa: Change the numa init functions name to be generic > numa: Move numa implementation to common code > riscv: Separate memory init from paging init > riscv: Add numa support for riscv64 platform > > Greentime Hu (1): > riscv: Add support pte_protnone and pmd_protnone if > CONFIG_NUMA_BALANCING > > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/numa.h | 48 +---------------- > arch/arm64/kernel/acpi_numa.c | 12 ----- > arch/arm64/mm/Makefile | 1 - > arch/arm64/mm/init.c | 4 +- > arch/riscv/Kconfig | 31 ++++++++++- > arch/riscv/include/asm/mmzone.h | 13 +++++ > arch/riscv/include/asm/numa.h | 8 +++ > arch/riscv/include/asm/pci.h | 14 +++++ > arch/riscv/include/asm/pgtable.h | 21 ++++++++ > arch/riscv/kernel/setup.c | 11 +++- > arch/riscv/kernel/smpboot.c | 12 ++++- > arch/riscv/mm/init.c | 10 +++- > drivers/base/Kconfig | 6 +++ > drivers/base/Makefile | 1 + > .../mm/numa.c => drivers/base/arch_numa.c | 27 ++++++++-- > include/asm-generic/numa.h | 52 +++++++++++++++++++ > 17 files changed, 200 insertions(+), 72 deletions(-) > create mode 100644 arch/riscv/include/asm/mmzone.h > create mode 100644 arch/riscv/include/asm/numa.h > rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%) > create mode 100644 include/asm-generic/numa.h > > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Hey Palmer, I did not see this series in for-next. Let me know if you need anything else to be done for this series. -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E28EBC4361B for ; Mon, 14 Dec 2020 01:04:04 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A03B52388A for ; Mon, 14 Dec 2020 01:04:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A03B52388A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atishpatra.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From:In-Reply-To: References:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=owqKTMo5JpAIelOY+EMMnYun+wcwJZX75K/1WFJez00=; b=n/EFUVMPH0EJPvfFtuIhDyuwH uTCGdAiarDMQX7nfNthQe1Z9ROQtDQAQyI/0wjLGZJs5BQNS0e38h+fhISEFVWs2ackU19WusExTB 46DwS67CySiStqrQSy0qnUHFTfcneCq35C+mVKsSSdSH0CeXWX44wy+xKeE4FTCxtqofcQXK2oTD5 49av3wIzdEzyvv4q+kHYAAVBjK63cpYRk7U7F4Xh6xxfJVyFYU7hEkuzae9AE85oc5avKGr+2yRJO L4FgtHT+xIgKrLi+vFopOK/hWK1bs1zyb5OiGk/l+brN3QXx7+JtoYRuJQhcm7te6iO0AB29QoWe3 Ykdz+Ywbg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kocG7-0007FL-98; Mon, 14 Dec 2020 01:02:39 +0000 Received: from mail-il1-x141.google.com ([2607:f8b0:4864:20::141]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kocG2-0007EX-NB for linux-arm-kernel@lists.infradead.org; Mon, 14 Dec 2020 01:02:36 +0000 Received: by mail-il1-x141.google.com with SMTP id t9so14318605ilf.2 for ; Sun, 13 Dec 2020 17:02:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=pwoZAstNyItowRl75/JkfYhPz9GxjpG8UKmIVeiIkU4=; b=jg1VAG8Y9spbeNPm0HqZQYyzZbUThDGajQczBhxopY/eZ0ZfZOy1rtNtMpfTcUJN2e hcTDkndVSeCSv8XfUkk1ct333kRwrfVXn1wJ8rT8VTHfhE4vDaikBJeJ50nbAEiSjdAH Tc+fFmMLY5KDmELT+OGUNcqBKacXiC7mJb8ZQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=pwoZAstNyItowRl75/JkfYhPz9GxjpG8UKmIVeiIkU4=; b=m9/LKyi3CEevNABS05lNLyd8AVPPMPNw4Hcrr1+zscRTawCUxGnYV/DNgD04T/IQMl Xlu68j9bq4D98v2isPRVDivrFtDGfmYBAzXU5W7Pq1jf0mT8EsBGHVbBaDmBXvwIv7CZ S2UL5O6Fo1Hx+ZTTGNtGrrDqlOUnPAYwULhVS5RuMJ96zBGK0YC+nIZ4N/Yu3k8HoSDM V4CXb1Gj79j+u25hdemsx+7LxA/010TTKe9PUZqdQX+b7Eaz3+SnGJMvD4LC4V22iRfI llfGL+2vp5pX1xTi7l/i0zaB4GcYGMsEP3Ciy9+uWq0LZzTEnh/Zj1V/YCInVdfRK6nl KJCg== X-Gm-Message-State: AOAM530LwtL+K+fhzSF8LO8pjr0FaK48wjmPEPc7uLpKGB1l7cYnQYie x81geqY7+pqQ9+mne3UppVE210Fc8LFK9Xv1VDeu X-Google-Smtp-Source: ABdhPJxwGY4W0ZwhqdX57uqaRtOvyYqqWikXmuAUulNParGeFaU61YIkG4qfuzXaAXRgstDfVpPKylEyEQP/pDhhDt0= X-Received: by 2002:a92:6410:: with SMTP id y16mr31116431ilb.126.1607907750716; Sun, 13 Dec 2020 17:02:30 -0800 (PST) MIME-Version: 1.0 References: <20201119003829.1282810-1-atish.patra@wdc.com> In-Reply-To: <20201119003829.1282810-1-atish.patra@wdc.com> From: Atish Patra Date: Sun, 13 Dec 2020 17:02:19 -0800 Message-ID: Subject: Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V To: Palmer Dabbelt , Palmer Dabbelt X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201213_200234_881782_B42C3906 X-CRM114-Status: GOOD ( 29.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Rafael J. Wysocki" , Catalin Marinas , Jonathan Cameron , Atish Patra , linux-riscv , Will Deacon , Ard Biesheuvel , linux-arch@vger.kernel.org, Zhengyuan Liu , Baoquan He , Anup Patel , Daniel Lezcano , Steven Price , Greentime Hu , Albert Ou , Arnd Bergmann , Anshuman Khandual , Paul Walmsley , "linux-arm-kernel@lists.infradead.org" , Greg Kroah-Hartman , "linux-kernel@vger.kernel.org List" , Andrew Morton , Mike Rapoport Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 18, 2020 at 4:39 PM Atish Patra wrote: > > This series attempts to move the ARM64 numa implementation to common > code so that RISC-V can leverage that as well instead of reimplementing > it again. > > RISC-V specific bits are based on initial work done by Greentime Hu [1] but > modified to reuse the common implementation to avoid duplication. > > [1] https://lkml.org/lkml/2020/1/10/233 > > This series has been tested on qemu with numa enabled for both RISC-V & ARM64. > It would be great if somebody can test it on numa capable ARM64 hardware platforms. > This patch series doesn't modify the maintainers list for the common code (arch_numa) > as I am not sure if somebody from ARM64 community or Greg should take up the > maintainership. Ganapatrao was the original author of the arm64 version. > I would be happy to update that in the next revision once it is decided. > > # numactl --hardware > available: 2 nodes (0-1) > node 0 cpus: 0 1 2 3 > node 0 size: 486 MB > node 0 free: 470 MB > node 1 cpus: 4 5 6 7 > node 1 size: 424 MB > node 1 free: 408 MB > node distances: > node 0 1 > 0: 10 20 > 1: 20 10 > # numactl -show > policy: default > preferred node: current > physcpubind: 0 1 2 3 4 5 6 7 > cpubind: 0 1 > nodebind: 0 1 > membind: 0 1 > > The patches are also available at > https://github.com/atishp04/linux/tree/5.11_numa_unified_v5 > > For RISC-V, the following qemu series is a pre-requisite(already available in upstream) > https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 > > Testing: > RISC-V: > Tested in Qemu and 2 socket OmniXtend FPGA. > > ARM64: > 2 socket kunpeng920 (4 nodes around 250G a node) > Tested-by: Jonathan Cameron > > Changes from v4->v5: > 1. Added by Acked-by & Reviewed-by tags. > 2. Swapped patch 1 & 2 in v4 version. > > Changes from v3->v4: > 1. Removed redundant duplicate header. > 2. Added Reviewed-by tags. > > Changes from v2->v3: > 1. Added Acked-by/Reviewed-by tags. > 2. Replaced asm/acpi.h with linux/acpi.h > 3. Defined arch_acpi_numa_init as static. > > Changes from v1->v2: > 1. Replaced ARM64 specific compile time protection with ACPI specific ones. > 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. > 3. Fixed few typos. > > Atish Patra (4): > arm64, numa: Change the numa init functions name to be generic > numa: Move numa implementation to common code > riscv: Separate memory init from paging init > riscv: Add numa support for riscv64 platform > > Greentime Hu (1): > riscv: Add support pte_protnone and pmd_protnone if > CONFIG_NUMA_BALANCING > > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/numa.h | 48 +---------------- > arch/arm64/kernel/acpi_numa.c | 12 ----- > arch/arm64/mm/Makefile | 1 - > arch/arm64/mm/init.c | 4 +- > arch/riscv/Kconfig | 31 ++++++++++- > arch/riscv/include/asm/mmzone.h | 13 +++++ > arch/riscv/include/asm/numa.h | 8 +++ > arch/riscv/include/asm/pci.h | 14 +++++ > arch/riscv/include/asm/pgtable.h | 21 ++++++++ > arch/riscv/kernel/setup.c | 11 +++- > arch/riscv/kernel/smpboot.c | 12 ++++- > arch/riscv/mm/init.c | 10 +++- > drivers/base/Kconfig | 6 +++ > drivers/base/Makefile | 1 + > .../mm/numa.c => drivers/base/arch_numa.c | 27 ++++++++-- > include/asm-generic/numa.h | 52 +++++++++++++++++++ > 17 files changed, 200 insertions(+), 72 deletions(-) > create mode 100644 arch/riscv/include/asm/mmzone.h > create mode 100644 arch/riscv/include/asm/numa.h > rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%) > create mode 100644 include/asm-generic/numa.h > > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Hey Palmer, I did not see this series in for-next. Let me know if you need anything else to be done for this series. -- Regards, Atish _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel