From: Fabien Parent <fparent@baylibre.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 01/18] tools: MediaTek: add MTK boot header generation to mkimage
Date: Wed, 14 Nov 2018 18:27:59 +0100 [thread overview]
Message-ID: <CAOwMV_xxzLHPtee-ERgMnSRHqhBaqb8JSNiy9gQmpMzgjHV+8w@mail.gmail.com> (raw)
In-Reply-To: <c3d29fc5ffbdc5f7f244d9d231cef542ccd9b7d3.1541474544.git.ryder.lee@mediatek.com>
Hi Ryder,
On Tue, Nov 6, 2018 at 9:50 AM Ryder Lee <ryder.lee@mediatek.com> wrote:
>
> This patch adds support for MTK boot image generation.
>
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> Changes since v4: None
> ---
> Makefile | 20 ++
> common/image.c | 1 +
> include/image.h | 1 +
> scripts/Makefile.spl | 11 +
> tools/Makefile | 1 +
> tools/mtk_image.c | 749 +++++++++++++++++++++++++++++++++++++++++++++++++++
> tools/mtk_image.h | 199 ++++++++++++++
> 7 files changed, 982 insertions(+)
> create mode 100644 tools/mtk_image.c
> create mode 100644 tools/mtk_image.h
>
> diff --git a/Makefile b/Makefile
> index 250eb6c..5a384c8 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -852,6 +852,8 @@ ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
> ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb-tegra.bin
> endif
>
> +ALL-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin
> +
> # Add optional build target if defined in board/cpu/soc headers
> ifneq ($(CONFIG_BUILD_TARGET),)
> ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
> @@ -1359,6 +1361,24 @@ u-boot.elf: u-boot.bin
> $(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
> $(call if_changed,u-boot-elf)
>
> +# MediaTek's ARM-based u-boot needs a header to contains its load address
> +# which is parsed by the BootROM.
> +# If the SPL build is enabled, the header will be added to the spl binary,
> +# and the spl binary and the u-boot.img will be combined into one file.
> +# Otherwise the header will be added to the u-boot.bin directly.
> +
> +ifeq ($(CONFIG_SPL),y)
> +u-boot-mtk.bin: u-boot.dtb u-boot.img spl/u-boot-spl-mtk.bin FORCE
> + $(call if_changed,binman)
> +else
> +MKIMAGEFLAGS_u-boot-mtk.bin = -T mtk_image \
> + -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
> + -n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
> +
> +u-boot-mtk.bin: u-boot.bin FORCE
> + $(call if_changed,mkimage)
> +endif
> +
> ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
>
> # Rule to link u-boot
> diff --git a/common/image.c b/common/image.c
> index 1c3a772..d3f9914 100644
> --- a/common/image.c
> +++ b/common/image.c
> @@ -166,6 +166,7 @@ static const table_entry_t uimage_type[] = {
> { IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
> { IH_TYPE_PMMC, "pmmc", "TI Power Management Micro-Controller Firmware",},
> { IH_TYPE_STM32IMAGE, "stm32image", "STMicroelectronics STM32 Image" },
> + { IH_TYPE_MTKIMAGE, "mtk_image", "MeidaTek BootROM loadable Image" },
typo: MeidaTek -> MediaTek
> { -1, "", "", },
> };
>
> diff --git a/include/image.h b/include/image.h
> index 031c355..8dd7247 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -278,6 +278,7 @@ enum {
> IH_TYPE_PMMC, /* TI Power Management Micro-Controller Firmware */
> IH_TYPE_STM32IMAGE, /* STMicroelectronics STM32 Image */
> IH_TYPE_SOCFPGAIMAGE_V1, /* Altera SOCFPGA A10 Preloader */
> + IH_TYPE_MTKIMAGE, /* MeidaTek BootROM loadable Image */
typo: MeidaTek -> MediaTek
>
> IH_TYPE_COUNT, /* Number of image types */
> };
> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
> index 7416abe..22bd8f7 100644
> --- a/scripts/Makefile.spl
> +++ b/scripts/Makefile.spl
> @@ -219,6 +219,8 @@ ALL-$(CONFIG_SPL_X86_16BIT_INIT) += $(obj)/u-boot-x86-16bit-spl.bin
> ALL-$(CONFIG_ARCH_ZYNQ) += $(obj)/boot.bin
> ALL-$(CONFIG_ARCH_ZYNQMP) += $(obj)/boot.bin
>
> +ALL-$(CONFIG_ARCH_MEDIATEK) += $(obj)/u-boot-spl-mtk.bin
> +
> all: $(ALL-y)
>
> quiet_cmd_cat = CAT $@
> @@ -349,6 +351,15 @@ cmd_sunxi_spl_image_builder = $(objtree)/tools/sunxi-spl-image-builder \
> $(obj)/sunxi-spl-with-ecc.bin: $(obj)/sunxi-spl.bin
> $(call if_changed,sunxi_spl_image_builder)
>
> +
> +# MediaTek's specific SPL build
> +MKIMAGEFLAGS_u-boot-spl-mtk.bin = -T mtk_image \
> + -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) \
> + -n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
> +
> +$(obj)/u-boot-spl-mtk.bin: $(obj)/u-boot-spl.bin FORCE
> + $(call if_changed,mkimage)
> +
> # Rule to link u-boot-spl
> # May be overridden by arch/$(ARCH)/config.mk
> quiet_cmd_u-boot-spl ?= LD $@
> diff --git a/tools/Makefile b/tools/Makefile
> index 3c0521f..c93d17a 100644
> --- a/tools/Makefile
> +++ b/tools/Makefile
> @@ -116,6 +116,7 @@ dumpimage-mkimage-objs := aisimage.o \
> $(LIBFDT_OBJS) \
> gpimage.o \
> gpimage-common.o \
> + mtk_image.o \
> $(RSA_OBJS-y)
>
> dumpimage-objs := $(dumpimage-mkimage-objs) dumpimage.o
> diff --git a/tools/mtk_image.c b/tools/mtk_image.c
> new file mode 100644
> index 0000000..2706d2d
> --- /dev/null
> +++ b/tools/mtk_image.c
> @@ -0,0 +1,749 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Generate MediaTek BootROM header for SPL/U-Boot images
> + *
> + * Copyright (C) 2018 MediaTek Inc.
> + * Author: Weijie Gao <weijie.gao@mediatek.com>
> + */
> +
> +#include <image.h>
> +#include <u-boot/sha256.h>
> +#include "imagetool.h"
> +#include "mtk_image.h"
> +
> +/* NAND header for SPI-NAND with 2KB page + 64B spare */
> +static const union nand_boot_header snand_hdr_2k_64_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x03, 0x00, 0x40, 0x00,
> + 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x7B, 0xC4, 0x17, 0x9D,
> + 0xCA, 0x42, 0x90, 0xD0, 0x98, 0xD0, 0xE0, 0xF7,
> + 0xDB, 0xCD, 0x16, 0xF6, 0x03, 0x73, 0xD2, 0xB8,
> + 0x93, 0xB2, 0x56, 0x5A, 0x84, 0x6E, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for SPI-NAND with 2KB page + 120B/128B spare */
> +static const union nand_boot_header snand_hdr_2k_128_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
> + 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x90, 0x28, 0xED, 0x13,
> + 0x7F, 0x12, 0x22, 0xCD, 0x3D, 0x06, 0xF1, 0xB3,
> + 0x6F, 0x2E, 0xD9, 0xA0, 0x9D, 0x7A, 0xBD, 0xD7,
> + 0xB3, 0x28, 0x3C, 0x13, 0xDB, 0x4E, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for SPI-NAND with 4KB page + 256B spare */
> +static const union nand_boot_header snand_hdr_4k_256_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x10, 0x05, 0x00, 0xE0, 0x00,
> + 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x47, 0xED, 0x0E, 0xC3,
> + 0x83, 0xBF, 0x41, 0xD2, 0x85, 0x21, 0x97, 0x57,
> + 0xC4, 0x2E, 0x6B, 0x7A, 0x40, 0xE0, 0xCF, 0x8F,
> + 0x37, 0xBD, 0x17, 0xB6, 0xC7, 0xFE, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for Parallel NAND 1Gb with 2KB page + 64B spare */
> +static const union nand_boot_header nand_hdr_1gb_2k_64_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
> + 0x40, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x11, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x12, 0x28, 0x1C, 0x12,
> + 0x8F, 0xFD, 0xF8, 0x32, 0x6F, 0x6D, 0xCF, 0x6C,
> + 0xDA, 0x21, 0x70, 0x8C, 0xDA, 0x0A, 0x22, 0x82,
> + 0xAA, 0x59, 0xFA, 0x7C, 0x42, 0x2D, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for Parallel NAND 2Gb with 2KB page + 64B spare */
> +static const union nand_boot_header nand_hdr_2gb_2k_64_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
> + 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x20, 0x9C, 0x3D, 0x2D,
> + 0x7B, 0x68, 0x63, 0x52, 0x2E, 0x04, 0x63, 0xF1,
> + 0x35, 0x4E, 0x44, 0x3E, 0xF8, 0xAC, 0x9B, 0x95,
> + 0xAB, 0xFE, 0xE4, 0xE1, 0xD5, 0xF9, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for Parallel NAND 4Gb with 2KB page + 64B spare */
> +static const union nand_boot_header nand_hdr_4gb_2k_64_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
> + 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xE3, 0x0F, 0x86, 0x32,
> + 0x68, 0x05, 0xD9, 0xC8, 0x13, 0xDF, 0xC5, 0x0B,
> + 0x35, 0x3A, 0x68, 0xA5, 0x3C, 0x0C, 0x73, 0x87,
> + 0x63, 0xB0, 0xBE, 0xCC, 0x84, 0x47, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for Parallel NAND 2Gb with 2KB page + 128B spare */
> +static const union nand_boot_header nand_hdr_2gb_2k_128_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
> + 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x01, 0xA5, 0xE9, 0x5A,
> + 0xDF, 0x58, 0x62, 0x41, 0xD6, 0x26, 0x77, 0xBC,
> + 0x76, 0x1F, 0x27, 0x4E, 0x4F, 0x6C, 0xC3, 0xF0,
> + 0x36, 0xDE, 0xD9, 0xB3, 0xFF, 0x93, 0x00, 0x00
> + }
> +};
> +
> +/* NAND header for Parallel NAND 4Gb with 2KB page + 128B spare */
> +static const union nand_boot_header nand_hdr_4gb_2k_128_data = {
> + .data = {
> + 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
> + 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
> + 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
> + 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
> + 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xC2, 0x36, 0x52, 0x45,
> + 0xCC, 0x35, 0xD8, 0xDB, 0xEB, 0xFD, 0xD1, 0x46,
> + 0x76, 0x6B, 0x0B, 0xD5, 0x8B, 0xCC, 0x2B, 0xE2,
> + 0xFE, 0x90, 0x83, 0x9E, 0xAE, 0x2D, 0x00, 0x00
> + }
> +};
> +
> +static const struct nand_header_type {
> + const char *name;
> + const union nand_boot_header *data;
> +} nand_headers[] = {
> + {
> + .name = "2k+64",
> + .data = &snand_hdr_2k_64_data
> + }, {
> + .name = "2k+120",
> + .data = &snand_hdr_2k_128_data
> + }, {
> + .name = "2k+128",
> + .data = &snand_hdr_2k_128_data
> + }, {
> + .name = "4k+256",
> + .data = &snand_hdr_4k_256_data
> + }, {
> + .name = "1g:2k+64",
> + .data = &nand_hdr_1gb_2k_64_data
> + }, {
> + .name = "2g:2k+64",
> + .data = &nand_hdr_2gb_2k_64_data
> + }, {
> + .name = "4g:2k+64",
> + .data = &nand_hdr_4gb_2k_64_data
> + }, {
> + .name = "2g:2k+128",
> + .data = &nand_hdr_2gb_2k_128_data
> + }, {
> + .name = "4g:2k+128",
> + .data = &nand_hdr_4gb_2k_128_data
> + }
> +};
> +
> +static const struct brom_img_type {
> + const char *name;
> + enum brlyt_img_type type;
> +} brom_images[] = {
> + {
> + .name = "nand",
> + .type = BRLYT_TYPE_NAND
> + }, {
> + .name = "emmc",
> + .type = BRLYT_TYPE_EMMC
> + }, {
> + .name = "nor",
> + .type = BRLYT_TYPE_NOR
> + }, {
> + .name = "sdmmc",
> + .type = BRLYT_TYPE_SDMMC
> + }, {
> + .name = "snand",
> + .type = BRLYT_TYPE_SNAND
> + }
> +};
> +
> +/* Image type selected by user */
> +static enum brlyt_img_type hdr_media;
> +static int use_lk_hdr;
> +
> +/* LK image name */
> +static char lk_name[32] = "U-Boot";
> +
> +/* NAND header selected by user */
> +static const union nand_boot_header *hdr_nand;
> +
> +/* GFH header + 2 * 4KB pages of NAND */
> +static char hdr_tmp[sizeof(struct gfh_header) + 0x2000];
> +
> +static int mtk_image_check_image_types(uint8_t type)
> +{
> + if (type == IH_TYPE_MTKIMAGE)
> + return EXIT_SUCCESS;
> + else
> + return EXIT_FAILURE;
> +}
> +
> +static int mtk_brom_parse_imagename(const char *imagename)
> +{
> +#define is_blank_char(c) \
> + ((c) == '\t' || (c) == '\n' || (c) == '\r' || (c) == ' ')
> +
> + char *buf = strdup(imagename), *key, *val, *end, *next;
> + int i;
> +
> + /* User passed arguments from image name */
> + static const char *media = "";
> + static const char *nandinfo = "";
> + static const char *lk = "";
> +
> + key = buf;
> + while (key) {
> + next = strchr(key, ';');
> + if (next)
> + *next = 0;
> +
> + val = strchr(key, '=');
> + if (val) {
> + *val++ = 0;
> +
> + /* Trim key */
> + while (is_blank_char(*key))
> + key++;
> +
> + end = key + strlen(key) - 1;
> + while ((end >= key) && is_blank_char(*end))
> + end--;
> + end++;
> +
> + if (is_blank_char(*end))
> + *end = 0;
> +
> + /* Trim value */
> + while (is_blank_char(*val))
> + val++;
> +
> + end = val + strlen(val) - 1;
> + while ((end >= val) && is_blank_char(*end))
> + end--;
> + end++;
> +
> + if (is_blank_char(*end))
> + *end = 0;
> +
> + /* record user passed arguments */
> + if (!strcmp(key, "media"))
> + media = val;
> +
> + if (!strcmp(key, "nandinfo"))
> + nandinfo = val;
> +
> + if (!strcmp(key, "lk"))
> + lk = val;
> +
> + if (!strcmp(key, "lkname"))
> + strncpy(lk_name, val, sizeof(lk_name));
> + }
> +
> + if (next)
> + key = next + 1;
> + else
> + break;
> + }
> +
> + /* if user specified LK image header, skip following checks */
> + if (lk && lk[0] == '1') {
> + use_lk_hdr = 1;
> + free(buf);
> + return 0;
> + }
> +
> + /* parse media type */
> + for (i = 0; i < ARRAY_SIZE(brom_images); i++) {
> + if (!strcmp(brom_images[i].name, media)) {
> + hdr_media = brom_images[i].type;
> + break;
> + }
> + }
> +
> + /* parse nand header type */
> + for (i = 0; i < ARRAY_SIZE(nand_headers); i++) {
> + if (!strcmp(nand_headers[i].name, nandinfo)) {
> + hdr_nand = nand_headers[i].data;
> + break;
> + }
> + }
> +
> + free(buf);
> +
> + if (hdr_media == BRLYT_TYPE_INVALID) {
> + fprintf(stderr, "Error: media type is invalid or missing.\n");
> + fprintf(stderr, " Please specify -n \"media=<type>\"\n");
> + return -EINVAL;
> + }
> +
> + if ((hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND) &&
> + !hdr_nand) {
> + fprintf(stderr, "Error: nand info is invalid or missing.\n");
> + fprintf(stderr, " Please specify -n \"media=%s;"
> + "nandinfo=<info>\"\n", media);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int mtk_image_check_params(struct image_tool_params *params)
> +{
> + if (!params->addr) {
> + fprintf(stderr, "Error: Load Address must be set.\n");
> + return -EINVAL;
> + }
> +
> + if (!params->imagename) {
> + fprintf(stderr, "Error: Image Name must be set.\n");
> + return -EINVAL;
> + }
> +
> + return mtk_brom_parse_imagename(params->imagename);
> +}
> +
> +static int mtk_image_vrec_header(struct image_tool_params *params,
> + struct image_type_params *tparams)
> +{
> + if (use_lk_hdr) {
> + tparams->header_size = sizeof(union lk_hdr);
> + tparams->hdr = &hdr_tmp;
> + memset(&hdr_tmp, 0xff, tparams->header_size);
> + return 0;
> + }
> +
> + if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
> + tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize);
> + else
> + tparams->header_size = sizeof(struct gen_device_header);
> +
> + tparams->header_size += sizeof(struct gfh_header);
> + tparams->hdr = &hdr_tmp;
> +
> + memset(&hdr_tmp, 0xff, tparams->header_size);
> +
> + return SHA256_SUM_LEN;
> +}
> +
> +static int mtk_image_verify_gen_header(const uint8_t *ptr, int print)
> +{
> + union gen_boot_header *gbh = (union gen_boot_header *)ptr;
> + struct brom_layout_header *bh;
> + struct gfh_header *gfh;
> + const char *bootmedia;
> +
> + if (!strcmp(gbh->name, SF_BOOT_NAME))
> + bootmedia = "Serial NOR";
> + else if (!strcmp(gbh->name, EMMC_BOOT_NAME))
> + bootmedia = "eMMC";
> + else if (!strcmp(gbh->name, SDMMC_BOOT_NAME))
> + bootmedia = "SD/MMC";
> + else
> + return -1;
> +
> + if (print)
> + printf("Boot Media: %s\n", bootmedia);
> +
> + if (le32_to_cpu(gbh->version) != 1 ||
> + le32_to_cpu(gbh->size) != sizeof(union gen_boot_header))
> + return -1;
> +
> + bh = (struct brom_layout_header *)(ptr + le32_to_cpu(gbh->size));
> +
> + if (strcmp(bh->name, BRLYT_NAME))
> + return -1;
> +
> + if (le32_to_cpu(bh->magic) != BRLYT_MAGIC ||
> + (le32_to_cpu(bh->type) != BRLYT_TYPE_NOR &&
> + le32_to_cpu(bh->type) != BRLYT_TYPE_EMMC &&
> + le32_to_cpu(bh->type) != BRLYT_TYPE_SDMMC))
> + return -1;
> +
> + gfh = (struct gfh_header *)(ptr + le32_to_cpu(bh->header_size));
> +
> + if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
> + return -1;
> +
> + if (le32_to_cpu(gfh->file_info.flash_type) != GFH_FLASH_TYPE_GEN)
> + return -1;
> +
> + if (print)
> + printf("Load Address: %08x\n",
> + le32_to_cpu(gfh->file_info.load_addr) +
> + le32_to_cpu(gfh->file_info.jump_offset));
> +
> + return 0;
> +}
> +
> +static int mtk_image_verify_nand_header(const uint8_t *ptr, int print)
> +{
> + union nand_boot_header *nh = (union nand_boot_header *)ptr;
> + struct brom_layout_header *bh;
> + struct gfh_header *gfh;
> + const char *bootmedia;
> +
> + if (strncmp(nh->version, NAND_BOOT_VERSION, sizeof(nh->version)) ||
> + strcmp(nh->id, NAND_BOOT_ID))
> + return -1;
> +
> + bh = (struct brom_layout_header *)(ptr + le16_to_cpu(nh->pagesize));
> +
> + if (strcmp(bh->name, BRLYT_NAME))
> + return -1;
> +
> + if (le32_to_cpu(bh->magic) != BRLYT_MAGIC) {
> + return -1;
> + } else {
> + if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND)
> + bootmedia = "Parallel NAND";
> + else if (le32_to_cpu(bh->type) == BRLYT_TYPE_SNAND)
> + bootmedia = "Serial NAND";
> + else
> + return -1;
> + }
> +
> + if (print) {
> + printf("Boot Media: %s\n", bootmedia);
> +
> + if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND) {
> + uint64_t capacity =
> + (uint64_t)le16_to_cpu(nh->numblocks) *
> + (uint64_t)le16_to_cpu(nh->pages_of_block) *
> + (uint64_t)le16_to_cpu(nh->pagesize) * 8;
> + printf("Capacity: %dGb\n",
> + (uint32_t)(capacity >> 30));
> + }
> +
> + if (le16_to_cpu(nh->pagesize) >= 1024)
> + printf("Page Size: %dKB\n",
> + le16_to_cpu(nh->pagesize) >> 10);
> + else
> + printf("Page Size: %dB\n",
> + le16_to_cpu(nh->pagesize));
> +
> + printf("Spare Size: %dB\n", le16_to_cpu(nh->oobsize));
> + }
> +
> + gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(nh->pagesize));
> +
> + if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
> + return -1;
> +
> + if (le32_to_cpu(gfh->file_info.flash_type) != GFH_FLASH_TYPE_NAND)
> + return -1;
> +
> + if (print)
> + printf("Load Address: %08x\n",
> + le32_to_cpu(gfh->file_info.load_addr) +
> + le32_to_cpu(gfh->file_info.jump_offset));
> +
> + return 0;
> +}
> +
> +static int mtk_image_verify_header(unsigned char *ptr, int image_size,
> + struct image_tool_params *params)
> +{
> + union lk_hdr *lk = (union lk_hdr *)ptr;
> +
> + /* nothing to verify for LK image header */
> + if (le32_to_cpu(lk->magic) == LK_PART_MAGIC)
> + return 0;
> +
> + if (!strcmp((char *)ptr, NAND_BOOT_NAME))
> + return mtk_image_verify_nand_header(ptr, 0);
> + else
> + return mtk_image_verify_gen_header(ptr, 0);
> +
> + return -1;
> +}
> +
> +static void mtk_image_print_header(const void *ptr)
> +{
> + union lk_hdr *lk = (union lk_hdr *)ptr;
> +
> + if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) {
> + printf("Image Type: MediaTek LK Image\n");
> + printf("Load Address: %08x\n", le32_to_cpu(lk->loadaddr));
> + return;
> + }
> +
> + printf("Image Type: MediaTek BootROM Loadable Image\n");
> +
> + if (!strcmp((char *)ptr, NAND_BOOT_NAME))
> + mtk_image_verify_nand_header(ptr, 1);
> + else
> + mtk_image_verify_gen_header(ptr, 1);
> +}
> +
> +static void put_brom_layout_header(struct brom_layout_header *hdr, int type)
> +{
> + strncpy(hdr->name, BRLYT_NAME, sizeof(hdr->name));
> + hdr->version = cpu_to_le32(1);
> + hdr->magic = cpu_to_le32(BRLYT_MAGIC);
> + hdr->type = cpu_to_le32(type);
> +}
> +
> +static void put_ghf_common_header(struct gfh_common_header *gfh, int size,
> + int type, int ver)
> +{
> + memcpy(gfh->magic, GFH_HEADER_MAGIC, sizeof(gfh->magic));
> + gfh->version = ver;
> + gfh->size = cpu_to_le16(size);
> + gfh->type = cpu_to_le16(type);
> +}
> +
> +static void put_ghf_header(struct gfh_header *gfh, int file_size,
> + int dev_hdr_size, int load_addr, int flash_type)
> +{
> + memset(gfh, 0, sizeof(struct gfh_header));
> +
> + /* GFH_FILE_INFO header */
> + put_ghf_common_header(&gfh->file_info.gfh, sizeof(gfh->file_info),
> + GFH_TYPE_FILE_INFO, 1);
> + strncpy(gfh->file_info.name, GFH_FILE_INFO_NAME,
> + sizeof(gfh->file_info.name));
> + gfh->file_info.unused = cpu_to_le32(1);
> + gfh->file_info.file_type = cpu_to_le16(1);
> + gfh->file_info.flash_type = flash_type;
> + gfh->file_info.sig_type = GFH_SIG_TYPE_SHA256;
> + gfh->file_info.load_addr = cpu_to_le32(load_addr - sizeof(*gfh));
> + gfh->file_info.total_size = cpu_to_le32(file_size - dev_hdr_size);
> + gfh->file_info.max_size = cpu_to_le32(file_size);
> + gfh->file_info.hdr_size = sizeof(*gfh);
> + gfh->file_info.sig_size = SHA256_SUM_LEN;
> + gfh->file_info.jump_offset = sizeof(*gfh);
> + gfh->file_info.processed = cpu_to_le32(1);
> +
> + /* GFH_BL_INFO header */
> + put_ghf_common_header(&gfh->bl_info.gfh, sizeof(gfh->bl_info),
> + GFH_TYPE_BL_INFO, 1);
> + gfh->bl_info.attr = cpu_to_le32(1);
> +
> + /* GFH_BROM_CFG header */
> + put_ghf_common_header(&gfh->brom_cfg.gfh, sizeof(gfh->brom_cfg),
> + GFH_TYPE_BROM_CFG, 3);
> + gfh->brom_cfg.cfg_bits = cpu_to_le32(
> + GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS |
> + GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN |
> + GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN);
> + gfh->brom_cfg.usbdl_by_kcol0_timeout_ms = cpu_to_le32(5000);
> +
> + /* GFH_BL_SEC_KEY header */
> + put_ghf_common_header(&gfh->bl_sec_key.gfh, sizeof(gfh->bl_sec_key),
> + GFH_TYPE_BL_SEC_KEY, 1);
> +
> + /* GFH_ANTI_CLONE header */
> + put_ghf_common_header(&gfh->anti_clone.gfh, sizeof(gfh->anti_clone),
> + GFH_TYPE_ANTI_CLONE, 1);
> + gfh->anti_clone.ac_offset = cpu_to_le32(0x10);
> + gfh->anti_clone.ac_len = cpu_to_le32(0x80);
> +
> + /* GFH_BROM_SEC_CFG header */
> + put_ghf_common_header(&gfh->brom_sec_cfg.gfh,
> + sizeof(gfh->brom_sec_cfg),
> + GFH_TYPE_BROM_SEC_CFG, 1);
> + gfh->brom_sec_cfg.cfg_bits =
> + cpu_to_le32(BROM_SEC_CFG_JTAG_EN | BROM_SEC_CFG_UART_EN);
> +}
> +
> +static void put_hash(uint8_t *buff, int size)
> +{
> + sha256_context ctx;
> +
> + sha256_starts(&ctx);
> + sha256_update(&ctx, buff, size);
> + sha256_finish(&ctx, buff + size);
> +}
> +
> +static void mtk_image_set_gen_header(void *ptr, off_t filesize,
> + uint32_t loadaddr)
> +{
> + struct gen_device_header *hdr = (struct gen_device_header *)ptr;
> + struct gfh_header *gfh;
> + const char *bootname = NULL;
> +
> + if (hdr_media == BRLYT_TYPE_NOR)
> + bootname = SF_BOOT_NAME;
> + else if (hdr_media == BRLYT_TYPE_EMMC)
> + bootname = EMMC_BOOT_NAME;
> + else if (hdr_media == BRLYT_TYPE_SDMMC)
> + bootname = SDMMC_BOOT_NAME;
> +
> + /* Generic device header */
> + strncpy(hdr->boot.name, bootname, sizeof(hdr->boot.name));
> + hdr->boot.version = cpu_to_le32(1);
> + hdr->boot.size = cpu_to_le32(sizeof(hdr->boot));
> +
> + /* BRLYT header */
> + put_brom_layout_header(&hdr->brlyt, hdr_media);
> + hdr->brlyt.header_size = cpu_to_le32(sizeof(struct gen_device_header));
> + hdr->brlyt.total_size = cpu_to_le32(filesize);
> + hdr->brlyt.header_size_2 = hdr->brlyt.header_size;
> + hdr->brlyt.total_size_2 = hdr->brlyt.total_size;
> +
> + /* GFH header */
> + gfh = (struct gfh_header *)(ptr + sizeof(struct gen_device_header));
> + put_ghf_header(gfh, filesize, sizeof(struct gen_device_header),
> + loadaddr, GFH_FLASH_TYPE_GEN);
> +
> + /* Generate SHA256 hash */
> + put_hash((uint8_t *)gfh,
> + filesize - sizeof(struct gen_device_header) - SHA256_SUM_LEN);
> +}
> +
> +static void mtk_image_set_nand_header(void *ptr, off_t filesize,
> + uint32_t loadaddr)
> +{
> + union nand_boot_header *nh = (union nand_boot_header *)ptr;
> + struct brom_layout_header *brlyt;
> + struct gfh_header *gfh;
> + uint32_t payload_pages;
> + int i;
> +
> + /* NAND device header, repeat 4 times */
> + for (i = 0; i < 4; i++)
> + memcpy(nh + i, hdr_nand, sizeof(union nand_boot_header));
> +
> + /* BRLYT header */
> + payload_pages = (filesize + le16_to_cpu(hdr_nand->pagesize) - 1) /
> + le16_to_cpu(hdr_nand->pagesize);
> + brlyt = (struct brom_layout_header *)
> + (ptr + le16_to_cpu(hdr_nand->pagesize));
> + put_brom_layout_header(brlyt, hdr_media);
> + brlyt->header_size = cpu_to_le32(2);
> + brlyt->total_size = cpu_to_le32(payload_pages);
> + brlyt->header_size_2 = brlyt->header_size;
> + brlyt->total_size_2 = brlyt->total_size;
> + brlyt->unused = cpu_to_le32(1);
> +
> + /* GFH header */
> + gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(hdr_nand->pagesize));
> + put_ghf_header(gfh, filesize, 2 * le16_to_cpu(hdr_nand->pagesize),
> + loadaddr, GFH_FLASH_TYPE_NAND);
> +
> + /* Generate SHA256 hash */
> + put_hash((uint8_t *)gfh,
> + filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN);
> +}
> +
> +static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
> + struct image_tool_params *params)
> +{
> + union lk_hdr *lk = (union lk_hdr *)ptr;
> +
> + if (use_lk_hdr) {
> + lk->magic = cpu_to_le32(LK_PART_MAGIC);
> + lk->size = cpu_to_le32(sbuf->st_size - sizeof(union lk_hdr));
> + lk->loadaddr = cpu_to_le32(params->addr);
> + lk->mode = 0xffffffff; /* must be non-zero */
> + memset(lk->name, 0, sizeof(lk->name));
> + strncpy(lk->name, lk_name, sizeof(lk->name));
> + return;
> + }
> +
> + if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
> + mtk_image_set_nand_header(ptr, sbuf->st_size, params->addr);
> + else
> + mtk_image_set_gen_header(ptr, sbuf->st_size, params->addr);
> +}
> +
> +U_BOOT_IMAGE_TYPE(
> + mtk_image,
> + "MediaTek BootROM Loadable Image support",
> + 0,
> + NULL,
> + mtk_image_check_params,
> + mtk_image_verify_header,
> + mtk_image_print_header,
> + mtk_image_set_header,
> + NULL,
> + mtk_image_check_image_types,
> + NULL,
> + mtk_image_vrec_header
> +);
> diff --git a/tools/mtk_image.h b/tools/mtk_image.h
> new file mode 100644
> index 0000000..0a9eab3
> --- /dev/null
> +++ b/tools/mtk_image.h
> @@ -0,0 +1,199 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * MediaTek BootROM header definitions
> + *
> + * Copyright (C) 2018 MediaTek Inc.
> + * Author: Weijie Gao <weijie.gao@mediatek.com>
> + */
> +
> +#ifndef _MTK_IMAGE_H
> +#define _MTK_IMAGE_H
> +
> +/* Device header definitions */
> +
> +/* Header for NOR/SD/eMMC */
> +union gen_boot_header {
> + struct {
> + char name[12];
> + __le32 version;
> + __le32 size;
> + };
> +
> + uint8_t pad[0x200];
> +};
> +
> +#define EMMC_BOOT_NAME "EMMC_BOOT"
> +#define SF_BOOT_NAME "SF_BOOT"
> +#define SDMMC_BOOT_NAME "SDMMC_BOOT"
> +
> +/* Header for NAND */
> +union nand_boot_header {
> + struct {
> + char name[12];
> + char version[4];
> + char id[8];
> + __le16 ioif;
> + __le16 pagesize;
> + __le16 addrcycles;
> + __le16 oobsize;
> + __le16 pages_of_block;
> + __le16 numblocks;
> + __le16 writesize_shift;
> + __le16 erasesize_shift;
> + uint8_t dummy[60];
> + uint8_t ecc_parity[28];
> + };
> +
> + uint8_t data[0x80];
> +};
> +
> +#define NAND_BOOT_NAME "BOOTLOADER!"
> +#define NAND_BOOT_VERSION "V006"
> +#define NAND_BOOT_ID "NFIINFO"
> +
> +/* BootROM layout header */
> +struct brom_layout_header {
> + char name[8];
> + __le32 version;
> + __le32 header_size;
> + __le32 total_size;
> + __le32 magic;
> + __le32 type;
> + __le32 header_size_2;
> + __le32 total_size_2;
> + __le32 unused;
> +};
> +
> +#define BRLYT_NAME "BRLYT"
> +#define BRLYT_MAGIC 0x42424242
> +
> +enum brlyt_img_type {
> + BRLYT_TYPE_INVALID = 0,
> + BRLYT_TYPE_NAND = 0x10002,
> + BRLYT_TYPE_EMMC = 0x10005,
> + BRLYT_TYPE_NOR = 0x10007,
> + BRLYT_TYPE_SDMMC = 0x10008,
> + BRLYT_TYPE_SNAND = 0x10009
> +};
> +
> +/* Combined device header for NOR/SD/eMMC */
> +struct gen_device_header {
> + union gen_boot_header boot;
> +
> + union {
> + struct brom_layout_header brlyt;
> + uint8_t brlyt_pad[0x400];
> + };
> +};
> +
> +/* BootROM header definitions */
> +struct gfh_common_header {
> + uint8_t magic[3];
> + uint8_t version;
> + __le16 size;
> + __le16 type;
> +};
> +
> +#define GFH_HEADER_MAGIC "MMM"
> +
> +#define GFH_TYPE_FILE_INFO 0
> +#define GFH_TYPE_BL_INFO 1
> +#define GFH_TYPE_BROM_CFG 7
> +#define GFH_TYPE_BL_SEC_KEY 3
> +#define GFH_TYPE_ANTI_CLONE 2
> +#define GFH_TYPE_BROM_SEC_CFG 8
> +
> +struct gfh_file_info {
> + struct gfh_common_header gfh;
> + char name[12];
> + __le32 unused;
> + __le16 file_type;
> + uint8_t flash_type;
> + uint8_t sig_type;
> + __le32 load_addr;
> + __le32 total_size;
> + __le32 max_size;
> + __le32 hdr_size;
> + __le32 sig_size;
> + __le32 jump_offset;
> + __le32 processed;
> +};
> +
> +#define GFH_FILE_INFO_NAME "FILE_INFO"
> +
> +#define GFH_FLASH_TYPE_GEN 5
> +#define GFH_FLASH_TYPE_NAND 2
> +
> +#define GFH_SIG_TYPE_NONE 0
> +#define GFH_SIG_TYPE_SHA256 1
> +
> +struct gfh_bl_info {
> + struct gfh_common_header gfh;
> + __le32 attr;
> +};
> +
> +struct gfh_brom_cfg {
> + struct gfh_common_header gfh;
> + __le32 cfg_bits;
> + __le32 usbdl_by_auto_detect_timeout_ms;
> + uint8_t unused[0x48];
> + __le32 usbdl_by_kcol0_timeout_ms;
> + __le32 usbdl_by_flag_timeout_ms;
> + uint32_t pad;
> +};
> +
> +#define GFH_BROM_CFG_USBDL_BY_AUTO_DETECT_TIMEOUT_EN 0x02
> +#define GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS 0x10
> +#define GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN 0x80
> +#define GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN 0x100
> +
> +struct gfh_bl_sec_key {
> + struct gfh_common_header gfh;
> + uint8_t pad[0x20c];
> +};
> +
> +struct gfh_anti_clone {
> + struct gfh_common_header gfh;
> + uint8_t ac_b2k;
> + uint8_t ac_b2c;
> + uint16_t pad;
> + __le32 ac_offset;
> + __le32 ac_len;
> +};
> +
> +struct gfh_brom_sec_cfg {
> + struct gfh_common_header gfh;
> + __le32 cfg_bits;
> + char customer_name[0x20];
> + __le32 pad;
> +};
> +
> +#define BROM_SEC_CFG_JTAG_EN 1
> +#define BROM_SEC_CFG_UART_EN 2
> +
> +struct gfh_header {
> + struct gfh_file_info file_info;
> + struct gfh_bl_info bl_info;
> + struct gfh_brom_cfg brom_cfg;
> + struct gfh_bl_sec_key bl_sec_key;
> + struct gfh_anti_clone anti_clone;
> + struct gfh_brom_sec_cfg brom_sec_cfg;
> +};
> +
> +/* LK image header */
> +
> +union lk_hdr {
> + struct {
> + __le32 magic;
> + __le32 size;
> + char name[32];
> + __le32 loadaddr;
> + __le32 mode;
> + };
> +
> + uint8_t data[512];
> +};
> +
> +#define LK_PART_MAGIC 0x58881688
> +
> +#endif /* _MTK_IMAGE_H */
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
next prev parent reply other threads:[~2018-11-14 17:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-06 8:47 [U-Boot] [PATCH v4 00/18] Add U-Boot support for MediaTek SoCs - MT7623n & MT7629 Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 01/18] tools: MediaTek: add MTK boot header generation to mkimage Ryder Lee
2018-11-14 17:27 ` Fabien Parent [this message]
2018-11-06 8:47 ` [U-Boot] [PATCH v4 02/18] arm: dts: MediaTek: add device tree for MT7629 Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 03/18] arm: dts: MediaTek: add device tree for MT7623 Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 04/18] arm: MediaTek: add basic support for MT7629 boards Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 05/18] arm: MediaTek: add basic support for MT7623 boards Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 06/18] clk: MediaTek: add clock driver for MT7629 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 07/18] clk: MediaTek: add clock driver for MT7623 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 08/18] timer: MediaTek: add timer driver for MediaTek SoCs Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 09/18] watchdog: MediaTek: add watchdog " Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 10/18] pinctrl: MediaTek: add pinctrl driver for MT7629 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 11/18] pinctrl: MediaTek: add pinctrl driver for MT7623 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 12/18] power domain: MediaTek: add power domain driver for MT7629 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 13/18] power domain: MediaTek: add power domain driver for MT7623 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 14/18] serial: 16550: allow the driver to support MediaTek serial Ryder Lee
2018-11-13 19:53 ` Simon Glass
2018-11-14 1:32 ` Ryder Lee
2018-11-15 19:59 ` Simon Glass
2018-11-16 14:30 ` Tom Rini
2018-11-19 0:39 ` Weijie Gao
2018-11-06 8:47 ` [U-Boot] [PATCH v4 15/18] ram: MediaTek: add DDR3 driver for MT7629 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 16/18] mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC Ryder Lee
2018-11-06 8:47 ` [U-Boot] [PATCH v4 17/18] doc: README.mediatek: Add a simple README for MediaTek Ryder Lee
2018-11-06 16:20 ` Frank Wunderlich
2018-11-06 8:47 ` [U-Boot] [PATCH v4 18/18] MAINTAINERS: add an entry " Ryder Lee
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