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From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
To: Shashank Sharma <shashank.sharma@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>,
	Felix Kuehling <felix.kuehling@amd.com>,
	Christian Koenig <christian.koenig@amd.com>,
	amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 0/9] AMDGPU Usermode queues
Date: Mon, 10 Apr 2023 02:36:35 +0200	[thread overview]
Message-ID: <CAP+8YyFgbru=1HkLo1Kfm1jKPrk5sXenUmmkzzysWbSh05q2tg@mail.gmail.com> (raw)
In-Reply-To: <20230329160445.1300-1-shashank.sharma@amd.com>

Hi Shashank,

I tried writing a program to experiment with usermode queues and I
found some weird behavior: The first run of the program works as
expected, while subsequent runs don't seem to do anything (and I
allocate everything in GTT, so it should be zero initialized
consistently). Is this a known issue?

The linked libdrm code for the uapi still does a doorbell ioctl so it
could very well be that I do the doorbell wrong (especially since the
ioctl implementation was never shared AFAICT?), but it seems like the
kernel submissions (i.e. write wptr in dwords to the wptr va and to
the doorbell). Is it possible to update the test in libdrm?

Code: https://gitlab.freedesktop.org/bnieuwenhuizen/usermode-queue

Thanks,
Bas

On Wed, Mar 29, 2023 at 6:05 PM Shashank Sharma <shashank.sharma@amd.com> wrote:
>
> This patch series introduces AMDGPU usermode queues for gfx workloads.
> Usermode queues is a method of GPU workload submission into the graphics
> hardware without any interaction with kernel/DRM schedulers. In this
> method, a userspace graphics application can create its own workqueue
> and submit it directly in the GPU HW.
>
> The general idea of how this is supposed to work:
> - The application creates the following GPU objetcs:
>   - A queue object to hold the workload packets.
>   - A read pointer object.
>   - A write pointer object.
>   - A doorbell page.
> - The application picks a 32-bit offset in the doorbell page for this queue.
> - The application uses the usermode_queue_create IOCTL introduced in
>   this patch, by passing the the GPU addresses of these objects (read
>   ptr, write ptr, queue base address and 32-bit doorbell offset from
>   the doorbell page)
> - The kernel creates the queue and maps it in the HW.
> - The application can start submitting the data in the queue as soon as
>   the kernel IOCTL returns.
> - After filling the workload data in the queue, the app must write the
>   number of dwords added in the queue into the doorbell offset, and the
>   GPU will start fetching the data.
>
> libDRM changes for this series and a sample DRM test program can be found
> in the MESA merge request here:
> https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/287
>
> This patch series depends on the doorbell-manager changes, which are being
> reviewed here:
> https://patchwork.freedesktop.org/series/115802/
>
> Alex Deucher (1):
>   drm/amdgpu: UAPI for user queue management
>
> Arvind Yadav (2):
>   drm/amdgpu: add new parameters in v11_struct
>   drm/amdgpu: map wptr BO into GART
>
> Shashank Sharma (6):
>   drm/amdgpu: add usermode queue base code
>   drm/amdgpu: add new IOCTL for usermode queue
>   drm/amdgpu: create GFX-gen11 MQD for userqueue
>   drm/amdgpu: create context space for usermode queue
>   drm/amdgpu: map usermode queue into MES
>   drm/amdgpu: generate doorbell index for userqueue
>
>  drivers/gpu/drm/amd/amdgpu/Makefile           |   3 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  10 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c       |   2 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c       |   6 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 298 ++++++++++++++++++
>  .../drm/amd/amdgpu/amdgpu_userqueue_gfx_v11.c | 230 ++++++++++++++
>  .../gpu/drm/amd/include/amdgpu_userqueue.h    |  66 ++++
>  drivers/gpu/drm/amd/include/v11_structs.h     |  16 +-
>  include/uapi/drm/amdgpu_drm.h                 |  55 ++++
>  9 files changed, 677 insertions(+), 9 deletions(-)
>  create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>  create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue_gfx_v11.c
>  create mode 100644 drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>
> --
> 2.40.0
>

  parent reply	other threads:[~2023-04-10  0:38 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-29 16:04 [PATCH v3 0/9] AMDGPU Usermode queues Shashank Sharma
2023-03-29 16:04 ` [PATCH v3 1/9] drm/amdgpu: UAPI for user queue management Shashank Sharma
2023-03-29 17:25   ` Christian König
2023-03-29 17:57   ` Alex Deucher
2023-03-29 19:21     ` Shashank Sharma
2023-03-29 19:46       ` Alex Deucher
2023-03-30  6:13         ` Shashank Sharma
     [not found]   ` <71fc098c-c0cb-3097-4e11-c2d9bd9b4783@damsy.net>
2023-03-30  8:15     ` Shashank Sharma
2023-03-30 10:40       ` Christian König
2023-03-30 15:08         ` Alex Deucher
2023-03-29 16:04 ` [PATCH v3 2/9] drm/amdgpu: add usermode queue base code Shashank Sharma
2023-03-30 21:15   ` Alex Deucher
2023-03-31  8:52     ` Shashank Sharma
2023-04-04 16:05   ` Luben Tuikov
2023-03-29 16:04 ` [PATCH v3 3/9] drm/amdgpu: add new IOCTL for usermode queue Shashank Sharma
2023-04-10  0:02   ` Bas Nieuwenhuizen
2023-04-10 14:28     ` Shashank Sharma
2023-03-29 16:04 ` [PATCH v3 4/9] drm/amdgpu: create GFX-gen11 MQD for userqueue Shashank Sharma
2023-03-30 21:18   ` Alex Deucher
2023-03-31  8:49     ` Shashank Sharma
2023-04-04 16:21   ` Luben Tuikov
2023-03-29 16:04 ` [PATCH v3 5/9] drm/amdgpu: create context space for usermode queue Shashank Sharma
2023-03-30 21:23   ` Alex Deucher
2023-03-31  8:42     ` Shashank Sharma
2023-04-04 16:24   ` Luben Tuikov
2023-04-04 16:37     ` Shashank Sharma
2023-03-29 16:04 ` [PATCH v3 6/9] drm/amdgpu: add new parameters in v11_struct Shashank Sharma
2023-03-30 21:25   ` Alex Deucher
2023-03-31  6:39     ` Yadav, Arvind
2023-03-31  8:30     ` Shashank Sharma
2023-03-29 16:04 ` [PATCH v3 7/9] drm/amdgpu: map usermode queue into MES Shashank Sharma
2023-04-04 16:30   ` Luben Tuikov
2023-04-04 16:36     ` Shashank Sharma
2023-04-04 20:58       ` Luben Tuikov
2023-04-05 10:06         ` Shashank Sharma
2023-04-05 21:18           ` Luben Tuikov
2023-04-06  7:45             ` Shashank Sharma
2023-04-06 15:16               ` Felix Kuehling
2023-04-07  6:41                 ` Shashank Sharma
2023-03-29 16:04 ` [PATCH v3 8/9] drm/amdgpu: map wptr BO into GART Shashank Sharma
2023-04-10  0:00   ` Bas Nieuwenhuizen
2023-04-11  9:29     ` Christian König
2023-04-11 16:02       ` Shashank Sharma
2023-03-29 16:04 ` [PATCH v3 9/9] drm/amdgpu: generate doorbell index for userqueue Shashank Sharma
2023-04-10  0:36 ` Bas Nieuwenhuizen [this message]
2023-04-10  7:32   ` [PATCH v3 0/9] AMDGPU Usermode queues Sharma, Shashank
2023-04-10  9:25     ` Bas Nieuwenhuizen
2023-04-10 13:40       ` Sharma, Shashank
2023-04-10 13:46         ` Bas Nieuwenhuizen
2023-04-10 14:01           ` Shashank Sharma
2023-04-10 14:04             ` Bas Nieuwenhuizen
2023-04-10 14:26               ` Shashank Sharma
2023-04-11  9:37                 ` Christian König
2023-04-11  9:48                   ` Shashank Sharma
2023-04-11 10:00                     ` Bas Nieuwenhuizen
2023-04-11 10:55                       ` Shashank Sharma

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