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Mon, 23 May 2022 06:35:16 -0700 (PDT) MIME-Version: 1.0 References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-8-tmaimon77@gmail.com> In-Reply-To: From: Tomer Maimon Date: Mon, 23 May 2022 16:35:05 +0300 Message-ID: Subject: Re: [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock To: Krzysztof Kozlowski List-Id: Cc: Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, Philipp Zabel , Greg KH , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , catalin.marinas@arm.com, will@kernel.org, Arnd Bergmann , Olof Johansson , jirislaby@kernel.org, shawnguo@kernel.org, bjorn.andersson@linaro.org, geert+renesas@glider.be, marcel.ziswiler@toradex.com, Vinod Koul , biju.das.jz@bp.renesas.com, nobuhiro1.iwamatsu@toshiba.co.jp, robert.hancock@calian.com, =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= , lkundrak@v3.sk, soc@kernel.org, devicetree , Linux Kernel Mailing List , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-watchdog@vger.kernel.org, Linux ARM Content-Type: multipart/alternative; boundary="0000000000001ae8c005dfade9f8" --0000000000001ae8c005dfade9f8 Content-Type: text/plain; charset="UTF-8" Hi Krzysztof, Thanks for your comments. the patch will modify according to your comments and will be sent in the next kernel revision 5.19.rc1 On Mon, 23 May 2022 at 10:36, Krzysztof Kozlowski < krzysztof.kozlowski@linaro.org> wrote: > On 22/05/2022 17:50, Tomer Maimon wrote: > > Nuvoton Arbel BMC NPCM7XX contains an integrated clock controller, which > > generates and supplies clocks to all modules within the BMC. > > > > Signed-off-by: Tomer Maimon > > --- > > .../bindings/clock/nuvoton,npcm845-clk.yaml | 68 +++++++++++++++++++ > > .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 50 ++++++++++++++ > > 2 files changed, 118 insertions(+) > > create mode 100644 > Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > > create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > > > > diff --git > a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > > new file mode 100644 > > index 000000000000..f305c7c7eaf0 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml > > @@ -0,0 +1,68 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Nuvoton NPCM8XX Clock Controller Binding > > + > > +maintainers: > > + - Tomer Maimon > > + > > +description: | > > + Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, > which > > + generates and supplies clocks to all modules within the BMC. > > + > > +properties: > > + compatible: > > + enum: > > + - nuvoton,npcm845-clk > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + description: > > + specify the external clocks used by the NPCM8XX clock module. > > Skip description, it's obvious. > > > + items: > > + - description: 25M reference clock > > + - description: CPU reference clock > > + - description: MC reference clock > > + > > + clock-names: > > + description: > > + specify the external clocks names used by the NPCM8XX clock > module. > > Skip description, it's obvious. > > > + items: > > + - const: refclk > > Just "ref" > > > + - const: sysbypck > > + - const: mcbypck > > Is "ck" short for "clk"? If yes, then just skip the suffix. > ck > > > + > > + '#clock-cells': > > + const: 1 > > + description: > > + See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full > > + list of NPCM8XX clock IDs. > > + > > +required: > > + - compatible > > + - reg > > + - "#clock-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + # Clock Control Module node: > > + - | > > + > > No need for blank line. > > > + ahb { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + clk: clock-controller@f0801000 { > > + compatible = "nuvoton,npcm845-clk"; > > + reg = <0x0 0xf0801000 0x0 0x1000>; > > + #clock-cells = <1>; > > + }; > > + }; > > + > > +... > > diff --git a/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > > new file mode 100644 > > index 000000000000..d76f606bf88b > > --- /dev/null > > +++ b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h > > Filename - same as bindings, so nuvoton,npcm845-clk.h > > > @@ -0,0 +1,50 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > Dual license, same as bindings. > > > +/* > > + * Nuvoton NPCM8xx Clock Generator binding > > + * clock binding number for all clocks supportted by nuvoton,npcm8xx-clk > > + * > > + * Copyright (C) 2021 Nuvoton Technologies tomer.maimon@nuvoton.com > > + * > > + */ > > + > > +#ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H > > +#define __DT_BINDINGS_CLOCK_NPCM8XX_H > > + > > +#define NPCM8XX_CLK_CPU 0 > > +#define NPCM8XX_CLK_GFX_PIXEL 1 > > +#define NPCM8XX_CLK_MC 2 > > +#define NPCM8XX_CLK_ADC 3 > > +#define NPCM8XX_CLK_AHB 4 > > +#define NPCM8XX_CLK_TIMER 5 > > +#define NPCM8XX_CLK_UART 6 > > +#define NPCM8XX_CLK_UART2 7 > > +#define NPCM8XX_CLK_MMC 8 > > +#define NPCM8XX_CLK_SPI3 9 > > +#define NPCM8XX_CLK_PCI 10 > > +#define NPCM8XX_CLK_AXI 11 > > +#define NPCM8XX_CLK_APB4 12 > > +#define NPCM8XX_CLK_APB3 13 > > +#define NPCM8XX_CLK_APB2 14 > > +#define NPCM8XX_CLK_APB1 15 > > +#define NPCM8XX_CLK_APB5 16 > > +#define NPCM8XX_CLK_CLKOUT 17 > > +#define NPCM8XX_CLK_GFX 18 > > +#define NPCM8XX_CLK_SU 19 > > +#define NPCM8XX_CLK_SU48 20 > > +#define NPCM8XX_CLK_SDHC 21 > > +#define NPCM8XX_CLK_SPI0 22 > > +#define NPCM8XX_CLK_SPI1 23 > > +#define NPCM8XX_CLK_SPIX 24 > > +#define NPCM8XX_CLK_RG 25 > > +#define NPCM8XX_CLK_RCP 26 > > +#define NPCM8XX_CLK_PRE_ADC 27 > > +#define NPCM8XX_CLK_ATB 28 > > +#define NPCM8XX_CLK_PRE_CLK 29 > > +#define NPCM8XX_CLK_TH 30 > > +#define NPCM8XX_CLK_REFCLK 31 > > +#define NPCM8XX_CLK_SYSBYPCK 32 > > +#define NPCM8XX_CLK_MCBYPCK 33 > > + > > +#define NPCM8XX_NUM_CLOCKS (NPCM8XX_CLK_MCBYPCK + 1) > > + > > +#endif > > > Best regards, > Krzysztof > Best regards, Tomer --0000000000001ae8c005dfade9f8 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi=C2=A0Krzysztof,
=

Thanks for your comments.
=

the patch will=C2=A0modify acco= rding to your comments and will be sent in the next kernel revision 5.19.rc= 1

On Mon, 23 May 2022 at 10:36, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> = wrote:
On 22/05/= 2022 17:50, Tomer Maimon wrote:
> Nuvoton Arbel BMC NPCM7XX contains an integrated clock controller, whi= ch
> generates and supplies clocks to all modules within the BMC.
>
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>=C2=A0 .../bindings/clock/nuvoton,npcm845-clk.yaml=C2=A0 =C2=A0| 68 +++= ++++++++++++++++
>=C2=A0 .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 50 +++++++++++++= +
>=C2=A0 2 files changed, 118 insertions(+)
>=C2=A0 create mode 100644 Documentation/devicetree/bindings/clock/nuvot= on,npcm845-clk.yaml
>=C2=A0 create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clo= ck.h
>
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-c= lk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml<= br> > new file mode 100644
> index 000000000000..f305c7c7eaf0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml=
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schema= s/clock/nuvoton,npcm845-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.= yaml#
> +
> +title: Nuvoton NPCM8XX Clock Controller Binding
> +
> +maintainers:
> +=C2=A0 - Tomer Maimon <tmaimon77@gmail.com>
> +
> +description: |
> +=C2=A0 Nuvoton Arbel BMC NPCM8XX contains an integrated clock control= ler, which
> +=C2=A0 generates and supplies clocks to all modules within the BMC. > +
> +properties:
> +=C2=A0 compatible:
> +=C2=A0 =C2=A0 enum:
> +=C2=A0 =C2=A0 =C2=A0 - nuvoton,npcm845-clk
> +
> +=C2=A0 reg:
> +=C2=A0 =C2=A0 maxItems: 1
> +
> +=C2=A0 clocks:
> +=C2=A0 =C2=A0 description:
> +=C2=A0 =C2=A0 =C2=A0 specify the external clocks used by the NPCM8XX = clock module.

Skip description, it's obvious.

> +=C2=A0 =C2=A0 items:
> +=C2=A0 =C2=A0 =C2=A0 - description: 25M reference clock
> +=C2=A0 =C2=A0 =C2=A0 - description: CPU reference clock
> +=C2=A0 =C2=A0 =C2=A0 - description: MC reference clock
> +
> +=C2=A0 clock-names:
> +=C2=A0 =C2=A0 description:
> +=C2=A0 =C2=A0 =C2=A0 specify the external clocks names used by the NP= CM8XX clock module.

Skip description, it's obvious.

> +=C2=A0 =C2=A0 items:
> +=C2=A0 =C2=A0 =C2=A0 - const: refclk

Just "ref"

> +=C2=A0 =C2=A0 =C2=A0 - const: sysbypck
> +=C2=A0 =C2=A0 =C2=A0 - const: mcbypck

Is "ck" short for "clk"? If yes, then just skip the suf= fix.
ck=C2=A0

> +
> +=C2=A0 '#clock-cells':
> +=C2=A0 =C2=A0 const: 1
> +=C2=A0 =C2=A0 description:
> +=C2=A0 =C2=A0 =C2=A0 See include/dt-bindings/clock/nuvoton,npcm8xx-cl= ock.h for the full
> +=C2=A0 =C2=A0 =C2=A0 list of NPCM8XX clock IDs.
> +
> +required:
> +=C2=A0 - compatible
> +=C2=A0 - reg
> +=C2=A0 - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +=C2=A0 # Clock Control Module node:
> +=C2=A0 - |
> +

No need for blank line.

> +=C2=A0 =C2=A0 ahb {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D <2>;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D <2>;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 clk: clock-controller@f0801000 {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 compatible =3D "nuvoto= n,npcm845-clk";
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x0 0xf0801000 = 0x0 0x1000>;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #clock-cells =3D <1>;=
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 };
> +=C2=A0 =C2=A0 };
> +
> +...
> diff --git a/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h b/inclu= de/dt-bindings/clock/nuvoton,npcm8xx-clock.h
> new file mode 100644
> index 000000000000..d76f606bf88b
> --- /dev/null
> +++ b/include/dt-bindings/clock/nuvoton,npcm8xx-clock.h

Filename - same as bindings, so nuvoton,npcm845-clk.h

> @@ -0,0 +1,50 @@
> +/* SPDX-License-Identifier: GPL-2.0 */

Dual license, same as bindings.

> +/*
> + * Nuvoton NPCM8xx Clock Generator binding
> + * clock binding number for all clocks supportted by nuvoton,npcm8xx-= clk
> + *
> + * Copyright (C) 2021 Nuvoton Technologies tomer.maimon@nuvoton.com
> + *
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H
> +#define __DT_BINDINGS_CLOCK_NPCM8XX_H
> +
> +#define NPCM8XX_CLK_CPU=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 0
> +#define NPCM8XX_CLK_GFX_PIXEL=C2=A0 =C2=A0 =C2=A0 =C2=A0 1
> +#define NPCM8XX_CLK_MC=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A02
> +#define NPCM8XX_CLK_ADC=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 3
> +#define NPCM8XX_CLK_AHB=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 4
> +#define NPCM8XX_CLK_TIMER=C2=A0 =C2=A0 5
> +#define NPCM8XX_CLK_UART=C2=A0 =C2=A0 =C2=A06
> +#define NPCM8XX_CLK_UART2=C2=A0 =C2=A0 7
> +#define NPCM8XX_CLK_MMC=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 8
> +#define NPCM8XX_CLK_SPI3=C2=A0 =C2=A0 =C2=A09
> +#define NPCM8XX_CLK_PCI=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 10
> +#define NPCM8XX_CLK_AXI=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 11
> +#define NPCM8XX_CLK_APB4=C2=A0 =C2=A0 =C2=A012
> +#define NPCM8XX_CLK_APB3=C2=A0 =C2=A0 =C2=A013
> +#define NPCM8XX_CLK_APB2=C2=A0 =C2=A0 =C2=A014
> +#define NPCM8XX_CLK_APB1=C2=A0 =C2=A0 =C2=A015
> +#define NPCM8XX_CLK_APB5=C2=A0 =C2=A0 =C2=A016
> +#define NPCM8XX_CLK_CLKOUT=C2=A0 =C2=A017
> +#define NPCM8XX_CLK_GFX=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 18
> +#define NPCM8XX_CLK_SU=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A019
> +#define NPCM8XX_CLK_SU48=C2=A0 =C2=A0 =C2=A020
> +#define NPCM8XX_CLK_SDHC=C2=A0 =C2=A0 =C2=A021
> +#define NPCM8XX_CLK_SPI0=C2=A0 =C2=A0 =C2=A022
> +#define NPCM8XX_CLK_SPI1=C2=A0 =C2=A0 =C2=A023
> +#define NPCM8XX_CLK_SPIX=C2=A0 =C2=A0 =C2=A024
> +#define NPCM8XX_CLK_RG=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A025
> +#define NPCM8XX_CLK_RCP=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 26
> +#define NPCM8XX_CLK_PRE_ADC=C2=A0 27
> +#define NPCM8XX_CLK_ATB=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 28
> +#define NPCM8XX_CLK_PRE_CLK=C2=A0 29
> +#define NPCM8XX_CLK_TH=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A030
> +#define NPCM8XX_CLK_REFCLK=C2=A0 =C2=A031
> +#define NPCM8XX_CLK_SYSBYPCK 32
> +#define NPCM8XX_CLK_MCBYPCK=C2=A0 33
> +
> +#define NPCM8XX_NUM_CLOCKS=C2=A0 =C2=A0(NPCM8XX_CLK_MCBYPCK + 1)
> +
> +#endif


Best regards,
Krzysztof

Best regards,

<= /div>
Tomer=C2=A0
--0000000000001ae8c005dfade9f8--