From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6AF5C4321E for ; Mon, 5 Dec 2022 11:20:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229950AbiLELU2 (ORCPT ); Mon, 5 Dec 2022 06:20:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229982AbiLELUY (ORCPT ); Mon, 5 Dec 2022 06:20:24 -0500 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A45917599; Mon, 5 Dec 2022 03:20:23 -0800 (PST) Received: by mail-lf1-x133.google.com with SMTP id b3so18013100lfv.2; Mon, 05 Dec 2022 03:20:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=gQZdWCk9TZHtIPbVJXmvMK2JUQWMNX+6lfb/3HP5Mec=; b=NIuTszuQPXA0nhI61iLhILZmwzinSYocmIz2ZTkRZvS7NNBpFdB6UHkI70CT+WLHqR V2ZgB7frGE9kT/UisM5KAQheA0htbZo4sRf8j8QymOHNBU8qE2qYqyVgR/fuUgoMUHNn qcv5JXz4WtgVQc8+5Ew27rx0SG1sceX14AxTk9rppkomD78CI+wAsE80YD/DmOsT3+Ar zGNF142b+8Nb/xZvolCO6kWuScBmLwmtcVXcF33+prvtXOUlX1m0u9RFJIkdT4BXx0iB c96PgwgR8aEH5v4pXZDjduHt9nFg8Nve4+pjxA8Vp1EwnbQj5CWyaSzJGjdHGb27v/K1 MHMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=gQZdWCk9TZHtIPbVJXmvMK2JUQWMNX+6lfb/3HP5Mec=; b=Z4SDhf2GtO0hfd2yBWytBgEiZThuSgTqudgmRCCBlYNPT6hlxZGF8CYSMtJ/5D8BJI zvUvKuGlrnHuvkry7GbfYn85/jTm8vs+U6wNl0Kl9DBhU5zj40ysy/AfBZ1FA59RFzeC 6ndOpVOxTqRqW1u1K0aJeykADueCLVcbA0b3zkVI0RkKUF389wCoba9QriGaP9t+bn9L 5ePviNLRnkhoftxDDIEGIGsZw54Dnp1gr00Uqcnm9RYMLy+MTGCfEatECk8UiVBiKje4 MRPVsrsu5bZKeGO3HIre+EOu+XXoC/OV2Sq8gRSWSKaFnZbJRaktrlYfd6zbQWqC8y61 D+cQ== X-Gm-Message-State: ANoB5plhnBvyXiA8WNbDTKBL6FNyuZw6JAaSNM0Noa145TSu/Ro+Bvbi YMmcUC08AToRqlZSxEYCuWG8J2RGXDeXx9gM6xY= X-Google-Smtp-Source: AA0mqf4xO4hYS4MNgipiw6LS5E03S+Whk3RNQT/CgUeZISIUHhNzH16pu5m2zRyEXR44992o+bBRV6L2seZoQ/fHU7U= X-Received: by 2002:ac2:4e14:0:b0:4af:f5a0:8786 with SMTP id e20-20020ac24e14000000b004aff5a08786mr25478865lfr.265.1670239221420; Mon, 05 Dec 2022 03:20:21 -0800 (PST) MIME-Version: 1.0 References: <20221205085351.27566-1-tmaimon77@gmail.com> <20221205085351.27566-3-tmaimon77@gmail.com> In-Reply-To: From: Tomer Maimon Date: Mon, 5 Dec 2022 13:20:10 +0200 Message-ID: Subject: Re: [PATCH v2 2/2] mmc: sdhci-npcm: Add NPCM SDHCI driver To: Andy Shevchenko Cc: ulf.hansson@linaro.org, avifishman70@gmail.com, tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com, benjaminfair@google.com, adrian.hunter@intel.com, skhan@linuxfoundation.org, davidgow@google.com, pbrobinson@gmail.com, gsomlo@gmail.com, briannorris@chromium.org, arnd@arndb.de, krakoczy@antmicro.com, openbmc@lists.ozlabs.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Andy, Thanks for your comments. On Mon, 5 Dec 2022 at 12:54, Andy Shevchenko wrote: > > On Mon, Dec 5, 2022 at 10:54 AM Tomer Maimon wrote: > > > > Add Nuvoton NPCM BMC sdhci-pltfm controller driver. > > Thank you for an update, my comments below. > > ... > > > +config MMC_SDHCI_NPCM > > > config MMC_SDHCI_IPROC > > Perhaps after IPROC? Will be done in the next version. > > ... > > > @@ -97,6 +97,7 @@ obj-$(CONFIG_MMC_SDHCI_MICROCHIP_PIC32) += sdhci-pic32.o > > obj-$(CONFIG_MMC_SDHCI_BRCMSTB) += sdhci-brcmstb.o > > obj-$(CONFIG_MMC_SDHCI_OMAP) += sdhci-omap.o > > obj-$(CONFIG_MMC_SDHCI_SPRD) += sdhci-sprd.o > > +obj-$(CONFIG_MMC_SDHCI_NPCM) += sdhci-npcm.o > > Perhaps after IPROC? (There is a group of platform drivers slightly > below than here) Will be done in the next version. > > > obj-$(CONFIG_MMC_CQHCI) += cqhci.o > > ... > > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > I guess platform_device.h is missing here. Build and work without platform_device.h, do I need it for module use? > > ... > > > +static int npcm_sdhci_probe(struct platform_device *pdev) > > +{ > > + struct sdhci_pltfm_host *pltfm_host; > > + struct sdhci_host *host; > > + u32 caps; > > + int ret; > > + > > + host = sdhci_pltfm_init(pdev, &npcm_sdhci_pdata, 0); > > + if (IS_ERR(host)) > > + return PTR_ERR(host); > > + > > + pltfm_host = sdhci_priv(host); > > > + pltfm_host->clk = devm_clk_get_optional(&pdev->dev, NULL); > > You can't mix devm with non-devm in this way. Can you explain what you mean You can't mix devm with non-devm in this way, where is the mix? In version 1 used devm_clk_get, is it problematic? > > > + if (IS_ERR(pltfm_host->clk)) > > + return PTR_ERR(pltfm_host->clk); > > + > > + ret = clk_prepare_enable(pltfm_host->clk); > > + if (ret) > > + return ret; > > + > > + caps = sdhci_readl(host, SDHCI_CAPABILITIES); > > + if (caps & SDHCI_CAN_DO_8BIT) > > + host->mmc->caps |= MMC_CAP_8_BIT_DATA; > > + > > + ret = mmc_of_parse(host->mmc); > > + if (ret) > > + goto err_sdhci_add; > > + > > + ret = sdhci_add_host(host); > > + if (ret) > > + goto err_sdhci_add; > > Why can't you use sdhci_pltfm_register()? two things are missing in sdhci_pltfm_register 1. clock. 2. Adding SDHCI_CAN_DO_8BIT capability according the eMMC capabilities. > > > + return 0; > > + > > +err_sdhci_add: > > + clk_disable_unprepare(pltfm_host->clk); > > + sdhci_pltfm_free(pdev); > > + return ret; > > +} > > Missing ->remove() due to above. Will check > > Have you tried to compile as a module and then remove and insert it > several times? will try > > -- > With Best Regards, > Andy Shevchenko Best regards, Tomer From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 547C5C4321E for ; Mon, 5 Dec 2022 11:21:33 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4NQh2M3JRrz3bbR for ; Mon, 5 Dec 2022 22:21:31 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=NIuTszuQ; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::134; helo=mail-lf1-x134.google.com; envelope-from=tmaimon77@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=NIuTszuQ; dkim-atps=neutral Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4NQh1D3fzmz3bVZ for ; Mon, 5 Dec 2022 22:20:30 +1100 (AEDT) Received: by mail-lf1-x134.google.com with SMTP id p8so17987140lfu.11 for ; Mon, 05 Dec 2022 03:20:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=gQZdWCk9TZHtIPbVJXmvMK2JUQWMNX+6lfb/3HP5Mec=; b=NIuTszuQPXA0nhI61iLhILZmwzinSYocmIz2ZTkRZvS7NNBpFdB6UHkI70CT+WLHqR V2ZgB7frGE9kT/UisM5KAQheA0htbZo4sRf8j8QymOHNBU8qE2qYqyVgR/fuUgoMUHNn qcv5JXz4WtgVQc8+5Ew27rx0SG1sceX14AxTk9rppkomD78CI+wAsE80YD/DmOsT3+Ar zGNF142b+8Nb/xZvolCO6kWuScBmLwmtcVXcF33+prvtXOUlX1m0u9RFJIkdT4BXx0iB c96PgwgR8aEH5v4pXZDjduHt9nFg8Nve4+pjxA8Vp1EwnbQj5CWyaSzJGjdHGb27v/K1 MHMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=gQZdWCk9TZHtIPbVJXmvMK2JUQWMNX+6lfb/3HP5Mec=; b=QSEuFllJaolN+OkO12uFkoiyeF5iI4FHjblpVN6poi9vVqOcGTPX2VSXa+Aakkv91P PYILznLWo81yKo2Dar4uzt51K4veC7/Z7jxJBr/zZXq8AmHJw+SXwjs9viDzBuThYScN C5eHXc49lWHINPqb6MTh5LKDLc9Wm5McjyCCCTKfLQT6dIyOAtZ6Nh7s4VvcSL2qFg+b iA9bPOtqolXaACWN3COwZLmYbwaric0HaRl14K/91mAEgZdZBdOOYvRUqLQqNG7TANzE wLJS5bCMWNCW+iX8xzZJsUVZuhlWj1I8XuI4Y5BTAMzuqVwNJV/1tTL4oqlcuyU6fsEl 6N6w== X-Gm-Message-State: ANoB5pkYPAfZ0r+vZfrVjk7iN4hjD6mANySmkH4SNdfOnT/e833MF9DG mbvOnEirLo/+IdQv3q5ke27ArkwXOdSQESRomDQ= X-Google-Smtp-Source: AA0mqf4xO4hYS4MNgipiw6LS5E03S+Whk3RNQT/CgUeZISIUHhNzH16pu5m2zRyEXR44992o+bBRV6L2seZoQ/fHU7U= X-Received: by 2002:ac2:4e14:0:b0:4af:f5a0:8786 with SMTP id e20-20020ac24e14000000b004aff5a08786mr25478865lfr.265.1670239221420; Mon, 05 Dec 2022 03:20:21 -0800 (PST) MIME-Version: 1.0 References: <20221205085351.27566-1-tmaimon77@gmail.com> <20221205085351.27566-3-tmaimon77@gmail.com> In-Reply-To: From: Tomer Maimon Date: Mon, 5 Dec 2022 13:20:10 +0200 Message-ID: Subject: Re: [PATCH v2 2/2] mmc: sdhci-npcm: Add NPCM SDHCI driver To: Andy Shevchenko Content-Type: text/plain; charset="UTF-8" X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, benjaminfair@google.com, arnd@arndb.de, krakoczy@antmicro.com, avifishman70@gmail.com, venture@google.com, openbmc@lists.ozlabs.org, briannorris@chromium.org, linux-mmc@vger.kernel.org, adrian.hunter@intel.com, tali.perry1@gmail.com, gsomlo@gmail.com, joel@jms.id.au, davidgow@google.com, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, pbrobinson@gmail.com Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" Hi Andy, Thanks for your comments. On Mon, 5 Dec 2022 at 12:54, Andy Shevchenko wrote: > > On Mon, Dec 5, 2022 at 10:54 AM Tomer Maimon wrote: > > > > Add Nuvoton NPCM BMC sdhci-pltfm controller driver. > > Thank you for an update, my comments below. > > ... > > > +config MMC_SDHCI_NPCM > > > config MMC_SDHCI_IPROC > > Perhaps after IPROC? Will be done in the next version. > > ... > > > @@ -97,6 +97,7 @@ obj-$(CONFIG_MMC_SDHCI_MICROCHIP_PIC32) += sdhci-pic32.o > > obj-$(CONFIG_MMC_SDHCI_BRCMSTB) += sdhci-brcmstb.o > > obj-$(CONFIG_MMC_SDHCI_OMAP) += sdhci-omap.o > > obj-$(CONFIG_MMC_SDHCI_SPRD) += sdhci-sprd.o > > +obj-$(CONFIG_MMC_SDHCI_NPCM) += sdhci-npcm.o > > Perhaps after IPROC? (There is a group of platform drivers slightly > below than here) Will be done in the next version. > > > obj-$(CONFIG_MMC_CQHCI) += cqhci.o > > ... > > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > I guess platform_device.h is missing here. Build and work without platform_device.h, do I need it for module use? > > ... > > > +static int npcm_sdhci_probe(struct platform_device *pdev) > > +{ > > + struct sdhci_pltfm_host *pltfm_host; > > + struct sdhci_host *host; > > + u32 caps; > > + int ret; > > + > > + host = sdhci_pltfm_init(pdev, &npcm_sdhci_pdata, 0); > > + if (IS_ERR(host)) > > + return PTR_ERR(host); > > + > > + pltfm_host = sdhci_priv(host); > > > + pltfm_host->clk = devm_clk_get_optional(&pdev->dev, NULL); > > You can't mix devm with non-devm in this way. Can you explain what you mean You can't mix devm with non-devm in this way, where is the mix? In version 1 used devm_clk_get, is it problematic? > > > + if (IS_ERR(pltfm_host->clk)) > > + return PTR_ERR(pltfm_host->clk); > > + > > + ret = clk_prepare_enable(pltfm_host->clk); > > + if (ret) > > + return ret; > > + > > + caps = sdhci_readl(host, SDHCI_CAPABILITIES); > > + if (caps & SDHCI_CAN_DO_8BIT) > > + host->mmc->caps |= MMC_CAP_8_BIT_DATA; > > + > > + ret = mmc_of_parse(host->mmc); > > + if (ret) > > + goto err_sdhci_add; > > + > > + ret = sdhci_add_host(host); > > + if (ret) > > + goto err_sdhci_add; > > Why can't you use sdhci_pltfm_register()? two things are missing in sdhci_pltfm_register 1. clock. 2. Adding SDHCI_CAN_DO_8BIT capability according the eMMC capabilities. > > > + return 0; > > + > > +err_sdhci_add: > > + clk_disable_unprepare(pltfm_host->clk); > > + sdhci_pltfm_free(pdev); > > + return ret; > > +} > > Missing ->remove() due to above. Will check > > Have you tried to compile as a module and then remove and insert it > several times? will try > > -- > With Best Regards, > Andy Shevchenko Best regards, Tomer