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From: Padmarao Begari <padmarao.b@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v2 1/7] riscv: Add DMA 64-bit address support
Date: Wed, 28 Oct 2020 10:26:20 +0530	[thread overview]
Message-ID: <CAP95y-jFHJezfg-2owWMyZqWUvfpfUC2KUt51PeFtb5++K8+Fg@mail.gmail.com> (raw)
In-Reply-To: <CAAhSdy3EY6J+nK-gGn3w+iykMMoN0+1+R=Mq3T1hjv7T2vjEfw@mail.gmail.com>

Hi Anup,

On Sun, Oct 25, 2020 at 11:13 AM Anup Patel <anup@brainfault.org> wrote:

> On Thu, Oct 22, 2020 at 1:23 PM Padmarao Begari
> <padmarao.begari@microchip.com> wrote:
> >
> > dma_addr_t holds any valid DMA address. If the DMA API only uses
> 32/64-bit
> > addresses, dma_addr_t need only be 32/64 bits wide.
> >
> > Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
> > ---
> >  arch/riscv/Kconfig             | 5 +++++
> >  arch/riscv/include/asm/types.h | 4 ++++
> >  2 files changed, 9 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index aaa3b833a5..7ab1ccff40 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -152,6 +152,11 @@ config 32BIT
> >  config 64BIT
> >         bool
> >
> > +config DMA_ADDR_T_64BIT
> > +       bool
> > +       depends on 64BIT
> > +       default n
>
> This should be "default y if 64BIT".
>

Ok

>
> > +
> >  config SIFIVE_CLINT
> >         bool
> >         depends on RISCV_MMODE || SPL_RISCV_MMODE
> > diff --git a/arch/riscv/include/asm/types.h
> b/arch/riscv/include/asm/types.h
> > index 403cf9a48f..b800b2d221 100644
> > --- a/arch/riscv/include/asm/types.h
> > +++ b/arch/riscv/include/asm/types.h
> > @@ -29,7 +29,11 @@ typedef unsigned short umode_t;
> >
> >  #include <stddef.h>
> >
> > +#ifdef CONFIG_DMA_ADDR_T_64BIT
> > +typedef u64 dma_addr_t;
> > +#else
> >  typedef u32 dma_addr_t;
> > +#endif
> >
> >  typedef unsigned long phys_addr_t;
> >  typedef unsigned long phys_size_t;
> > --
> > 2.17.1
> >
>
> Apart from above, looks good to me.
>
> Reviewed-by: Anup Patel <anup.patel@wdc.com>
>

Thank you for review

Regards
Padmarao

>
> Regards,
> Anup
>

  reply	other threads:[~2020-10-28  4:56 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-22  7:07 [PATCH v2 0/7] Microchip PolarFire SoC support Padmarao Begari
2020-10-22  7:07 ` [PATCH v2 1/7] riscv: Add DMA 64-bit address support Padmarao Begari
2020-10-25  5:42   ` Anup Patel
2020-10-28  4:56     ` Padmarao Begari [this message]
2020-10-22  7:07 ` [PATCH v2 2/7] net: macb: Add DMA 64-bit address support for macb Padmarao Begari
2020-10-25  6:06   ` Anup Patel
2020-10-28  4:58     ` Padmarao Begari
2020-10-22  7:07 ` [PATCH v2 3/7] net: macb: Add phy address to read it from device tree Padmarao Begari
2020-10-25  6:20   ` Anup Patel
2020-10-28  4:59     ` Padmarao Begari
2020-10-22  7:07 ` [PATCH v2 4/7] clk: Add Microchip PolarFire SoC clock driver Padmarao Begari
2020-10-25  5:55   ` Anup Patel
2020-10-28  5:01     ` Padmarao Begari
2020-10-22  7:07 ` [PATCH v2 5/7] riscv: dts: Add device tree for Microchip Icicle Kit Padmarao Begari
2020-10-25  5:50   ` Anup Patel
2020-10-28  5:03     ` Padmarao Begari
2020-10-26 13:14   ` Bin Meng
2020-10-27  0:56     ` Atish Patra
2020-10-28  5:11       ` Padmarao Begari
2020-10-28  5:08     ` Padmarao Begari
2020-10-22  7:07 ` [PATCH v2 6/7] riscv: Add Microchip MPFS Icicle Kit support Padmarao Begari
2020-10-25  6:27   ` Anup Patel
2020-10-28  5:13     ` Padmarao Begari
2020-10-26 13:18   ` Bin Meng
2020-10-28  5:15     ` Padmarao Begari
2020-10-22  7:07 ` [PATCH v2 7/7] doc: board: Add Microchip MPFS Icicle Kit doc Padmarao Begari
2020-10-24 15:36   ` Jagan Teki
2020-11-04 10:23     ` Padmarao Begari
2020-10-25  6:53   ` Anup Patel
2020-11-04 10:27     ` Padmarao Begari

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